GB2293739A - Balanced output driver - Google Patents

Abstract

A balanced output driver for generating a floating balanced output signal 80 from a non-floating balanced input signal comprises an oscillator 100 for generating a balanced positive and negative polarity square wave signal having a substantially 50% duty cycle; a toroidal isolating transformer 110 having a primary winding for receiving the square wave signal and a secondary winding for generating a floating intermediate oscillating signal, the primary and secondary windings each being formed as a bifilar winding of two wires, with opposite ends of the two wires being electrically connected together to form a centre tap of that winding; means 120 for rectifying and smoothing the intermediate oscillating signal to generate a floating direct current power supply signal; and an output driver stage 60 for receiving the input signal and generating the output signal, the output driver stage being powered by the floating direct current power supply signal. Application is to audio signal transmission along cables. <IMAGE>

Description

BALANCED OUTPUT DRIVER This invention relates to balanced output drivers.

Electronic signals such as analogue audio signals often have to be transmitted along long lengths of cable. For example, an audio signal may have to be transmitted along a cable between two buildings in a studio complex.

In order to reduce the effects of noise which is electromagnetically induced in the transmission cable, and to allow for the possibility that the local ground potentials at the two ends of the cable may be different (e.g. in the two separate buildings), it has been proposed that either a 1:1 isolating transformer is placed in the signal path or a balanced signal is transmitted.

Isolating transformers can introduce signal distortions, since their frequency response may not be uniform across the required frequency band. Also, it is undesirable to use bulky wound components of this type in the signal path.

If a balanced signal is transmitted, induced noise can be rejected at the signal receiver by a differential amplifier input stage. However, if signal which is balanced with respect to the ground potential at the signal transmitter is received by an unbalanced input stage (for example, because the signal is incorrectly routed or because balanced receivers are not available), the induced noise is not separated from the signal.

This problem could be avoided by transmitting a balanced and floating signal for transmission. However, generating such a signal without introducing signal noise is very difficult. For some types of signal, such as high quality analogue audio signals, it is extremely important that as little noise as possible is introduced by the various stages in the signal transmission chain.

This invention provides a balanced output driver for generating a floating balanced output signal from a non-floating balanced input signal, the driver comprising: an oscillator for generating a balanced positive and negative polarity square wave signal having a substantially 50% duty cycle; a toroidal isolating transformer having a primary winding for receiving the square wave signal and a secondary winding for generating a floating intermediate oscillating signal, the primary and secondary windings each being formed as a bifilar winding of two wires, with opposite ends of the two wires being electrically connected together to form a centre tap of that winding; means for rectifying and smoothing the intermediate oscillating signal to generate a floating direct current power supply signal; and an output driver stage for receiving the input signal and generating the output signal. the output driver stage being powered by the floating direct current power supply signal.

The invention addresses the problems described above by providing a balanced output driver powered by a floating power supply. This means that there is no need for an isolating transformer in the signal path (it is in the power supply path instead), and that a floating balanced signal can be generated with all of the advantages described above. The use of a 50% duty cycle in the square wave generation means that the power supply to the driving amplifiers can be made particularly smooth, which is useful for noise-sensitive applications such as audio signal transmission.

The technique of forming a bifilar winding and then connecting opposite ends of the two wires of the bifilar winding to form a centre tap means that the two half-windings either side of the centre tap of the transformer are extremely well matched to one another along their entire length, in terms of inductive and capacitive coupling with one another, with the toroidal core and with the other windings of the transformer. The effect of this is that the signals induced in each half winding of the secondary are very well matched to one another and (because of the symmetrical antiphase driving of the corresponding primary windings) are symmetrically in antiphase. This can mean that apart from minor irregularities at switching times, the output of the rectifying means is a very smooth d.c. signal, with the centre tap of the secondary forming a very steady floating ground signal.This technique can also lead to high noise rejection due to the presence of antiphase signals at the winding ends.

Preferably the primary winding is disposed on a first portion of a toroidal core; and the secondary winding is disposed on a second portion of the toroidal core, the first and second portions being nonoverlapping so that the ends of the primary winding are separated from respective ends of the secondary winding by first and second separation distances; the first and second separation distances being substantially equal. Again, this means that there is equal capacitive coupling between the ends of the primary and secondary windings, and so the two outputs supplied to the bridge rectifier are well matched in amplitude and, to a large extent, differ only in polarity. This feature, coupled with the use of a 50% duty cycle of the square wave signal, means that apart from minor irregularities at switching times, the output of the bridge rectifier can be a very smooth d.c. signal.

Preferably the rectifying and smoothing means comprises a bridge rectifier for rectifying the intermediate oscillating signal, the bridge rectifier having a pair of output terminals, one or more capacitors connected between each output terminal and the centre tap of the secondary winding, and a bifilar-wound noise rejection choke connected in series with the bridge rectifier output terminals.

The techniques described above for reducing the noise in the balanced signal are particularly applicable to signals having highly stringent low noise requirements, such as audio signals.

A driver as described above is particularly usefully employed in signal processing apparatus.

In cases in which the input signal is generated from a sampled digital input signal. it is preferred that the oscillator is operable to generate the square wave signal in synchronism with the sampling frequency of the sampled digital input signal. This can avoid periodic interference between the square wave and the sampled digital signal.

In a preferred embodiment the apparatus comprises a plurality of circuit cards interconnected by a digital communication bus backplane having a characteristic impedance; and a bus driver for supplying signals onto the communication bus backplane, the bus driver having a higher output impedance than the backplane characteristic impedance.

This measure can also act to reduce induced noise in the circuit cards, which is important in noise-critical applications such as audio processing.

Although the bus-to-ground capacitance may be provided merely by the intrinsic capacitance of the bus itself, in some cases it can be advantageous to increase this capacitance, by providing a capacitor connected between the communication bus backplane and a signal ground potential.

In one preferred arrangement, the communication bus backplane has a characteristic impedance of about 75 ohms; and the bus driver has an output impedance of about 300 ohms. However, in general, it is preferred that the bus driver output impedance (R) and the capacitance between the bus backplane and a signal ground potential (C) are related to a maximum data transmission frequency on the bus backplane (F) by the formula: ff RC Preferably at least one of the cards comprises a differential amplifier, the input terminals of the differential amplifier being disposed along a line substantially parallel to the communication bus backplane. This makes use of the recognition that induced noise tends to proceed along a card with wavefronts substantially parallel to the bus backplane.

In another preferred embodiment, at least one of the cards comprises a differential amplifier, the apparatus comprising means for coupling noise components in a signal ground potential equally into each input of the differential amplifier. Noise induced equally in this way is substantially cancelled out by a differential amplifier.

Viewed from a second aspect this invention provides a floating power supply comprising: an oscillator for generating a balanced positive and negative polarity square wave signal having a substantially 50% duty cycle; a toroidal isolating transformer having a primary winding for receiving the square wave signal and a secondary winding for generating a floating intermediate oscillating signal, the primary and secondary windings each being formed as a bifilar winding of two wires, with opposite ends of the two wires being electrically connected together to form a centre tap of that winding; and means for rectifying and smoothing the intermediate oscillating signal to generate a floating direct current power supply signal.

An embodiment of the invention will now be described, by way of example only, with reference to the accompanying drawings, throughout which like parts are referred to by like references, and in which: Figure 1 is a schematic diagram of a balanced output driving stage; Figure 2 is a schematic diagram of a floating balanced output driving stage; Figure 3 is a schematic diagram of a floating balanced output driving stage and a floating power supply; Figures 4a and 4b are schematic diagrams of a toroidal isolating transformer; Figures 5 to 8 are schematic diagrams of communication bus backplanes and bus driver circuits; Figure 9 is a schematic graph showing the rise time of a signal on the communication bus backplane of Figure 5 or Figure 6; Figure 10 is a schematic graph showing the rise time of a signal on the communication bus backplane of Figure 7 or Figure 8;; Figure 11 is a schematic diagram of a circuit card connected to a communication bus backplane; and Figure 12 is a schematic diagram of an input noise rejection choke.

Figure 1 is a schematic diagram of a balanced output driving stage in which an input signal 10 is supplied to an output driver (amplifier) 20 and, via an inverter 30, to a second output driver 40.

The inverter 30 inverts the input signal 10 so that the output of the output driver 40 is an inverted version of the output of the driver 20.

These two driver output signals together form a balanced output.

Figure 2 is a schematic diagram of a floating balanced output driving stage. A balanced (but not floating) input signal from a signal source 50 incorporating an inverter 52 is supplied to a driver circuit 60 comprising two output drivers (amplifiers) powered by positive and negative floating power supply rails. The two outputs of the output drivers within the driver circuit 60, taken together, form a balanced and floating output signal 80.

Figure 3 is a schematic diagram of a floating balanced output driving stage together with a floating power supply. The circuit of Figure 3 makes use of a driver circuit 60 of the type described above with reference to Figures 1 and 2.

A balanced (but not floating) audio signal is supplied to the driver circuit 60 from digital audio processing circuitry 50'. The digital audio processing circuitry 50' comprises a digital-to-analogue converter and an inverter (not shown) to generate the balanced audio signal from a sampled digital signal. The digital audio processing circuitry 50', such as a digital audio mixing console or digital audio record/replay apparatus, operates under the control of a sampling clock signal. For example, the sampling clock signal may be a 44.1 kilohertz (kHz) or a 48 kHz clock signal.

The sampling clock is also supplied to an a.c. generator 100 which generates a fixed 50% duty cycle square wave signal having a frequency of three times that of the sampling clock signal (3Fs) in both positive 102 and inverted 104 polarities with respect to a supply ground 106. The duty cycle is very accurately fixed at 50%, preferably within a tolerance of less than + 0.1%.

The a.c. generator operates in synchronism with the sampling clock of the digital audio processing circuitry 50'. The output of the a.c. generator 100 is supplied to the primary turns of a toroidal isolating transformer 110. In particular, the positive and inverted polarity square wave signals are supplied to end taps of the transformer primary winding, and the supply ground 106 is connected to a centre tap of the primary winding.

The isolating transformer 110 will be described in more detail below with reference to Figures 4a and 4b.

The secondary winding of the transformer 110 is connected to a bridge rectifier 120 which rectifies the a.c. output of the transformer secondary to provide a d.c. supply. A centre tap of the secondary winding of the transformer 110 provides a floating ground potential, halfway between the positive and negative outputs of the bridge rectifier 120.

The outputs of the bridge rectifier 120 are smoothed by capacitors 130. Because the primary winding of the transformer 110 is supplied with positive and inverted square waves having 50% duty cycles, the outputs of the bridge rectifier will tend to be at a steady potential except possibly for slight irregularity at the switching times of the square wave. This property of the rectifier outputs means that the capacitors 130 can have relatively small values, such as 100 nanofarads.

The smoothed outputs of the rectifier 120 are then supplied, via a bifilar-wound common mode rejection choke 140 to a driver circuit 60 of the type described above. The choke 140 offers a high impedance to common mode signals on the smoothed rectifier outputs, and a low impedance to differential mode signals on those outputs.

A feature of the circuit of Figure 3 is that the square wave outputs of the a.c. generator 100 are synchronised with the sampling clock of the digital audio processing apparatus 50'. This synchronisation avoids beating effects between the output of the a.c.

generator 100 and the digital audio samples being processed within the apparatus 50'. This can reduce the distortion caused by any noise induced from the oscillations of the a.c. generator 100.

Figures 4a and 4b are schematic diagrams of the toroidal transformer 110. In particular, Figure 4a is a simplified schematic diagram illustrating the relative positions of the primary and secondary windings of the transformer, and Figure 4b is a simplified schematic diagram illustrating the way in which the windings are formed.

Referring to Figure 4a, the transformer is wound on a ferrite toroid 180, with the primary 182 and secondary 184 windings being disposed at opposite sides of the ferrite toroid 180. The windings are spaced so that the separations ll and 12 of adjacent ends of the windings are equal. This means that there is equal capacitive coupling between the ends of the windings, and so the two outputs supplied to the bridge rectifier are well matched in amplitude and, to a large extent, differ only in polarity. This feature, coupled with the use of a 50% duty cycle of the square wave signal generated by the a.c.

generator 100, means that apart from minor irregularities at switching times, the output of the bridge rectifier is a very smooth d.c. signal.

Figure 4b illustrates the way in which each winding (primary and secondary) of the transformer 110 is wound. For clarity of the diagram, only one winding is illustrated in Figure 4b.

The winding is formed first by forming a bifilar winding. In other words, two wires are wound around the ferrite toroid 180 together, so that the two wires are very closely spaced at each turn around the ferrite toroid 180.

Once the bifilar winding has been formed and positioned on the toroid as described with reference to Figure 4a, the windings are linked to form a centre tap 186. The centre tap is formed by connecting one end of one of the wires of the bifilar winding to the opposite end of the other wire of the bifilar winding. This means that the two wires are then connected in series at the centre tap. Starting from one end tap (e.g. the left-hand tap 188 in Figure 4b), the winding passes along the toroid from left to right on the diagram, and is then linked back to the left-hand end of the toroid by the centre tap connection. The winding then continues from left to right towards the other (right-hand) end tap 189.

This technique of forming a bifilar winding and then connecting the two wires of the bifilar winding as described above to form the centre tap means that the two half-windings either side of the centre tap 186 (i.e. the half-winding between the tap 188 and the centre tap 186 and the half-winding between the centre tap 186 and the end tap 189) are extremely well matched to one another along their entire length, in terms of inductive and capacitive coupling with one another, with the ferrite toroid and with the other windings of the transformer.

The effect of this is that the signals induced in each half winding of the secondary are very well matched to one another and (because of the symmetrical antiphase driving of the corresponding primary windings) are symmetrically in antiphase. Again, this means that apart from minor irregularities at switching times, the output of the bridge rectifier is a very smooth d.c. signal, with the centre tap of the secondary forming a very steady floating ground signal. This technique also leads to high noise rejection due to the presence of antiphase signals at the winding ends.

In the present embodiment, a floating power supply and balanced output driving stage as described may be provided on at least one of a plurality of circuit boards or cards carrying digital and analogue signal processing components and connected to a common digital communication bus backplane. Various measures for low noise operation of the communication bus backplane will now be described with reference to Figures 5 to 12.

Figure 5 is a schematic diagram of a previously proposed communication bus backplane 200 having a plurality of circuit boards or cards 210 connected to it. Signals are driven onto the communication bus backplane by a driver 220. The backplane 200 has a characteristic impedance of 75 ohms and so in the arrangement shown in Figure 5, it is driven by a driver having an output impedance of 75 ohms (represented in this case by a discrete resistor 230 at the output of a very low output impedance driver) and is terminated by a 75 ohm termination resistor 240. The capacitance of the bus backplane is represented schematically by a capacitor 250.

Figure 6 is a schematic diagram of a second type of previously proposed communication bus backplane. The arrangement of Figure 6 is very similar to that of Figure 5 apart from the omission of the terminating resistor 240. This omission reduces the attenuation caused by the potential divider formed by the resistor 230 and the resistor 240 of Figure 5.

A problem which can occur with backplane arrangements such as those shown in Figures 5 and 6 is that of high frequency noise being induced into the circuitry on the cards 210. The noise can be at a much higher frequency than the data communication rate along the bus backplane 200. These high frequency noise components are generated because of the sharp rise time of pulses transmitted on the backplane.

For example, in a system in which the data rate along the backplane 200 is about 4 megahertz (MHz), high frequency noise at up to about 100 MHz can be induced in the circuitry on the cards 210. In the case where the cards 210 carry analogue components, or components converting between analogue and digital signals, this induced noise can cause large degradations in the noise performance of the circuitry.

Figures 7 and 8 are schematic diagrams of communication bus backplanes and bus driver circuits according to embodiments of the present invention. In the embodiments of Figures 7 and 8, the output impedance of a bus driver 300 is increased from 75 ohms (in the previously proposed arrangements described above) to a much higher value such as 300 ohms. This means that the time constant of the resistor-capacitor (RC) circuit formed by the driver output impedance and the bus capacitance 310 is increased to a much longer time than the corresponding time constant in Figures 5 and 6. For example, in Figure 7 the time constant of the RC circuit formed by a 300 ohms output impedance 320 and the bus capacitance 310 is selected to be about 200 nanoseconds (nS).This increased rise time slews the signals applied to the bus, increasing their rise time and so decreasing the maximum frequency content of the HF noise to about 10 MHz. It is then much more straightforward to remove induced noise having a maximum frequency component limited to about 10 Mhz from the circuitry on cards 340 connected to a bus backplane 350 driven in this way.

In general, the bus driver output impedance (R) and the capacitance between the bus backplane and a signal ground potential (C) are related to a maximum data transmission frequency on the bus backplane (F) by the formula: F < RC In Figure 7, the output impedance of the bus driver 300 is represented as a discrete resistor 320 connected to the output of a low output impedance driver 300. However, it will be appreciated that the bus driver 300 could be constructed to have the required output impedance itself. The bus capacitance 310 is represented schematically by a capacitance shown in broken line. However, as shown in Figure 8, a discrete capacitor 325 could be connected across the bus (to signal ground) to vary the total capacitance in the RC circuit described above.

The bus backplane 350 of Figures 7 and 8 has a characteristic impedance of 75 ohms. In Figures 7 and 8, as in Figure 6, the bus backplane 350 is not terminated at the remote end.

Figure 9 is a schematic diagram showing the rise time of a signal on the communication bus backplane of Figures 5 and 6. The signal has a very sharp rise time and so high frequency components are generated which may be induced into the circuitry on the cards 210.

Figure 10 is a schematic graph showing the rise time of a signal on the communication bus backplane of Figures 7 and 8. In this case, the rise time is much longer than that shown in Figure 9, so the maximum frequency component of induced noise on the cards 340 is much lower for an identical data rate.

Figure 11 is a schematic diagram of a circuit card 340 connected to the backplane 350 of Figure 7 or Figure 8. It is recognised that the wave fronts 400 of noise induced from the backplane 350 are generally parallel to the backplane 350. Accordingly, the input terminals 405 of noise-sensitive components such as differential amplifiers 410 are arranged to lie on a line parallel to the backplane 350. This measure can mean that at any time, the noise induced in each input terminal is identical since the input terminals lie along a common wave front.

Figure 12 is a schematic diagram of an input noise rejection choke placed at the input of a differential amplifier 410 on one of the cards 340. The choke 430 comprises three coupled windings, two of which are connected in series with the component 410 inputs and the other of which is connected between ground potential 440 and a screening braid 450 (if used). The inductance of the two windings connected in series with the input terminals help to reject noise induced at the component's inputs. The third winding connected to ground potential 440, couples any noise induced in the signal ground equally into both input terminals. Noise induced equally into the two inputs is rejected by the differential amplifier 410.

A multi-stage approach of noise rejecting chokes can be used on each card 340. For example, in a card carrying a microphone amplifier connected to a analogue-to-digital converter, the different noise rejecting chokes can be selected to match the noise rejecting capability of the respective components. In this example, a noise rejecting choke having an inductance of about 300 microHenries could be used at the input of the microphone amplifier and a choke having an inductance of 4 milliHenries could be used as the input to the analogue-to-digital converter.

Claims (16)

1. A balanced output driver for generating a floating balanced output signal from a non-floating balanced input signal, the driver comprising: an oscillator for generating a balanced positive and negative polarity square wave signal having a substantially 50% duty cycle; a toroidal isolating transformer having a primary winding for receiving the square wave signal and a secondary winding for generating a floating intermediate oscillating signal, the primary and secondary windings each being formed as a bifilar winding of two wires, with opposite ends of the two wires being electrically connected together to form a centre tap of that winding; means for rectifying and smoothing the intermediate oscillating signal to generate a floating direct current power supply signal; and an output driver stage for receiving the input signal and generating the output signal, the output driver stage being powered by the floating direct current power supply signal.

2. A driver according to claim 1, in which: the primary winding is disposed on a first portion of a toroidal core; and the secondary winding is disposed on a second portion of the toroidal core, the first and second portions being non-overlapping so that the ends of the primary winding are separated from respective ends of the secondary winding by first and second separation distances; the first and second separation distances being substantially equal.

3. A driver according to claim 1 or claim 2, in which the rectifying and smoothing means comprises a bridge rectifier for rectifying the intermediate oscillating signal, the bridge rectifier having a pair of output terminals, one or more capacitors connected between each output terminal and the centre tap of the secondary winding, and a bifilarwound noise rejection choke connected in series with the bridge rectifier output terminals.

4. A driver according to any one of the preceding claims. in which the input signal is an audio signal.

5. Signal processing apparatus comprising a balanced output driver according to any one of the preceding claims.

6. Apparatus according to claim 5, comprising: means for generating the input signal from a sampled digital input signal; and in which the oscillator is operable to generate the square wave signal in synchronism with the sampling frequency of the sampled digital input signal.

7. Apparatus according to claim 5 or claim 6, comprising: a plurality of circuit cards interconnected by a digital communication bus backplane having a characteristic impedance; and a bus driver for supplying signals onto the communication bus backplane, the bus driver having a higher output impedance than the backplane characteristic impedance.

8. Apparatus according to claim 7, comprising a capacitor connected between the communication bus backplane and a signal ground potential.

9. Apparatus according to claim 7 or claim 8, in which: the communication bus backplane has a characteristic impedance of about 75 ohms; and the bus driver has an output impedance of about 300 ohms.

10. Apparatus according to any one of claims 7 to 9, in which the bus driver output impedance (R) and the capacitance between the bus backplane and a signal ground potential (C) are related to a maximum data transmission frequency on the bus backplane (F) by the formula: 2 F < Tc RC

11. Apparatus according to any one of claims 7 to 10, in which at least one of the cards comprises a differential amplifier, the input terminals of the differential amplifier being disposed along a line substantially parallel to the communication bus backplane.

12. Apparatus according to any one of claims 7 to 11, in which at least one of the cards comprises a differential amplifier, the apparatus comprising means for coupling noise components in a signal ground potential substantially equally into each input of the differential amplifier.

13. A floating power supply comprising: an oscillator for generating a balanced positive and negative polarity square wave signal having a substantially 50% duty cycle; a toroidal isolating transformer having a primary winding for receiving the square wave signal and a secondary winding for generating a floating intermediate oscillating signal, the primary and secondary windings each being formed as a bifilar winding of two wires, with opposite ends of the two wires being electrically connected together to form a centre tap of that winding; and means for rectifying and smoothing the intermediate oscillating signal to generate a floating direct current power supply signal.

14. A balanced output driver substantially as hereinbefore described with reference to the accompanying drawings.

15. Signal processing apparatus substantially as hereinbefore described with reference to the accompanying drawings.

16. A floating power supply substantially as hereinbefore described with reference to the accompanying drawings.