GB2291233B - Semiconductor memory device with reduced data bus line load - Google Patents

Semiconductor memory device with reduced data bus line load

Info

Publication number
GB2291233B
GB2291233B GB9513937A GB9513937A GB2291233B GB 2291233 B GB2291233 B GB 2291233B GB 9513937 A GB9513937 A GB 9513937A GB 9513937 A GB9513937 A GB 9513937A GB 2291233 B GB2291233 B GB 2291233B
Authority
GB
United Kingdom
Prior art keywords
memory device
semiconductor memory
data bus
bus line
reduced data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB9513937A
Other versions
GB9513937D0 (en
GB2291233A (en
Inventor
Geoun Tae Kwon
Yong Chul Cho
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Hyundai Electronics Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Industries Co Ltd filed Critical Hyundai Electronics Industries Co Ltd
Publication of GB9513937D0 publication Critical patent/GB9513937D0/en
Publication of GB2291233A publication Critical patent/GB2291233A/en
Application granted granted Critical
Publication of GB2291233B publication Critical patent/GB2291233B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1048—Data bus control circuits, e.g. precharging, presetting, equalising
GB9513937A 1994-07-07 1995-07-07 Semiconductor memory device with reduced data bus line load Expired - Fee Related GB2291233B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940016356A KR970003337B1 (en) 1994-07-07 1994-07-07 A semiconductor memory device including an apparatus for reducing load of data bus line

Publications (3)

Publication Number Publication Date
GB9513937D0 GB9513937D0 (en) 1995-09-06
GB2291233A GB2291233A (en) 1996-01-17
GB2291233B true GB2291233B (en) 1998-08-12

Family

ID=19387531

Family Applications (1)

Application Number Title Priority Date Filing Date
GB9513937A Expired - Fee Related GB2291233B (en) 1994-07-07 1995-07-07 Semiconductor memory device with reduced data bus line load

Country Status (3)

Country Link
KR (1) KR970003337B1 (en)
CN (1) CN1054228C (en)
GB (1) GB2291233B (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100224769B1 (en) * 1995-12-29 1999-10-15 김영환 Semiconductor memory device having data bus line structure
GB2349968B (en) * 1995-12-29 2001-01-17 Hyundai Electronics Ind A semiconductor memory device with increased bandwidth
KR100474553B1 (en) * 1997-05-10 2005-06-27 주식회사 하이닉스반도체 Semiconductor memory device with dual data bus line sense amplifiers
CN100490014C (en) * 2002-04-27 2009-05-20 力旺电子股份有限公司 Memory and method for reading the memory
KR100654765B1 (en) 2005-09-26 2006-12-08 삼성전자주식회사 Head driving device, inkjet printer comprising the same and data processing method thereof
JP6539509B2 (en) * 2015-06-15 2019-07-03 オリンパス株式会社 Data transfer apparatus and data transfer method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0166642A2 (en) * 1984-05-30 1986-01-02 Fujitsu Limited Block-divided semiconductor memory device having divided bit lines
US5016224A (en) * 1988-09-12 1991-05-14 Kabushiki Kaisha Toshiba Semiconductor memory device
GB2246001A (en) * 1990-04-11 1992-01-15 Digital Equipment Corp Cache memory having sub-arrays of cells

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5126973A (en) * 1990-02-14 1992-06-30 Texas Instruments Incorporated Redundancy scheme for eliminating defects in a memory device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0166642A2 (en) * 1984-05-30 1986-01-02 Fujitsu Limited Block-divided semiconductor memory device having divided bit lines
US5016224A (en) * 1988-09-12 1991-05-14 Kabushiki Kaisha Toshiba Semiconductor memory device
GB2246001A (en) * 1990-04-11 1992-01-15 Digital Equipment Corp Cache memory having sub-arrays of cells

Also Published As

Publication number Publication date
GB9513937D0 (en) 1995-09-06
CN1125887A (en) 1996-07-03
KR970003337B1 (en) 1997-03-17
CN1054228C (en) 2000-07-05
GB2291233A (en) 1996-01-17

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 20130707