GB2288709A - Fault correction - Google Patents
Fault correction Download PDFInfo
- Publication number
- GB2288709A GB2288709A GB9507971A GB9507971A GB2288709A GB 2288709 A GB2288709 A GB 2288709A GB 9507971 A GB9507971 A GB 9507971A GB 9507971 A GB9507971 A GB 9507971A GB 2288709 A GB2288709 A GB 2288709A
- Authority
- GB
- United Kingdom
- Prior art keywords
- card
- nvm
- fault
- fault correction
- correction arrangement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L69/00—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
- H04L69/40—Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass for recovering from a failure of a protocol instance or entity, e.g. service redundancy protocols, protocol state redundancy or protocol service redirection
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0706—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment
- G06F11/073—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation the processing taking place on a specific hardware platform or in a specific software environment in a memory management context, e.g. virtual memory or cache management
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0766—Error or fault reporting or storing
- G06F11/0787—Storage of error reports, e.g. persistent data storage, storage using memory protection
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
- H04L41/24—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks using dedicated network management hardware
Abstract
A fault correction arrangement for shelf based cards 2 in a data transmission system is disclosed in which each card includes a non volatile memory within which faults can be recorded. The non volatile memory is isolated from the remaining card circuitry so as to allow interrogation of the NVM if the remaining card circuitry is faulty. <IMAGE>
Description
FAULT CORRECTION SYSTEM FOR SHELF BASED CARDS
This invention relates to a fault correction system for shelf based cards and is particularly applicable to systems operating with digital data transmission equipment, such as within a telecommunication system. The invention need, however, not be limited to such equipment and can be applied to any equipment which uses removable printed circuit boards. In electrical communication equipment and the like the operation of the equipment usually relies on a stack of printed circuit boards which are contained in shelves of a frame or rack. The printed circuit boards themselves are able to be slid in and out of the shelves and when in position, contacts on the boards make contact with corresponding connections at the back of the shelves. By interconnecting the various contacts the correct assembly of functions required can be achieved.
As with any equipment, faults do from time to time occur and it is necessary to be able to recognise and quickly correct for these faults. Normally once a fault has been identified, the card carrying the fault is removed and a new card is inserted. The old card can then be repaired remote from the equipment and used as a spare or reinserted in the equipment at a convenient time. In tie specification of our British patent 2245801 there is described a fault location system in which a separate data recording medium is included for recording any faults which occur.
This means that the medium can be removed from the equipment, the fault identified and the correct PCB or other faulty piece of equipment replaced.
It is an object of the present invention to simplify such a system and to give a reliable fault correction system which correctly identifies in respect of each printed circuit board the fault that occurs with it.
In accordance with the present invention, a fault correction arrangement for shelf based cards in a data transmission system is provided, in which each card includes a non volatile memory (NVM) within which faults can be recorded, the NVM being isolated from the remaining card circuitry so as to allow interrogation of the NVM if the remaining circuitry is faulty.
The NVM is to be construed as including a battery backed random access memory (RAM) or similar device, such as a smart card. The fact that the NVM is isolated from the remaining card circuitry allows independent operation from the rest of the card, and can allow interrogation of the memory to reveal the fault even in the event of severe card failure.
Preferably an independent interface is provided for connecting the NVM to an external controller, such as a control card within the shelf based system identified above.
In order that the invention may be well understood, an embodiment thereof will now be described by way of example with reference to the accompanying figure which shows schematically a shelf within a digital telecommunication network.
Referring to the figure the shelf 1 includes a plurality of equipment cards 2, only one of which is shown. Each equipment card 2 may be operative to perform any one of a number of different tasks and includes card control circuitry 3 and card function circuitry 4 interconnected by a link 5. In addition and according to the invention, a non volatile memory NVM 6 is provided within which faults occuring on the respective card 2 can be recorded. The NVM 6 is isolated from the remaining circuitry on the card to the extent that it performs no other function other than that discussed above. In a specific example the NVM 6 is an EEPROM, based on the Philips 12C bus. The memory 6 has its own independent access port 7 by which data can be read into and out of the memory from an external controller, such as a shelf control card 8.Another link 9 connects the shelf control card 8 to the card control circuitry 3 while a link 10 connects the shelf control card 8 to a management system (not shown).
In use fault data derived as a result of the equipments self diagnostic functions is passed from the card control circuitry 3 across the link 9 to the shelf control card 8. Card 8 writes fault data across the link 7 into its respective NVM 6. This data can include the time of the fault, based on the control functions real time clock.
By using the memory on the card itself, there is no risk that when the card is removed it is incorrectly indexed or tagged to show the fault since the fault can always be checked by interrogating the memory. The fault can then be quickly repaired and the card replaced.
It is preferable that the memory is used to log any previous faults which have been located in the card and corrected. This rqn tZ incorporated with the date, the identity of the repairer and any other relevant information. Furthermore the memory device in the card can be used to identify the site from which the card was removed so that it is returned to the correct location and there is no problem arising by the loss or elegibility of address labels and the like.
As shown the memory device is supplied with power common to the whole equipment.
In an alternative embodiment a local power source may be provided which would allow faults caused by failure of power supplies to be recorded in the memory.
It will be appreciated that by incorporating as much information as possible on the card as soon as a fault occurs, then the chance of inaccurate repair or the use of unsuitable cards will be minimised. Furthermore since each card carries its own history a respective card can be compared with other cards with similar histories so that any trend of faults may be analysed and recognised.
The memory 6 may also be used for the storage of card data or "inventory". This may include the build date, site of manufacture, build state, card type, serial number and the like. This allows remote interrogation from the external management system in order to establish the status of card build state etc in the field. It may also allow tracking down of a lost card based on its serial number, as well as identification of particular cards that may require a software or hardware update.
Claims (6)
1. A fault correction arrangement for shelf based cards in a data transmission system, in
which each card includes a non volatile memory (NVM) within which faults can be
recorded, the NVM being isolated from the remaining card circuitry so as to allow
interrogation of the NVM even if the remaining circuitry is faulty.
2. A fault correction arrangement according to claim 1 in which an independent link is
provided to allow the NVM to be accessed.
3. A fault correction arrangement according to any preceding claim comprising an external
controller, a card being operative to transmit data indicative of detected faults on the
respective card to the external controller, the external controller being operative to write
data indicative of the fault into the NVM.
4. A fault correction arrangement according to any preceding claim for shelf based cards
in a digital telecommunication system.
5. A fault correction arrangement according to any preceding claim in which the NVM is
connected to the cards power supply.
6. A fault correction arrangement substantially as described with reference to the
accompanying figure.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9407817A GB9407817D0 (en) | 1994-04-20 | 1994-04-20 | Fault correction system for shelf based cards |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9507971D0 GB9507971D0 (en) | 1995-06-07 |
GB2288709A true GB2288709A (en) | 1995-10-25 |
GB2288709B GB2288709B (en) | 1998-07-08 |
Family
ID=10753824
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9407817A Pending GB9407817D0 (en) | 1994-04-20 | 1994-04-20 | Fault correction system for shelf based cards |
GB9420938A Expired - Lifetime GB2290930B (en) | 1994-04-20 | 1994-10-17 | Data transmission network |
GB9507971A Expired - Fee Related GB2288709B (en) | 1994-04-20 | 1995-04-19 | Fault recording system for shelf based cards |
Family Applications Before (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9407817A Pending GB9407817D0 (en) | 1994-04-20 | 1994-04-20 | Fault correction system for shelf based cards |
GB9420938A Expired - Lifetime GB2290930B (en) | 1994-04-20 | 1994-10-17 | Data transmission network |
Country Status (2)
Country | Link |
---|---|
GB (3) | GB9407817D0 (en) |
ZA (1) | ZA952950B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2332339A (en) * | 1997-12-11 | 1999-06-16 | Northern Telecom Ltd | Monitoring switching system |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4663776A (en) * | 1982-12-08 | 1987-05-05 | Wiltron Company | System for accessing electrical circuits and relay switch thereof |
GB2245801A (en) * | 1990-06-23 | 1992-01-08 | Plessey Telecomm | Fault information system |
WO1994023546A1 (en) * | 1993-04-01 | 1994-10-13 | Telefonaktiebolaget Lm Ericsson | Cabinet and position allocation |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4513411A (en) * | 1982-09-01 | 1985-04-23 | At&T Bell Laboratories | Transmission of status report of equipment in a digital transmission network |
-
1994
- 1994-04-20 GB GB9407817A patent/GB9407817D0/en active Pending
- 1994-10-17 GB GB9420938A patent/GB2290930B/en not_active Expired - Lifetime
-
1995
- 1995-04-10 ZA ZA952950A patent/ZA952950B/en unknown
- 1995-04-19 GB GB9507971A patent/GB2288709B/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4663776A (en) * | 1982-12-08 | 1987-05-05 | Wiltron Company | System for accessing electrical circuits and relay switch thereof |
GB2245801A (en) * | 1990-06-23 | 1992-01-08 | Plessey Telecomm | Fault information system |
WO1994023546A1 (en) * | 1993-04-01 | 1994-10-13 | Telefonaktiebolaget Lm Ericsson | Cabinet and position allocation |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2332339A (en) * | 1997-12-11 | 1999-06-16 | Northern Telecom Ltd | Monitoring switching system |
FR2772539A1 (en) * | 1997-12-11 | 1999-06-18 | Northern Telecom Ltd | METHOD AND DEVICE FOR MONITORING AN OUTPUT OF A SWITCHING SYSTEM ELEMENT |
US6215998B1 (en) | 1997-12-11 | 2001-04-10 | Nortel Networks Limited | Local component-specific console |
GB2332339B (en) * | 1997-12-11 | 2002-11-06 | Northern Telecom Ltd | Monitoring and/or controlling method and system in a switching system |
Also Published As
Publication number | Publication date |
---|---|
GB2290930B (en) | 1998-08-19 |
GB2290930A (en) | 1996-01-10 |
ZA952950B (en) | 1995-12-20 |
GB2288709B (en) | 1998-07-08 |
GB9420938D0 (en) | 1994-11-30 |
GB9507971D0 (en) | 1995-06-07 |
GB9407817D0 (en) | 1994-06-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
732E | Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977) | ||
732E | Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977) | ||
PCNP | Patent ceased through non-payment of renewal fee |
Effective date: 20140419 |