GB2288089A - Adaptive threshold line receiver - Google Patents
Adaptive threshold line receiver Download PDFInfo
- Publication number
- GB2288089A GB2288089A GB9406518A GB9406518A GB2288089A GB 2288089 A GB2288089 A GB 2288089A GB 9406518 A GB9406518 A GB 9406518A GB 9406518 A GB9406518 A GB 9406518A GB 2288089 A GB2288089 A GB 2288089A
- Authority
- GB
- United Kingdom
- Prior art keywords
- voltage
- circuit
- output
- input
- detector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/06—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
- H04L25/061—Dc level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection providing hard decisions only; arrangements for tracking or suppressing unwanted low frequency components, e.g. removal of dc offset
- H04L25/062—Setting decision thresholds using feedforward techniques only
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/01—Shaping pulses
- H03K5/08—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding
- H03K5/082—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding with an adaptive threshold
- H03K5/086—Shaping pulses by limiting; by thresholding; by slicing, i.e. combined limiting and thresholding with an adaptive threshold generated by feedback
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Dc Digital Transmission (AREA)
Abstract
A digital multiplexed transmission line 11 carrying bipolar return to zero data requires a line receiver circuit 10 to convert the data into a pair of binary outputs 12, 13 carrying respectively positive and negative mark data. Transformer 15 feeds two identical adaptive threshold slicers 17, 18. Each slicer comprises a peak voltage level detector, a potential divider 26, 27 connected to the output of the peak voltage detector, and voltage comparing means arranged to compare an input voltage to the circuit with the output of the potential divider. <IMAGE>
Description
ADAPTIVE THRESHOLD LINE RECEIVER
This invention relates to an adaptive threshold detector circuit suitable for use in a telecommunications line receiver circuit which receives line signals using bipolar return to zero coding such as HDB3.
According to the present invention there is provided an adaptive threshold detector circuit comprising: a peak voltage level detector, a potential divider connected to the output of the peak voltage detector, and voltage comparing means arranged to compare an input voltage to the circuit with the output of the potential divider.
Preferably the peak voltage level detector comprises a voltage comparator having first and second inputs and an output, rectifying means connected between the output of the voltage comparator and a node, voltage storage means connected to the node, in which the first input of the voltage comparator is connected to the node, the output of the peak voltage detector is the node and the input of the peak voltage detector is the second input of the voltage comparator.
The time constant of the voltage storage element, which preferably comprises a capacitor, is selected such that the reference voltage will follow variations in average peak amplitude of the input data but will not respond quickly enough to rapid changes due to noise appearing at the input.
According to a second aspect of the present invention there is provided a telecommunications line receiver circuit for converting bipolar return to zero coded data into two binary outputs including a line transformer having a centre-tapped secondary winding with an adaptive threshold detector circuit as described above connected to each half of the secondary winding.
The present invention will be described by way of example with reference to the accompanying drawings in which:
Figure 1 is an adaptive threshold line receiver circuit in accordance with the present invention; and
Figure 2 shows corresponding input and output waveforms for the circuit of Figure 1.
Referring to Figure 1 there is shown a line receiver circuit 10 for converting bipolar return to zero (BRZ) coded data, such as HDB3 encoded data, from a digital multiplexed transmission line 11 into two binary outputs 12 and 13. The circuit is arranged so that positive mark data at an input 14 of the circuit is converted to binary data which appears at output 12, whilst negative mark data is converted to binary data which appears at output 13. Figure 2 shows example BRZ data 40 which is applied to the input 14 of the circuit 10 and the corresponding output waveforms. The BRZ data 40 comprises a series of positive marks 41 and negative marks 42. Waveforms 43 and 44 represent the corresponding binary data appearing at respective outputs 12 and 13 of the circuit 10.
Referring to Figure 1, the bipolar line data appearing at the input 14 enters the line receiver circuit 10 via a line transformer 15, which matches the input impedance of the circuit 10 to the impedance of the line 11. The line transformer 15 also provides d.c.
isolation of the circuit from the line. An earthed screen 15a between the primary and secondary windings of the line transformer 15 is provided to increase the rejection of common mode noise present on the line 11. A resistor 16 is connected across the secondary windings 15b and 15c of the line transformer to ensure that the line 11 is correctly terminated..
The secondary windings 15b, 15c are connected to respective adaptive threshold detector circuit parts 17 and 18. The circuit parts 17 and 18 can be considered to be symmetrical about a centre tap 15d of the secondary winding of the line transformer 15. Operation of each circuit part is the same with circuit part 17 responsive to positive mark data and circuit part 18 responsive to negative mark data. Only detail for the circuit part 17 is shown.
Each circuit part comprises a voltage threshold generator 17a and a threshold detector or voltage comparator 20.
The voltage threshold generator 17a comprises a voltage comparator 19, a diode 21, a capacitor 22, resistors 24 to 27 and buffers or voltage followers 23 and 28. The diode 21 and capacitor 22 are connected in series between the output 30 of the comparator 19 and centre tap 15d of the line transformer 15. The voltage appearing at a node 29 between the diode 21 and capacitor 22 is connected by means of a buffer 23 to the inverting input of the voltage comparator 19. A resistor 24 is connected between the output 30 of the voltage comparator 19 and the positive supply rail Vcc which increases the speed of charging of the capacitor 22. The diode 21 is connected such that it will pass current and charge capacitor 22 when the signal at the output 30 of the voltage comparator 19 exceeds the voltage at node 29.The capacitor will therefore charge in response to the average signal level appearing at the non-inverting input of the comparator 19 such that the voltage at the node 29 represents the average peak voltage level, V.
A threshold voltage Vthereshold is derived from the average peak voltage Vp, by means of a potential divider comprising resistors 25 (R2s), 26 (R,) and 27 (R27) serially connected between the rail V, and the earthed secondary centre tap 15d. The resistor 25 ensures that in the absence of an input to the circuit part the threshold voltage Threshold will be clamped to a selected value equal to R27
27 ) Vcc.
R25 +R26 +R27 Preferably the resistors 25, 26, 27 are co-packaged devices to guarantee a precise dividing ratio. The threshold voltage Vet shod is applied by means of a buffer or voltage follower 28 to the inverting input of the voltage comparator 20. In operation of the circuit part 17 the comparator 20 acts as a threshold detector and will change state when the voltage appearing at the secondary winding l5b exceeds the threshold voltage Threshold An advantage of the circuit for line receiver applications is that it provides a fixed terminating impedance for the line 11. Looking from the transmission line 11 into the line receiver circuit 10 the circuit appears resistive in nature. Essentially only resistor 16 is seen due to the high input impedance of voltage comparators 19 and 20. Being substantially resistive not only provides a kndwn terminating impedance for the line, it also ensures that the circuit has good linear characteristics.
Claims (9)
1. An adaptive threshold detector circuit comprising: a peak voltage level detector, a potential divider connected to the output of the peak voltage detector, and voltage comparing means arranged to compare an input voltage to the circuit with the output of the potential divider.
2. A circuit according to claim 1 in which the peak voltage level detector comprises a voltage comparator having first and second inputs and an output, rectifying means connected between the output of the voltage comparator and a node, voltage storage means connected to the node, in which the first input of the voltage. comparator is connected to the node, the output of the peak voltage detector is the node and the input of the peak voltage detector is the second input of the voltage comparator.
3. A circuit according to claim 2 in which the rectifying means comprises a diode.
4. A circuit according to claims 2 or 3 in which the voltage storage element comprises a capacitor.
5. A circuit according to any preceding claim including a first buffering means serially connected between the potential divider and the voltage comparing means.
6. A circuit according to any one of claims 2 to 5 including a second buffering means serially connected between the node and the first input of the voltage comparator.
7. An adaptive threshold detector circuit substantially as hereinbefore described, with reference to and as illustrated in the accompanying drawings.
8. A telecommunications line receiver circuit for converting bipolar return to zero coded data into two binary outputs including a line transformer having a centre-tapped secondary winding with an adaptive threshold detector circuit as claimed in any preceding claim connected to each half of the secondary winding.
9. A telecommunications line receiver circuit substantially as hereinbefore described, with reference to and as illustrated in the accompanying drawings.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9406518A GB2288089B (en) | 1994-03-31 | 1994-03-31 | Adaptive threshold line receiver |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9406518A GB2288089B (en) | 1994-03-31 | 1994-03-31 | Adaptive threshold line receiver |
Publications (3)
Publication Number | Publication Date |
---|---|
GB9406518D0 GB9406518D0 (en) | 1994-05-25 |
GB2288089A true GB2288089A (en) | 1995-10-04 |
GB2288089B GB2288089B (en) | 1998-06-24 |
Family
ID=10752904
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB9406518A Expired - Lifetime GB2288089B (en) | 1994-03-31 | 1994-03-31 | Adaptive threshold line receiver |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2288089B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5872468A (en) * | 1997-06-12 | 1999-02-16 | Northern Telecom Limited | Level detector circuit, interface and method for interpreting and processing multi-level signals |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3991379A (en) * | 1975-06-03 | 1976-11-09 | United Technologies Corporation | Logic level decoding circuit |
GB2045580A (en) * | 1979-03-22 | 1980-10-29 | Plessey Co Ltd | Compensated input circuit for use with bipolar return to zero line signals |
US4694200A (en) * | 1985-03-05 | 1987-09-15 | Thomson-Csf | Device for detecting a pulse train in noise and application to a radionavigation aid system of DME type |
GB2264010A (en) * | 1992-02-10 | 1993-08-11 | Gen Electric Co Plc | Data tracking system |
-
1994
- 1994-03-31 GB GB9406518A patent/GB2288089B/en not_active Expired - Lifetime
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3991379A (en) * | 1975-06-03 | 1976-11-09 | United Technologies Corporation | Logic level decoding circuit |
GB2045580A (en) * | 1979-03-22 | 1980-10-29 | Plessey Co Ltd | Compensated input circuit for use with bipolar return to zero line signals |
US4694200A (en) * | 1985-03-05 | 1987-09-15 | Thomson-Csf | Device for detecting a pulse train in noise and application to a radionavigation aid system of DME type |
GB2264010A (en) * | 1992-02-10 | 1993-08-11 | Gen Electric Co Plc | Data tracking system |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5872468A (en) * | 1997-06-12 | 1999-02-16 | Northern Telecom Limited | Level detector circuit, interface and method for interpreting and processing multi-level signals |
Also Published As
Publication number | Publication date |
---|---|
GB2288089B (en) | 1998-06-24 |
GB9406518D0 (en) | 1994-05-25 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
732E | Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977) | ||
732E | Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977) | ||
PE20 | Patent expired after termination of 20 years |
Expiry date: 20140330 |