GB2285171A - Lead-on-chip semiconductor device - Google Patents

Lead-on-chip semiconductor device Download PDF

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Publication number
GB2285171A
GB2285171A GB9422410A GB9422410A GB2285171A GB 2285171 A GB2285171 A GB 2285171A GB 9422410 A GB9422410 A GB 9422410A GB 9422410 A GB9422410 A GB 9422410A GB 2285171 A GB2285171 A GB 2285171A
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United Kingdom
Prior art keywords
lead
tape
semiconductor device
semiconductor chip
adhesive agent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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GB9422410A
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GB9422410D0 (en
Inventor
Tomohisa Sugiyama
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NEC Corp
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NEC Corp
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Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of GB9422410D0 publication Critical patent/GB9422410D0/en
Publication of GB2285171A publication Critical patent/GB2285171A/en
Withdrawn legal-status Critical Current

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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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  • Engineering & Computer Science (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)

Abstract

In order to fix a semiconductor chip 3 to an inner lead portion 1a of a lead 1, an insulating adhesive tape 2 is used which has a thermoplastic adhesive agent 2b on the inner lead portion side surface of a polyimide tape 2a and a thermosetting adhesive agent 2c on the semiconductor chip side surface of the polyimide tape 2a. During heat treatment when the semiconductor chip 3 is adhered and fixed to the inner lead portion 1a by means of the insulating adhesive tape 2, the organic component contained within the thermosetting adhesive agent 2c is largely prevented from escaping from the adhesive and adhering to the lead surface, thus improving the bonding performance of a metallic thin wire 4 to the lead 1. <IMAGE>

Description

LEAD-ON-CHIP SEMICONDUCTOR DEVICE FIELD OF THE INVENTION The present invention relates to a semiconductor device of a lead-on-chip (LOC) structure in which a semiconductor chip is loaded on a lead by utilizing an insulating adhesive tape and, in particular, to a semiconductor device in which the bonding performance-of a metallic thin wire, which electrically connects the lead and the semiconductor chip, is improved.
BACKGROUND OF THE INVENTION A specific embodiment of this type of semiconductor device is illustrated in Fig. 1. A plurality of leads 11 which are each made of an electrically conductive metallic plate are bent and formed into the shape of L, and to the lower surface of an inner lead portion 'lea, a semiconductor chip 13 is adhered by means of an insulating adhesive tape (polyimide adhesive tape) 12 in which a thermosetting adhesive agent 12c is applied on both surfaces of a polyimide tape 12a. Further, the inner lead potion lia and an electrode pad 13a of the semiconductor chip 13 are electrically connected by means of a metallic thin wire 14, and areas other than an outer lead portion lib of the lead is sealed with an epoxy resin 15.
Incidentally, when the semiconductor chip 13 is adhered to the inner lead portion lla by means of the insulating adhesive tape 12, the insulating adhesive tape 12 is previously adhered to the lower surface of the inner lead portion gila, and then the semiconductor chip 13 is adhered to the lower surface of the insulating adhesive tape 12. At this time, in order to harden the thermosetting adhesive agent 12c, a baking (heat) treatment is carried out at about 150 degrees Centigrade for about 1.5 hours.
However, the reliability of such a semiconductor device is low. During the baking process in which the thermosetting adhesive agent 1 2c is hardened, organic components such as carbon or the like which are contained within the thermosetting adhesive agent 12c are evolved and adhere to the Ag-plated surface of the inner lead portion 11 a, and the bonding reliability in the subsequent wire bonding process is lowered when the metallic thin wire 14 is connected to the Ag-plated surface. Therefore, when the sealing with resin is carried out in the following process, an accident such as disconnection of the metallic thin wire 14 to the Ag-plated surface or the like becomes likely to occur.
Accordingly, it is conceived that, in place of the thermosetting adhesive agent, a thermoplastic adhesive agent is used. For example, in Japanese Patent Application Laid-Open No. 3-148139, by way of example, one having a thermoplastic adhesive agent applied to the semiconductor chip side of the insulating tape is proposed. The technique disclosed in this document is intended only for easy positioning as the semiconductor chip is fixed to the lead, and, originally, is not for solving the foregoing problems. Nevertheless, since the thermosetting adhesive agent of one of the surfaces of the insulating tape is replaced by a thermoplastic adhesive agent, then it may be expected that the release of organic components during the baking process will be reduced.
However, when the inventor examined the device disclosed in the above document, he found that the amount of evolved organic component (carbon) adhering to and contaminating the Ag-plated surface of the inner lead portion is not greatly different from that of Fig. 1, and that it still does not improve the bond of the metallic thin wire to the lead.
SUMMARY OF THE INVENTION An object of the present invention is to provide an LOC semiconductor device which reduces deposition of the organic component on the lead during the manufacturing process so as to allow a reliable bonding performance to be achieved.
According to the present invention, there is provided a lead-on-chip semiconductor device in which a semiconductor chip is fixed to a lead via an insulating adhesive tape, said insulating adhesive tape including a thermoplastic adhesive agent on the surface of said insulating tape facing said lead and a thermosetting adhesive agent on the surface of said insulating tape facing said semiconductor chip.
In one embodiment of the present invention, an electrode pad of the semiconductor chip and a surface of the lead are electrically interconnected by means of a metallic thin wire.
In one embodiment of the present invention, the surface of the lead is plated with silver.
In one embodiment of the present invention, the metallic thin wire is made from gold.
In one embodiment of the present invention, the insulating tape is made of a polyimide tape.
In one embodiment of the present invention, an inner lead portion of the lead, the insulating adhesive tape, the semiconductor chip and the metallic thin wire are sealed with resin.
That is, according to the present invention, an insulating tape with which a semiconductor chip is loaded on (fixed to) a lead has a lead side surface applied with a thermoplastic adhesive agent and a semiconductor chip side surface applied with a thermosetting adhesive agent.
In the semiconductor device, an electrode pad of the semiconductor chip and an Ag-plated surface of the lead are electrically interconnected by means of a metallic thin wire, and, an inner lead portion, the insulating tape, the semiconductor chip and the metallic thin wire are sealed with resin.
Further, the insulating tape is made of a polyimide tape, one of the surfaces of which has a thermoplastic adhesive agent, and the other of which has a thermosetting adhesive agent.
By means of the present invention, when the semiconductor chip is adhered and fixed to the lead by means of the insulating adhesive tape during the heat treatment in the process of manufacturing the semiconductor device, release of the organic component contained within the thermosetting adhesive agent of the insulating tape is reduced. Thus less of the component is deposited on to the lead surface, so that the bonding of the metallic thin wire and the lead is improved and the occurrence of unsatisfactory connections is reduced.
BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a cross-sectional view of a conventional LOC semiconductor device; Fig. 2 is a cross-sectional view of a specific embodiment of the LOC semiconductor device according to the present invention; and Fig. 3 is a perspective view of part of the semiconductor device of Fig. 2.
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention is described with reference to the drawings. Fig. 2 is a cross-sectional view of a specific embodiment of the semiconductor device according to the present invention, and Fig. 3 is a perspective view of part of the semiconductor device. In Figs. 2 and 3, a lead frame having a plurality of leads 1 is arranged. The lead frame is prepared by processing a metallic plate and by plating silver (Ag) on the surface thereof. Lead 1 is formed in the shape of L in which an inner lead portion la is directed in the substantially horizontal direction and an outer lead portion ib is directed in the substantially vertical direction. An insulating adhesive tape 2 is adhered to the lower surface of the inner lead portion la and, further, to the lower surface of the insulating adhesive tape 2, the upper surface of a semiconductor chip 3 having a semiconductor element and electrode pad is adhered and fixed.
Further, the inner lead portion la and the electrode pad 3a of the semiconductor chip 3 are electrically interconnected by means of a metallic thin wire, which is made, for example, from gold. In addition, the entire portion other than the foregoing outer lead portion lb is sealed with epoxy resin 5 to provide a plastic package semiconductor device.
The foregoing insulating adhesive tape 2 is mainly formed with a polyimide tape 2a, and a thermoplastic adhesive agent 2b, e.g. a polyester adhesive agent, is applied on the inner lead portion side, i.e. the upper surface, of the tape 2a, and a thermosetting adhesive agent 2c, e.g. an epoxy adhesive agent or a polyimide adhesive agent, is applied on the semiconductor chip side, i.e. the lower surface, of the tape 2a. By heat treatment, the insulating adhesive tape 2 is adhered to the inner lead portion la and the semiconductor chip 3, respectively, and the semiconductor chip 3 is adhered to the inner lead portion la via the insulatingadhesive tape 2.
In the semiconductor device of Fig. 1 with the insulating adhesive tape 2, in which the thermoplastic adhesive agent 2b was applied to the inner lead portion side and the thermosetting adhesive agent 2c was applied to the semiconductor chip side, according to an experiment conducted by the inventor, it could be verified that the amount of organic component (carbon) which was adhered to the Ag-plated surface of the inner lead portion la during the heat treatment was reduced.
That is, when the surface analysis (AES: Auger Electron Spectroscopy) was conducted to one disclosed in the foregoing Japanese Patent Application Laid-Open document and one with the above embodiment of the present invention using as the samples, in the latter, the peak strength ratio C/Ag between C (carbon) and Ag of the Ag-plated surface was 0.5. In contrast, in the former, the ratio C/Ag was 2.2. Thus, it could be verified that the amount of carbon adhering to the Ag-plated surface was by far reduced for the latter case.
Although the reason is not clear, in the inventor's opinion, i is considered. that release of the oa- nic component was suppressed during the heat treatment Gf a device of the present invention because the thermosetting adhesive agent 2c is sandwiched between and confined by the polyimide tape 2a of the insulating adhesive tape 2 and the surface of the semiconductor chip 3. On the other hand, with the device disclosed in the Japanese Patent Application Laia-Open document, it is considered that, since the thermosetting adhesive agent side, ie. the upper surface or the lead side, of the tape, was exposed, the organic component is evolved therefrom and adheres to the Ag-plated surface during the heat treatment.
Therefore, in the embodiment of the present invention, the reliability when the metallic thin wire 4 is bonded to the Ag-plated surface of the inner lead portion 1a is improved and, according to the result of experiment which was conducted for a predetermined number of samples, the percentage of defects can be reduced from 0.2% for the conventional device (desc;-ibed in Fig. 1 or in the Japanese Patent Application Laid-Open document) to substantially zero, and the occurrence of the defective articles can reliably be prevented.
As described above, since the insulating adhesive tape according to the present invention, which is used for the loading of the semiconductor chip on the lead, has a thermoplastic adhesive agent on the surface at the lead side and a thermosetting adhesive agent on the surface at the semiconductor chip side, release of the organic component from the thermosetting adhesive agent can be largely suppressed during the heat treatment when the semiconductor chip is loaded on the lead, preventing the organic component from adhering to the lead surface, and the bonding performance of the metallic thin wire can be improved to improve reliability of the semiconductor device.
Each feature disclosed in this specification (which term includes the claims) and/or shown in the drawings may be incorporated in the invention independently of other disclosed and/or illustrated features.
The appended abstract as filed herewith is included in the specification by reference.

Claims (7)

CLAIMS:
1. A lead-on-chip semiconductor device in which a semiconductor chip is fixed to a lead via an insulating adhesive tape, said insulating adhesive tape including a thermoplastic adhesive agent on the surface of said insulating tape facing said lead and a thermosetting adhesive agent on the surface of said insulating tape facing said semiconductor chip.
2. A semiconductor device as set forth in Claim 1, wherein an electrode pad of said semiconductor chip and a surface of said lead are electrically interconnected by means of a metallic thin wire.
3. A semiconductor device as set forth in Claim 2, wherein said surface of the lead is plated with silver.
4. A semiconductor device as set forth in Claim 2 or 3, wherein said metallic thin wire is made from gold.
5. A semiconductor device as set forth in any preceding claim, wherein said insulating tape is made of a polyimide tape.
6. A semiconductor device as set forth in any preceding claim, wherein an inner lead portion of said lead, said insulating adhesive tape, and said semiconductor chip are sealed with resin.
7. A lead-on-chip semiconductor device substantially as herein described with reference to Figures 2 and 3 of the accompanying drawings.
GB9422410A 1993-12-24 1994-11-07 Lead-on-chip semiconductor device Withdrawn GB2285171A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5348277A JP2546530B2 (en) 1993-12-24 1993-12-24 LOC structure semiconductor device

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GB9422410D0 GB9422410D0 (en) 1995-01-04
GB2285171A true GB2285171A (en) 1995-06-28

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KR (1) KR950021289A (en)
GB (1) GB2285171A (en)

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Publication number Priority date Publication date Assignee Title
KR20010096115A (en) * 2000-04-17 2001-11-07 이형도 Deflection yoke

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2214711A (en) * 1988-01-30 1989-09-06 Taiyo Yuden Kk Attaching lead wires to a photovoltaic cell
US5252853A (en) * 1991-09-19 1993-10-12 Mitsubishi Denki Kabushiki Kaisha Packaged semiconductor device having tab tape and particular power distribution lead structure

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2214711A (en) * 1988-01-30 1989-09-06 Taiyo Yuden Kk Attaching lead wires to a photovoltaic cell
US5252853A (en) * 1991-09-19 1993-10-12 Mitsubishi Denki Kabushiki Kaisha Packaged semiconductor device having tab tape and particular power distribution lead structure

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JPH07193092A (en) 1995-07-28
KR950021289A (en) 1995-07-26
GB9422410D0 (en) 1995-01-04
JP2546530B2 (en) 1996-10-23

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