GB2275820A - Optoelectronic device - Google Patents

Abstract

An indirect band gap semiconductor single crystal layer (3) is etched to form columns (7) each containing a pn junction, sufficiently small ( SIMILAR 20 - 40nm diameter) to act as quantum confinement regions for electrons, with the result that the material exhibits a direct band gap. The material can be used to produce electro luminescence or as a photodetector. <IMAGE>

Description

Optoelectronic Device DESCRIPTION This invention relates to an optoelectronic device particularly, but not exclusively formed in silicon semiconductor material.

Silicon technology is widely used in electronic devices but has an indirect band gap and as a result is not particularly useful for optoelectronics.

For an indirect band gap semiconductor, an electron transferring from the top of the valence band to the bottom of the conduction band or vice versa changes both its energy and momentum. In contrast, for direct band gap semiconductor material, the electron changes only its energy and not its momentum. Examples of a direct band gap semiconductor are GaAs, InSb, InP, CdS and others. Examples of indirect band gap semiconductor materials are Ge and Si. Thus, for an indirect band gap material, when a photon, which is a particle of low momentum, is incident upon the material, it cannot generate an electron-hole pair unless other quantum particles such as phonons participate to contribute the necessary momentum.

Similarly, radiative recombination (i.e. direct electron-hole recombination with photon emission) is an unlikely process in indirect semiconductors.

In contrast, with semiconductor material having a direct band gap, an incident photon can produce an electron-hole pair so that the material can be used for light emitting devices and detectors.

Photoluminescence has been shown in porous silicon (with an indirect band gap) where microcrystallites of silicon exist in a silicon dioxide matrix. The origin of this effect is disputed but one explanation is that the microcrystallites are sufficiently small that quantum charge carrier confinement occurs, dominated by the geometry of the structure rather than the material itself.

It is an object of the present invention to provide an optoelectronic device in which regions of semiconductor material of indirect band gap are formed from a single crystal to be of sufficiently small size to exhibit direct band gap characteristics.

In accordance with the invention from a first aspect there is provided an optoelectronic device comprising single crystal indirect band gap semiconductor material formed with a region sufficiently small to exhibit a direct band gap, and electrical connection means for the region to apply a voltage thereto to generate photons by direct recombination of carriers of opposite conductivity type.

The invention also has application to a device for use as a detector and in this aspect, the invention provides an optoelectronic device comprising a single crystal indirect band gap semiconductor material formed with a region sufficiently small to exhibit a direct band gap, an electrical connection means for the region for producing an electrical signal in response to pairs of charge carriers of opposite conductivity type being produced directly by photons incident on the region.

The invention also includes a method of forming an optoelectronic device comprising forming single crystal indirect band gap semiconductor material into a plurality of regions sufficiently small to exhibit a direct band gap, and forming electrical connection means thereto whereby to permit a voltage to be applied to generate photons by direct recombination of carriers of opposite conductivity type or to produce a signal in response to pairs of charge carriers of opposite conductivity type being formed by incident photons.

The regions can be formed by selectively etching a layer of single crystal semiconductor material, typically formed on a layer of insulator.

Thus, the invention has particular application to silicon semiconductor material wherein the single crystal layer is formed on a layer of silicon dioxide.

The semiconductor regions may be formed by lithography and selective etching.

The regions may be also formed as upstanding pillars produced by an applied particulate metallic pattern, which is used as a mask for selective etching.

In order that the invention may be more fully understood, embodiments thereof will now be described by way of example with reference to the accompanying drawings, in which: Figure 1 is a schematic sectional view of a silicon-oninsulator substrate used as a starting material to form a device according to the invention; Figures 2 to 6 inclusive illustrate process steps for forming the device; Figure 7 is an electron micrograph of a pillar structure formed generally in accordance with the configuration shown in Figure 5; Figure 8 is a schematic perspective view of an alternative lateral configuration of regions formed by lithography; Figure 9 is a plan view corresponding to Figure 8; and Figure 10 is a schematic sectional view of a three dimensional device in accordance with the invention.

Referring now to Figure 1, this shows the starting materials for formation of a device in accordance with the invention. A silicon substrate 1 is provided with a silicon dioxide insulating layer 2 and an overlying single crystal silicon layer 3. This so-called silicon-on-insulator (SOI) structure is the subject of a review given in Microelectronic Engineering 8 (December 1988).

The single crystal silicon layer 3 is, by means of the process described hereinafter, formed into a plurality of regions which exhibit quantum confinement. In order to observe such confinement, the regions are typically smaller than ~ 100A.

The first stage, shown in Figure 2, is to thin the silicon layer 3, which may be done by oxidation or etching. As shown in Figure 3, at least one implant is provided in the layer 3 so as to provide overlying layers of opposite conductivity type 3a, 3b whereby to form a laterally extending pn junction 4.

Referring to Figure 4, the silicon layer 3 is patterned in order to form the individual quantum confinement regions and in this example, an array of metallic particles 5 is deposited on the surface of the silicon layer 3. The metallic particles can be deposited by sputtering or by the application of a continuous metallic layer which is then partially evaporated. It is found that under carefully controlled conditions of evaporation, an array of metallic globules 5 can be formed on the surface of the silicon, [Green et Appl.

Phys. Lett. 62(3) 264 (1993)] which can be used as a mask pattern as will now be described.

Referring to Figure 5, the silicon layer 3 is etched selectively with an etchant. The silicon under the deposited metallic particles 5 remains substantially unetched, so as to form an array of generally cylindrical columns 7 upstanding from the insulating layer 2.

An electron micrograph of an array of such columns 7 is shown in Figure 7.

Referring to Figure 6, a planarisation layer 8, typically of silicon dioxide is formed around the columns 7 to restore a continuous planar surface to the device. A substantially transparent metallic layer 9 is applied, for example by vapor deposition onto the surface of the substrate to form an electrical connection with the n-type regions 3b of each column 7.

The p-type regions of the columns are connected together by the remaining transversely extending portion of the layer 3, which is connected to a base contact 10 which may be formed of any suitable conductive material, for example a metal or conductive polysilicon.

Thus, the electrodes 9, 10 allow a voltage to be applied across the pn junction of each column 7. As previously discussed, the silicon semiconductor material which forms the column 7 has an indirect band gap. However since the columns 7 are typically of the order of 20-40nm in general diameter, they constitute quantum confinement regions for charge carriers with the result that the material in the columns exhibits a direct band gap. Accordingly, the columns can be used to produce luminescence and also as photodetectors.

Thus, in use, to produce electroluminescence, a voltage is applied to the electrodes 9, 10, which induces recombination of electron-hole pairs in each column 7 at the pn junctions therein with a consequent direct photon emission. Alternatively, with a voltage bias applied to the electrodes 9, 10, the columns can be used as photodectors, for detecting a current produced in response to the formation of electron-hole pairs by incident photons.

In an alternative embodiment shown schematically in Figures 8 and 9, the quantum confinement regions are produced by lithography as elongate strips 11 arranged in parallel across the surface of the oxide layer 2.

In this case, the pn junctions can be formed laterally by appropriate doping of p and n type regions lla, llb.

The strips 11 can be defined by means of electron beam lithography with a system such as a Nanowriter, which can produce lines of around 50-100 A width. The region around the written lines is then etched by a suitable wet or dry etch in a conventional manner to produce the configuration shown in Figures 8 and 9. Transverse elongate ohmic contacts 12, 13 are provided on the substrate to allow appropriate voltages to be applied simultaneously to the strips 11 so as to provide electroluminescence or for use as a photodetector as previously described.

Many modifications and variations will be apparent to those skilled in the art. For example, the diameter of the column 7 and/or the width of the strips 11 can be modified by oxidation and/or etching, in order to reduce their size. Also, a rectangular grating of lines can be written with the Nanowriter onto the single crystal silicon 3 in order to define an array of upstanding generally rectangular columns, produced by selective etching. The grating may be of a regular size or may include different strip widths in order to give different size columns which, in turn will provide different emission wavelengths when used for photoluminescence. In another embodiment, a plurality of strips widths are used within one grating for emitting, for example, white light.

Figure 10 shows a further modification in which a multiple layer device is provided.

As explained in Microelectronic Engineering supra multiple layers of single crystal silicon separated by silicon dioxide layers can be grown by zone melt recrystallisation using electron beams. Reference is directed to the paper entitled "3-D Technologies - Y.

Akasaka pp 219-233, Microelectronic Engineering supra.

If such growth is performed sequentially, with each successive regrown layer being patterned into optoelectronic devices as described hereinbefore, a three dimensional structure can be formed. Thus, referring to Figure 10, the device consists of a substrate 1 with a first overlying layer of silicon dioxide 2 onto which silicon quantum confinement regions 14 are produced in accordance with either of the methods previously described. Tungsten silicide electrical interconnections may be provided between the regions 14.

Then, in the manner described by Akasaka, a further overlying silicon dioxide layer 16 is formed by zone melt recrystallisation using electron beams. A further confinement region 17, for use as optical devices can be formed on the layer 16. Further oxide layers 18, 19 and 20 are shown in Figure 10 which similarly contain further quantum confinement regions for use as optical devices. A vertically extending tungsten silicide electrical connection 21 is shown between the layers. Optical isolation and electrical interconnection can also be provided by a region such as 22 formed of silicon or silicide, produced by selective etching of the layers and subsequent deposition. Integrated electronics 23 may be formed in the substrate 1 for electrical connection to the quantum confinement regions such as 14, 17.

The region 22 may be formed as a reflective barrier to allow selectivity and interconnection.

Claims (22)

1. An optoelectronic device comprising singlE crystal indirect band gap semiconductor material formec with a region sufficiently small to exhibit a direct band gap, and electrical connection means for ths region to apply a voltage thereto to generate photons by direct recombination of carriers of opposite conductivity type.

2. An optoelectronic device comprising singlE crystal indirect band gap semiconductor material formec with a region sufficiently small to exhibit a direct band gap, and electrical connection means for the region for producing an electrical signal in response to pairs of charge carriers of opposite conductivit) type being produced directly by photons incident on the region.

3. A device according to claim 1 or 2, including a plurality of said regions, said connection means being coupled thereto.

4. A device according to claim 3, wherein the semiconductor material includes in the or each of the regions, material of opposite conductivity type to form a junction, said electrical connection means being adapted to apply a voltage to the junctions.

5. A device according to any preceding claim including a substrate, an insulating layer on the substrate, and semiconductor material formed into the or each of said regions on the insulating layer.

6. A device according to claim 5 wherein the or each of said regions have been formed by etching.

7. A device according to claim 5 or 6 wherein said semiconductor material is formed of silicon and said insulating layer comprises silicon oxide.

8. A device according to claim 5, 6 or 7 wherein the or each of said regions comprises a pillar of semiconductor material upstanding from the insulating layer.

9. A device according to claim 6 wherein the or each of said regions comprises a strip of semiconductor extending longitudinally across the substrate.

10. ss device according to claim 9 wherein the or each said strip has been formed by lithography and selective etching.

11. A device according to any preceding claim including a further insulating layer overlying the or each of the regions of semiconductor material, and further said regions of semiconductor material formed on said further insulating layer.

12. An optoelectronic device substantially as hereinbefore described with reference to the accompanying drawings.

13. A method of forming an optoelectronic device comprising forming single crystal indirect band gap semiconductor material with a plurality of regions sufficiently small to exhibit a direct band gap, and forming electrical connection means thereto whereby to permit a voltage to be applied thereto so as to generate photons by direct recombination of carriers of opposite conductivity type or to produce a signal in response to pairs of charge carriers of opposite conductivity type being formed by incident photons.

14. A method according to claim 13 including forming said regions by selectively etching a layer of single crystal semiconductor formed on a layer of insulator.

15. A method according to claim 14 wherein said single crystal semiconductor material comprises silicon and said insulator comprises a silicon oxide.

16. A method according to claim 14 or 15 including forming a particulate metallic layer on said single crystal semiconductor material and selectively etching the material in regions uncovered by the metallic layer.

17. A method according to claim 15 including applying a continuous metallic layer to the single crystal semiconductor material, and selectively evaporating said layer to form said particulate metallic layer.

18. A method according to claim 15 wherein said particulate metallic layer is sputtered onto the semiconductor material.

19. A method according to claim 14 including writing said regions as elongate strips on the surface of the single crystal semiconductor material with an electron beam and selectively etching regions between said strips.

20. A method according to any one of claims 13 to 19 including selectively doping said single crystal semiconductor material to form pn junctions in each of said regions.

21. A method according to any of claims 13 to 19 including applying a metallic layer to form an electrical connection with said regions.

22. A method according of forming an optoelectronic device substantially as hereinbefore described with reference to the accompanying drawings.