GB2273426A

GB2273426A - Programmable character size

Info

Publication number: GB2273426A
Application number: GB9320692A
Authority: GB
Inventors: Benjamin Liu; Johnny Tsai
Original assignee: Motorola Inc
Current assignee: Motorola Solutions Inc
Priority date: 1992-12-14
Filing date: 1993-10-07
Publication date: 1994-06-15
Also published as: GB9320692D0

Abstract

A method for varying the height of displayed characters in a programmable way. The method comprises providing a predetermined character font organized into a plurality of rows of character pixels which together make up a desired character. Displaying each row of character pixels in a predetermined order. Selectively repeating the display of desired rows of character pixels in such a way as to increase the height of the character by adding extra rows of character pixels to the character. <IMAGE>

Description

PROGRAMMABLE CHARACTER SIZE Background of the Invention The present invention relates, in general, to the display of character fonts on computer display screens, and more particularly to a method for varying the size of the characters in a programmable way.

A computer display typically stores character shapes in a fixed size dot matrix such as 8 x 10 or 10 x 16. Using fixed size character fonts for computer screen displays which have a fixed resolution is adequate, but falls short of the needs for a multiple resolution computer display.

Typically the display resolution is selected by altering the horizontal frequency of the display and adjusting the vertical frequency to match. For brevity only the horizontal component or number of lines will be described.

The number of lines displayed can typically vary from 262 to 1024 depending on the resolution selected. This wide variation makes it difficult to use a fixed size character font for such a computer screen display. For example, a 10 x 16 character font may be adequate for low horizontal frequency, but when a higher horizontal frequency is used the characters are too small to be read. According to the prior art, character height is adjusted by dividing the horizontal frequency by an integer. This lowered frequency is then applied to the line counter of the character ROM with the result that each line in the character is displayed 2, 3, or 4 times. This results in a character which is 2, 3, or 4 times the height of the original character. A size adjustment which is this crude still results in wide variation of the actual character height displayed, however.

There is a need for a method to alter the character height on a computer display such that the characters may be displayed at a constant height regardless of the resolution of the computer display. This mustebe accomplished-without using a large number of character fonts and without causing significant distortion to the original character shape.

Summary of the Invention The present invention provides a method for varying the height of displayed characters in a programmable way.

The method comprises providing a predetermined character font organized into a plurality of rows of character pixels which together make up a desired character. Displaying each row of character pixels in a predetermined order.

Selectively repeating the display of desired rows of character pixels in such a way as to increase the height of the character by adding extra rows of character pixels to the character.

Brief Description of the Drawings FIG. 1 shows a schematic view of the architecture of a character display as a preferred embodiment in accordance with the present invention.

FIG. 2 shows the character display of FIG. 1 where the character display has a height of 16 lines.

FIG. 3 shows the character display of FIG. 1 where the character display has a height of 22 lines.

FIG. 4 shows the character display of FIG. 1 where the character display has a height of 25 lines.

FIG. 5 shows the character display of FIG. 1 where the character display has a height of 34 lines.

Detailed Description of the Drawings FIG. 1 shows a schematic view of the architecture of a character display as a preferred embodiment in accordance with the present invention. For brevity, the components and operation required for just the horizontal portion of the display are shown, however a similar circuit is typically used to adjust character width. A clock 11 is coupled to an AND gate 12. AND gate 12 drives a programmable divider 13.

In this example, programmable divider 13 is a two-bit divider which can divide by 1, 2, or 3. The number of bits in programmable divider 13 may be adjusted to suit the range of character size adjustment desired. The output of programmable divider 13 is coupled to the input of a line counter 14. In this example line counter 14 is a four-bit binary counter, having a separate output for each bit. The number of bits in line counter 14 may be adjusted to suit the range of character size adjustment desired. The four outputs from line counter 14 are coupled to a ROM (read only memory) 16 and a Binary Rate Multiplier (BRM) logic 18. ROM 16 serves as a character font ROM to define the shape of the character being displayed on a character display 17.

Typically ROM 16 is accessed as a matrix with both rows and columns accessed in synchronization with the rows and columns of the character being displayed. BRM logic 18 comprises binary rate multiplier logic which outputs a clock inhibit signal 21. Clock inhibit signal 21 is coupled to AND gate 12 and serves to inhibit clock 11 from being applied to programmable divider 13. Clock inhibit signal 21 is maintained for a single cycle of clock 11. When the clock is thus inhibited, line counter 14 maintains its previous value causing one row of pixels from the character to be displayed an extra time. A row of pixels may be repeated as often as required by multiple triggering of clock inhibit signal 21. A character height control register 19 contains a five-bit binary number which determines the height of the character being displayed.

Bits 5 and 4 of character height control register 19 are coupled to programmable divider 13, thus determining the divide ratio of programmable divider 13. Bits 3, 2, 1, and 0 of character height control register 19 are coupled to BRM logic 18, and determine when clock inhibit signal 21 is triggered.

The character height logic functions as follows: Looking first at the operation of programmable divider 13.

If bits 4 and 5 of character height control register 19 contain 0 and 1 respectively, a value of 1, then programmable divider 13 will divide by 1 producing a character height between 16 lines and 31 lines. If bits 5 and 4 of character height control register 19 contain 1 and O respectively, a value of 2, then programmable divider 13 will divide by 2 producing a character height between 32 lines and 47 lines. If both bits 4 and 5 of character height control register 19 contain 1, a value of 3, programmable divider 13 will divide by 3, producing a character height between 48 lines and 63 lines. Thus programmable divider 13 has the effect of repeating each row of pixels once, twice, or three times according to the values of bits 4 and 5 of character height control register 19.

BRM logic 18 acts to trigger clock inhibit signal 21 at specific times. When clock inhibit signal 21 is triggered it causes AND gate 12 to inhibit one cycle of clock 11 from reaching programmable divider 13. When bit 0 of character height control register 19 is a 1, then clock inhibit signal 21 is triggered when bit 3 of line counter 14 changes from a 0 to a 1 value. This causes the row of pixels at row number 8 of the character to be displayed twice, adding one row to the character height. When bit 1 of character height control register 19 is a 1, then clock inhibit signal 21 is triggered when bit 2 of line counter 14 changes from a 0 to a 1 value. This causes pixel rows 4 and 12 of the character font to be displayed twice each, adding two rows to the character height. If bit 2 of character height control register 19, is a 1, then clock inhibit signal 21 is triggered when bit 1 of line counter 14 changes from a 0 value to a 1. This causes pixel rows 2, 6, 10, and 14 of the character to be displayed twice, adding four rows to the character height. If bit 3 of character height control register 19 is a 1, then clock inhibit signal 21 is triggered when bit 0 of line counter 14 changes from a 0 to a 1. This causes pixel rows 1, 3, 5, 7, 8, 11, 13, and 15 to be displayed twice each. Accordingly 8 more lines are displayed when this bit is set to a 1.

The preferred embodiment in accordance with the present invention provides a programmable character height wherein the characters may be adjusted in height from 16 lines to 63 lines without causing noticeable distortion to the original character shape. By synchronizing character height control register 19 with a register which determines the horizontal resolution of character display 17, a character font can be produced which maintains essentially the same size while the resolution of character display 17 varies over a wide range.

FIG. 2 shows character display 17 (FIG. 1) in more detail when the character display has a height of 16 lines.

Character height control register 19 contains the value of 16 or binary "010000". In this example, the character height is the default character size stored in ROM 16 (FIG. 1), 10 pixels and 16 lines.

FIG. 3 shows character display 17 (FIG. 1) when the character display has a height of 22 lines. Character height control register 19 contains the value of 22 or binary "010110". Character height control register 19 bits 1 and 2 are set to a 1 so 6 more lines are displayed at rows 2, 4, 6, 10, 12, and 14. This produces a character display size of 10 pixels and 22 lines.

FIG. 4 shows character display 17 (FIG. 1) when the character display has a height of 25 lines. Character height control register 19 contains the value of 25 or binary "011001". In this example bits 0 and 3 of character height control register 19 are set to a 1, so 9 more lines are displayed. Rows 1, 3, 5, 7, 8, 9, 11, 13, and 15 are displayed twice. This gives a character display size of 10 pixels and 25 lines.

FIG. 5 shows character display 17 (FIG.1) when the character display has a height of 34 lines. Character height control register 19 contains the value of 34 or binary "100010". In this example bits 5 and 4 of character height control register 19 contain the values of 1 and 0 respectively causing programmable divider 13 to divide the frequency of clock 11 by 2. This causes each row of pixels to be displayed twice and the size of the character to be doubled. In addition bit 1 of character height control register 19 is set to a 1 so rows 4 and 12 are each displayed one extra time. Accordingly rows 4 and 12 are displayed three times, while all other rows are displayed twice. This gives a character display size of 10 pixels wide and 34 lines high.

An alternative embodiment in accordance with the present invention provides a phase locked loop frequency divider which varies the character width by altering the clock frequency of the pixel output in a manner suitable to certain types of displays. Other alternative embodiments include fonts having different basic font sizes such as 5 pixels with 7 rows and 8 pixels with 10 rows.

By now it should be clear that the present invention provides a method to alter the height of characters displayed on a computer display. The adjustment is such that the character is be displayed at a constant size regardless of the resolution of the computer display. This is accomplished using only a single character font and causing only the minimum possible distortion to the original character shape.

Claims

1. A method for generating a character display, comprising: providing a predetermined character font comprising a plurality of pixels, organized into a plurality of rows of character pixels which make up a desired character; displaying each row of character pixels in a predetermined order; and selectively repeating the display of a desired row of character pixels in such a way as to increase the height of the character by adding an extra row of character pixels to the character.

2. The method for generating a character display of claim 1 wherein the step of selectively repeating the display of a desired row of character pixels is itself repeated for a plurality of rows of character pixels.

3. The method for generating a character display of claim 1, further comprising: repeating the display of each row of character pixels which form the character.

4. The method for generating a character display of claim 1, further comprising: selectively repeating the display of a desired character pixel within each row in such a way as to increase the width of the character.

5. A character display, comprising: a read only memory which is sequentially accessed both by a plurality of lines and and by a plurality of pixels within each line in such a way as to determine a displayed brightness level for each of a plurality of displayed pixels which make up the character display; a line counter which determines the line of the character display to be displayed at any instant of time; a line clock coupled to the line counter and which increments the line counter in step with each line of the character; a character height control register which determines the height of the character display; and a first binary rate multiplier, controlled by the character height control register, which selectively interrupts application of the line clock to the line counter.

6. The character display of claim 5 further comprising: a front end divider, coupled between the line clock and the line counter, which causes the line frequency to be divided by a desired ratio before being coupled applied to the line counter, the desired ratio being selected by the character height control register.

7. The character display of claim 5 wherein the contents of the character height control register are altered in proportion to a desired line resolution of a computer display in such a way as to produce a substantially constant height for the character display regardless of desired line resolution of the computer display.

8. The character display of claim 5 further comprising: a phase locked loop frequency divider coupled between a vertical pixel clock and a pixel counter which serves to adjust the width of the character display by adjusting the vertical frequency of the pixel counter.

9. The character display of claim 5 further comprising: a pixel counter which determines the pixel of the character display to be displayed at any instant; a pixel clock coupled to the pixel counter and which increments the pixel counter in step with each pixel of the character; a character width control register which determines the width of the character display; and a second binary rate multiplier, controlled by the character width control register, which selectively interrupts application of the pixel clock to the pixel counter.

10. The character display of claim 9 wherein the character width control register and the character height control register are synchronized to the resolution of a computer display in such as way as to ensure that the character display remains a substantially constant size regardless of any desired alteration in resolution of the computer display.

11. A character display, comprising: a read only memory which is sequentially accessed both by a plurality of lines and and by a plurality of pixels within each line in such a way as to determine a displayed brightness level for each of a plurality of displayed pixels which make up the character display; a frequency divider coupled between a pixel clock and a pixel counter which serves to adjust the width of the character display; a line counter which determines the line of the character display to be displayed at any instant of time; a front end divider, coupled to the line counter, which causes the clock frequency applied to the line counter to be divided by a desired ratio compared to the frequency of the line clock, the desired ratio being selected by the character height control register; ; a line clock coupled to the front end divider which toggles in step with each line of the character display; a character height control register which determines the height of the character display; and a binary rate multiplier, controlled by the character height control register, which selectively interrupts application of the line clock-to the line counter.