GB2272820A - Improvements in or relating to asynchronous transfer mode communication systems - Google Patents
Improvements in or relating to asynchronous transfer mode communication systems Download PDFInfo
- Publication number
- GB2272820A GB2272820A GB9322744A GB9322744A GB2272820A GB 2272820 A GB2272820 A GB 2272820A GB 9322744 A GB9322744 A GB 9322744A GB 9322744 A GB9322744 A GB 9322744A GB 2272820 A GB2272820 A GB 2272820A
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- data
- bandwidth
- output port
- request
- port server
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/50—Overload detection or protection within a single switching element
- H04L49/501—Overload detection
- H04L49/503—Policing
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L12/5602—Bandwidth control in ATM Networks, e.g. leaky bucket
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/10—Packet switching elements characterised by the switching fabric construction
- H04L49/104—Asynchronous transfer mode [ATM] switching fabrics
- H04L49/105—ATM switching elements
- H04L49/106—ATM switching elements using space switching, e.g. crossbar or matrix
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/15—Interconnection of switching modules
- H04L49/1553—Interconnection of ATM switching modules, e.g. ATM switching fabrics
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3018—Input queuing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
- H04L49/3081—ATM peripheral units, e.g. policing, insertion or extraction
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/50—Overload detection or protection within a single switching element
- H04L49/505—Corrective measures
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04Q—SELECTING
- H04Q11/00—Selecting arrangements for multiplex systems
- H04Q11/04—Selecting arrangements for multiplex systems for time-division multiplexing
- H04Q11/0428—Integrated services digital network, i.e. systems for transmission of different types of digitised signals, e.g. speech, data, telecentral, television signals
- H04Q11/0478—Provisions for broadband connections
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5629—Admission control
- H04L2012/5631—Resource management and allocation
- H04L2012/5632—Bandwidth allocation
- H04L2012/5635—Backpressure, e.g. for ABR
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5638—Services, e.g. multimedia, GOS, QOS
- H04L2012/5646—Cell characteristics, e.g. loss, delay, jitter, sequence integrity
- H04L2012/5651—Priority, marking, classes
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
- H04L2012/5681—Buffer or queue management
- H04L2012/5682—Threshold; Watermark
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/54—Store-and-forward switching systems
- H04L12/56—Packet switching systems
- H04L12/5601—Transfer mode dependent, e.g. ATM
- H04L2012/5678—Traffic aspects, e.g. arbitration, load balancing, smoothing, buffer management
- H04L2012/5681—Buffer or queue management
- H04L2012/5683—Buffer or queue management for avoiding head of line blocking
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/20—Support for services
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/30—Peripheral units, e.g. input or output ports
Abstract
An ATM communication system comprising an ATM switch 1 having a plurality of input ports and a plurality of output ports, each of the said input ports being fed from an input port server 2, 3,4, and each of the said output ports being arranged to feed an output port server 8. The input port servers each have a plurality of buffer stores A, B...Z, one for each of the output ports to which said output port data is transmitted through the switch. Each buffer store in the input port servers is arranged to interrogate the output port server with which it communicates by means of a bandwidth request before the transmission of data, thereby to determine whether output port server data handling capacity is available, whereby ATM switch operation during periods of peak traffic is facilitated. The system includes a queuing arrangement for bandwidth requests received during periods when there is no available bandwidth capacity, the arrangement being such that requests are released in a predetermined order when capacity becomes available. <IMAGE>
Description
IMPROVEMENTS IN OR RELATING TO ASYNCHRONOUS
TRANSFER MODE COMMUNICATION SYSTEMS
This invention relates to asynchronous transfer mode (ATM) communication systems.
More especially the invention relates to apparatus operative to facilitate ATM switch operation during periods of peak data traffic, and to the problem of efficiently allocating bandwidth resources in a situation where a multiplexed stream of ATM cells are to be individually switched to different ports.
The above problem has already been addressed and
discussed in our co-pending patent application number
GB9212447.8, to which attention is hereby directed and is further
discussed hereafter.
ATM data traffic is predominantly bursty data traffic. By its
nature, bursty traffic requires high bandwidths for a part of the
time and little or no bandwidth for the rest of the time. In order
to efficiently use available bandwidth it is necessary to allocate
the bandwidth using the mean bandwidth requirement of each
data source and not the peak bandwidth. Thus it will be
appreciated that if mean bandwidth allocation is used, the total
peak bandwidth may thus be greater than the bandwidth
available. Thus in operation of an ATM switch, a problem occurs
when a number of data sources burst at the same time causing a
peak overload condition to occur inside an ATM
switch/multiplexer. If not controlled or limited this condition will cause data overflow in one or many of the switch/multiplexer internal data buffers, and this will result in data being lost.
Data destined for a particular output port will enter a switch from many different input ports. The total instantaneous data rate across a switch may be greater than an output port can sustain, and therefore buffering is required. However, even with the provision of buffering, eventual loss of data due to buffer overflow may occur. To reduce this probability to an operationally acceptable level by simply increasing peak capability, results in a low utilisation of the switch for much of the time, which is clearly unacceptable. A dynamic bandwidth allocation protocol, as described hereafter, provides a method of allocating bandwidth by sending requests for bandwidth to a designated output port and sending data thereafter only when bandwidth has been allocated as indicated by a return acknowledgement message.
In ATM systems, request messages for increases in bandwidth are sent by an input port server to an output port bandwidth allocation mechanism for initial processing. When a switch is heavily loaded, bandwidth is only available from an output port when a bandwidth cleardown message arrives which serves to release some bandwidth. Therefore, bandwidth request messages will always be rejected until after a cleardown. Under these circumstances the first request to be received after a cleardown will be allocated the recently cleared down bandwidth.
This is clearly unfair to request messages which may have been rejected just before the bandwidth cleardown message arrived.
Requests rejected by an output port are re-sent after a suitable backoff delay. This may lead to unacceptable delays and perhaps to periods during backoff delays when there is bandwidth.
It is an object of the present invention to provide for ATM switch operation during periods of peak data traffic so that data is not lost.
It is a further object of the present invention to provide a system wherein this problem is substantially eliminated.
According to the present invention an ATM communication system comprises an ATM switch having a plurality of input ports and a plurality of output ports, each of the input ports being fed from an input port server and each of the output ports being arranged to feed an output port server, the input port servers each having a plurality of buffer stores, one for each of the output ports, to which said output ports data is transmitted through the switch, each buffer store in the input port servers being arranged to interrogate the output port server with which it communicates before the transmission of data, thereby to determine whether output port server data handling capacity is available, whereby
ATM switch operation during periods of peak data traffic is facilitated.
The interrogation may take the form of a bandwidth request signal from an input port server in respect of an associated buffer store, the request signal being directed to an output port server with which that buffer store communicates via the switch, and an acknowledgement signal from this output port server in the presence of available capacity, in response to which acknowledgement signal data is thereafter transmitted from the buffer store to the output port via the switch.
It will be appreciated that by the expedient of providing in each input port server a buffer store for each output port server and by ensuring that no transmission takes place across the switch if output port server capacity is not available to accept it, data loss through output port server overload is obviated and ATM operation during peaks of data traffic without loss of data is facilitated.
ATM data traffic is transmitted in frames, wherein each frame comprises a plurality of cells, an end of frame marking being transmitted in the final cell of each frame.
In one contemplated embodiment of the invention the request signal is sent in the first cell of each frame, ie. a cell following a cell which includes an end of frame marker.
In this case the request cell may be arranged to request a bandwidth allotment which is based on mean frame size, ie. the mean data capacity of a frame.
According to an alternative embodiment of the invention the request signal may be sent in dependence upon the data stored from time to time in a buffer store.
In accordance with this alternative embodiment of the invention each buffer store may embody a plurality of data thresholds, request signals being transmitted determined in accordance with the threshold reached. Thus the bandwidth request can be tailored according to the quantity of data to be transmitted.
According to a further embodiment of the present invention, an ATM communication system includes a queuing arrangement for bandwidth requests received during periods when there is no available bandwidth capacity, the arrangement being such that requests are released in a predetermined order when capacity becomes available.
The order of release may be, simply first to arrive, first to be processed.
Various embodiments of the invention will now be described by way of example only with reference to the accompanying drawings, in which;
FIGURE 1 is a somewhat schematic block diagram of a switch having associated with it input port servers and output port servers,
FIGURE 2 is a block diagram indicating a bandwidth allocation mechanism,
FIGURE 3 is a block schematic diagram of buffer stores embodying a plurality of thresholds, and
FIGURE 4 is a schematic block diagram of part of an ATM communication system in accordance with a further embodiment of the present invention.
Referring now to Figure 1, an ATM communication system comprises a switch 1 which is fed from servers 2, 3 and 4 via input lines 5, 6 and 7 respectively. The input port servers 2, 3 and 4 are arranged to feed a plurality of output port servers one only of which, bearing the reference numeral 8 is shown. It will appreciated that in practice a large number of input port servers may be provided and by the same token a very large number of output port servers will be provided which are placed in communication with the input port servers via the switch 1. In the present arrangement each input port server is provided with a plurality of buffer stores A, B Z, one for each of the output port servers such as the output port server 8.Thus it will be apparent that signals in the input port buffers A of the input port servers 2, 3 and 4 will be routed via the switch 1 to the output port server 8.
Similarly signals in the buffers B of the input port servers 2, 3 and 4 will be routed to the line 9 for a corresponding output port server not shown. Thus with this arrangement it will be appreciated that if the servers 2, 3 and 4 each demand access to the output port server A, an overload condition can occur which may mean that data is lost.
In order to avoid this situation it is arranged that before data is transmitted a request is transmitted which must be appropriately acknowledged. Thus in one specific case if data is to be transmitted from buffer store A in the input server 2 to the output port server 8, a request transmission is made from the input port server 2 to the output port server 8 and if there is available data capacity then an acknowledgement signal is transmitted from the output port server 8 to input port server 2 indicating that data can be transferred therebetween.
As shown schematically in Figure 1, a total output port bandwidth may be available as indicated by the arrow 10 comprising an isochronous portion of storage 11 for essential data which must be transmitted without undue delay, a control data storage portion 12 for control data and a further storage portion 13 for bursty data. Thus, provided space is available in the output port server 8 in an appropriate one of the storage portions 11, 12 or 13, a positive acknowledgement will be sent across the switch 1 which will result in subsequent data transfer.
The mechanism for handling a bandwidth request is shown in Figure 2 and consequent upon receipt of a bandwidth request on a line 14, a comparison is made in a comparator 15 with the available bandwidth as stored in a bandwidth allocation table 16.
If sufficient bandwidth is available, a signal is sent via a line 17 to provide a positive acknowledgement on a line 18 from a bandwidth allocator 19 which also provides a feedback signal via a line 20 to update the bandwidth allocation table 16. If sufficient bandwidth is available to meet the request on the line 14, a signal is sent via a line 21 which rejects the request and a negative acknowledgement signal is provided via the line 18.
The amount of bandwidth requested may be determined in dependence upon the anticipated mean frame size. Each frame normally comprises a number of cells, each cell having a predetermined quantity of data contained therein. In one arrangement the last cell of each frame includes an end of frame marker and consequent upon transmission of the next consecutive cell following an end of frame marker a bandwidth request is made corresponding to the mean frame bandwidth.
In an alternative embodiment of the invention, as shown in
Figure 3, each buffer such as buffers 22 and 23 of an input port server which is arranged to communicate with an input port 24 has three thresholds T1, T2 and T3. In operation of the system a bandwidth request is arranged to be transmitted as each threshold is reached, but as will be appreciated, the bandwidth requested will be determined by the quantity of data to be transmitted and thus bandwidth will not be reserved unnecessarily.
In arrangements as just before described a dynamic bandwidth allocation protocol will operate between an input port server and another server on a desired switch output port. The server on the output port maintains, in effect, a table containing data relating to the current bandwidth reserved for that output.
When an input port server requires to send a burst, it thus first sends a reservation across the switch network to the output port server. The reservation cell contains the requested bandwidth. If the output port server can accept the requested bandwidth, a positive acknowledgement cell is sent back to the requested input port server. At this point the data burst can be sent from the input port to the output port. The bandwidth is de-allocated on completion of the burst transmission by means of an explicit clear down signal. The system as just before described, in effect, comprises a dynamic reservation protocol wherein only one multiplexing point is involved.Thus coupled with the data service tolerance to delays of 10's of milliseconds and the fact that requests could be queued if blocking occurs rather than re-sent, a very large burst blocking probability (BPP) of say 0.9 of higher could be used, and this would also increase performance for a highly bursty high peak bit rate data service.
Referring now to Figure 4, the part of the ATM system under consideration comprises an ATM switching network 25 which is arranged in communication with an input port 26 and an output port 27. It will of course be appreciated that although only one input port and one output port are shown, there will be a plurality of input ports and a plurality of output ports. Data is fed to the input port 26 from a number of different sources which are arranged to feed stores 28, 29 and 30, one store for each source.
Although only three stores 28, 29 and 30 are shown in the drawing it will be appreciated that many more sources may be arranged to communicate with the port 26 each via a separate store. Data fed to the stores 28, 29 and 30 is obviously transmitted in the form of ATM cells which may include control signals as well as data. It will appreciated that since there is a maximum available bandwidth in the communication link between the input port 26 and the output port 27 across the switching network 25, a situation can arise where if a large number of stores such as the stores 28, 29 and 30 require access, the available bandwidth may be exceeded.Accordingly, an input port resource allocation unit 31 is provided which checks the current use of the available bandwidth by the sources appertaining to the stores 28, 29 and 30, and assesses bandwidth requests received from the store as is illustrated schematically by an arrow 32. The requests received may be modified in accordance with bandwidth available and thus a request from the store 28 for a predetermined bandwidth may be modified in the input resource allocation unit 31 and the modified request will be passed via a line 33 to the input port 26 for onward transmission via the switching network 25 on a line 34 which is a schematic illustration of the route. The route through the switch will be occupied by bandwidth requests and data.Bandwidth requests are fed via the line 34 to a queuing store arrangement 35 whereas data will by-pass the queuing arrangement and pass through the system and out of the output port 27 on a line 36. Bandwidth available at the output port 27 is assessed by an output port resource allocation unit 27 which monitors the bandwidth currently used by the output port via a line 38 and provides acknowledgement signals via a line 39 which are returned through the switching network 25 and a line 40 to the source making a request. Thus in the present example, if the store 28 makes a request over the line 32 the input port resource allocation unit may modify this request which is passed through the switching network via the line 34 and queued in the store 35.
The request eventually receives attention by the output port resource allocation unit 37 which serves to provide an appropriate acknowledgement signal via the lines 39 and 40 which serve to release the data from the store 4 at a rate determined in accordance with the bandwidth available.
It will be appreciated that by arranging for bandwidth requests to be queued as hereinbefore described, a more efficient system is provided with less possibility of delays.
Various modifications may be made to the arrangements before described without departing from the scope of the invention and, for example, any suitable buffer thresholding method and apparatus may be used. Furthermore, any number of input sources with appropriate stores will be provided in a practical example.
Claims (10)
1. An ATM communication system comprising an ATM switch having a plurality of input ports and a plurality of output ports, each of the input ports being fed from an input port server and each of the output ports being arranged to feed an output port server, the input port servers each having a plurality of buffer stores, one for each of the output ports, to which said output ports data is transmitted through the switch, each buffer store in the input port servers being arranged to interrogate the output port server with which it communicates before the transmission of data, thereby to determine whether output port server data handling capacity is available, whereby ATM switch operating during periods of peak data traffic is facilitated.
2. A system as claimed in Claim 1, wherein the interrogation takes the form of a bandwidth request signal from an input port server in respect of an associated buffer store, the request signal being directed to an output port server with which that buffer store communicates via the switch, and an acknowledgement signal from this output port server in the presence of available capacity, in response to which acknowledgement signal data is thereafter transmitted from the buffer store to the output port via the switch.
3. A system as claimed in Claim 1 or Claim 2, wherein ATM data traffic is transmitted in frames, wherein each frame comprises a plurality of cells, an end of frame marker being transmitted in the final cell of each frame, the request signal being sent in the first cell of each frame, ie. a cell following a cell which includes an end of frame marker.
4. A system as claimed in Claim 3, wherein the request cell is arranged to request a bandwidth allotment which is based on mean frame size, ie. the mean data capacity of a frame.
5. A system as claimed in Claim 1 or Claim 2, wherein the request signal is sent in dependence upon the data stored from time to time in a buffer store.
6. A system as claimed in Claim 5, wherein each buffer store embodies a plurality of data thresholds, request signals being transmitted in accordance with the threshold reached.
7. An ATM communication system as claimed in any preceding claim characterised by a queuing arrangement for bandwidth requests received during periods when there is no available bandwidth capacity, the arrangement being such that requests are released in a predetermined order when capacity becomes available.
8. A system as claimed in Claim 7, wherein the order of release is first to arrive, first to be processed.
9. A system as claimed in Claim 7, wherein a priority releasing system is provided for queued requests determined in dependence upon the character of data appertaining to each queued request.
10. A system substantially as herein before described with reference to the accompanying drawings.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB929223934A GB9223934D0 (en) | 1992-11-14 | 1992-11-14 | Improvements in or relating to atm communication systems |
| GB939309468A GB9309468D0 (en) | 1993-05-07 | 1993-05-07 | Improvements in or relating to asynchronous transfer mode communication systems |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| GB9322744D0 GB9322744D0 (en) | 1993-12-22 |
| GB2272820A true GB2272820A (en) | 1994-05-25 |
| GB2272820B GB2272820B (en) | 1996-08-07 |
Family
ID=26301976
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| GB9322744A Expired - Fee Related GB2272820B (en) | 1992-11-14 | 1993-11-04 | Improvements in or relating to asynchronous transfer mode communication systems |
Country Status (1)
| Country | Link |
|---|---|
| GB (1) | GB2272820B (en) |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2300786A (en) * | 1995-05-10 | 1996-11-13 | Gen Datacomm Adv Res | ATM network switch |
| GB2306076A (en) * | 1995-10-03 | 1997-04-23 | Gen Datacomm Adv Res | ATM network switch |
| GB2311689A (en) * | 1996-03-29 | 1997-10-01 | Plessey Telecomm | Bidding for bandwidth in a telecommunications system |
| GB2326054A (en) * | 1997-06-04 | 1998-12-09 | Roke Manor Research | Broadband switch |
| US6324165B1 (en) | 1997-09-05 | 2001-11-27 | Nec Usa, Inc. | Large capacity, multiclass core ATM switch architecture |
| US6408005B1 (en) | 1997-09-05 | 2002-06-18 | Nec Usa, Inc. | Dynamic rate control scheduler for ATM networks |
| GB2461693A (en) * | 2008-07-07 | 2010-01-13 | Virtensys Ltd | Requesting permission to transmit selected packets from a plurality of ingress ports and selecting one of the requests at an egress port of a switching device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1986002510A1 (en) * | 1984-10-18 | 1986-04-24 | Hughes Aircraft Company | PACKET SWITCHED MULTIPLE QUEUE NxM SWITCH NODE AND PROCESSING METHOD |
| EP0388951A2 (en) * | 1989-03-23 | 1990-09-26 | Nec Corporation | Call control with transmission priority in a packet communication network of an ATM type |
| EP0448073A2 (en) * | 1990-03-20 | 1991-09-25 | Fujitsu Limited | ATM communication system |
-
1993
- 1993-11-04 GB GB9322744A patent/GB2272820B/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1986002510A1 (en) * | 1984-10-18 | 1986-04-24 | Hughes Aircraft Company | PACKET SWITCHED MULTIPLE QUEUE NxM SWITCH NODE AND PROCESSING METHOD |
| EP0388951A2 (en) * | 1989-03-23 | 1990-09-26 | Nec Corporation | Call control with transmission priority in a packet communication network of an ATM type |
| EP0448073A2 (en) * | 1990-03-20 | 1991-09-25 | Fujitsu Limited | ATM communication system |
Cited By (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2300786B (en) * | 1995-05-10 | 1999-08-18 | Gen Datacomm Adv Res | ATM network switch |
| US5841773A (en) * | 1995-05-10 | 1998-11-24 | General Datacomm, Inc. | ATM network switch with congestion level signaling for controlling cell buffers |
| GB2300786A (en) * | 1995-05-10 | 1996-11-13 | Gen Datacomm Adv Res | ATM network switch |
| GB2306076A (en) * | 1995-10-03 | 1997-04-23 | Gen Datacomm Adv Res | ATM network switch |
| GB2306076B (en) * | 1995-10-03 | 2000-03-22 | Gen Datacomm Adv Res | ATM network switch |
| GB2311689B (en) * | 1996-03-29 | 2000-03-08 | Plessey Telecomm | Bandwidth bidding |
| GB2311689A (en) * | 1996-03-29 | 1997-10-01 | Plessey Telecomm | Bidding for bandwidth in a telecommunications system |
| GB2326054A (en) * | 1997-06-04 | 1998-12-09 | Roke Manor Research | Broadband switch |
| GB2326054B (en) * | 1997-06-04 | 2002-08-07 | Roke Manor Research | Broadband telecommunications switch |
| US6714555B1 (en) | 1997-06-04 | 2004-03-30 | Roke Manor Research Limited | Broadband telecommunications switch |
| US6324165B1 (en) | 1997-09-05 | 2001-11-27 | Nec Usa, Inc. | Large capacity, multiclass core ATM switch architecture |
| US6408005B1 (en) | 1997-09-05 | 2002-06-18 | Nec Usa, Inc. | Dynamic rate control scheduler for ATM networks |
| GB2461693A (en) * | 2008-07-07 | 2010-01-13 | Virtensys Ltd | Requesting permission to transmit selected packets from a plurality of ingress ports and selecting one of the requests at an egress port of a switching device |
| US8040907B2 (en) | 2008-07-07 | 2011-10-18 | Virtensys Ltd. | Switching method |
| GB2461693B (en) * | 2008-07-07 | 2012-08-15 | Micron Technology Inc | Switching method |
Also Published As
| Publication number | Publication date |
|---|---|
| GB2272820B (en) | 1996-08-07 |
| GB9322744D0 (en) | 1993-12-22 |
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