GB2268646A - Using feedback to render a transistor impedance insensitive to a gain control voltage - Google Patents

Abstract

An amplifier output is controlled by a control voltage applied to a transistor forming part of a stage of the amplifier. Feedback is applied around the transistor to desensitize transistor impedance to applied control voltage effects. <IMAGE>

Description

a 2:1 input VSWR, the possible gain of that amplifier is reduced by 0.5 dB.

SUMMARY OF THE INVENTION It is herein recognized that a need exists to maintain acceptable VSWR levels in RF amplifiers over a range of power output levels, as an example. The present invention is directed toward meeting those needs.

Generally, and in one form of the invention an amplifier is presented wherein output is controlled by a control voltage applied to a transistor forming part of a stage of the amplifier and wherein feedback is applied around the transistor to desensitize transistor impedance to applied control voltage effects.

Preferably the transistor is a RF GaAs heterojunction bipolar transistor. A resistive attenuator network may be applied at an input of the amplifier. Preferably the resistive attenuator network comprises two resistors, a first resistor is connected to ground and a second resistor is connected in series to the input on a first end of the resistors and connected to each other on a second end. The feedback is preferably provided by a feedback network comprising a resistor and a capacitor connected in series between a collector and a base of the transistor. The amplifier may further comprise a DC bias transistor connected to the transistor.

The amplifier of the present invention may be used as an input stage of a multi-stage amplifier and may be used in a cellular telephone, as examples.

IMPROVEMENTS IN OR RELATING TO AMPLIFIERS FIELD OF THE INVENTION This invention generally relates to amplifiers.

BACKGROUND OF THE INVENTION Without limiting the scope of the invention, its background is described in connection with GaAs HBT power amplifiers, as an example.

Heretofore, in this field, the GaAs HBT has proven an attractive device for high efficiency applications requiring high levels of integration such as portable radio transmitters running off battery supplies. The device is capable of > 80% collector efficiency when used in conjunction with suitable external circuitry, which may be implemented in either hybrid or monolithic form.

In an HBT amplifier, as the control voltage is varied and thus the RF power output, the DC bias ofthe RF transistor is also changing, this in turn changes the RF parameters ofthe device. The reactive impedance matching networks ofthe amplifier (i.e. inductors and capacitors) are chosen to optimize circuit performance at a particular bias point and therefore become ineffective at other bias points. A particular RF parameter that varies for the input stage and thus the overall amplifier is the input VSWR. VSWR (voltage standing wave ratio) is a measure of the RF power reflected back from a circuit and indicates how well a circuit is impedance matched to the 50 ohm transmission line standard.The higher the VSWR, the poorer is the impedance match to 50 ohms and thus more power is reflected back from that circuit node. Reflected power manifests itself as a loss in RF amplifier circuits giving reduced gain. As a guide, a 2:1 VSWR gives a 0.5 dB reflection loss, so assuming a perfectly matched output amplifier, that is VSWR is 1:1, no output reflection loss, and BRIEF DESCRIPTION OF THE DRAWINGS In the drawings: FIG. 1 is a schematic of a preferred embodiment of the present invention; and FIG. 2 is a plot of gain vs frequency for a range of VAPC values for a preferred embodiment of the present invention.

Corresponding numerals and symbols in the different figures refer to corresponding parts unless otherwise indicated.

DETAILED DESCRIPTION OF PREFERRED EMBODIMENTS The input stage amplifier of the present invention preferably includes an RF Heterojunction Bipolar Transistor (HBT) which has reactive input and output impedance matching networks that transform the device impedance to a system standard, generally 50 ohms. The impedance transformation is preferably assisted by a parallel feedback network from collector to base, the feedback also enhances RF stability.

RF power control of this stage (and the overall amplifier) is achieved by controlling the base bias of the first stage RF transistor. As the RF power output of the first stage is reduced, the power output of the second/third stage also reduces by virtue of it's class B DC biasing. A resistive attenuator network, coupled with a parallel feedback network, may be used to ensure that the input Voltage Standing Wave Ratio (VSWR) remains relatively low, for example, less than 3:1 over the entire range of power outputs of the amplifier. A resistive pad serves as a resistive attenuator that absorbs RF power, reducing reflections and thus VSWR.

Figure 1 shows a schematic of a preferred embodiment input stage amplifier of the present invention. In the below description of the circuit specific component values are given which are optimal for a specific application. However, these values could be changed dependent on the requirements of each particular application.

Connected to the RF input 10, in the RF direct path, is preferably a resistive attenuator network (resistive pad), comprising two resistors 12,14, a 125 ohm resistor 12 to ground and a series 15 ohm resistor 14. This particular network provides 3 dB of RF signal attenuation, to ensure that the input VSWR does not exceeds 3:1 (the resistive attenuator ensures 6 dB return loss, which equates to a 3:1 VSWR).

Different values of resistors would yield a different level of attenuation. Also from the RF input 10 to ground an SCR 16 may be connected for circuit protection.

RF-On-Wafer (RFOW) grounding (not shown) may also be provided to enable RFOW testing.

Following the attenuator, is a reactive network preferably comprising a shunt capacitor 18 to ground, and a series, preferably rectangular spiral, inductor 20. The values of the capacitor 18 and inductor 20, in this example, are 6.0 pF and 8.3 nH respectively, to ensure the desired frequency response of the circuit by means of matching the impedance of the device at its full power output operating point to 50 ohms. (50 ohms is the standard transmission line impedance to which most RF and microwave components are matched to).

A capacitor 22 is connected in series from the inductor 20 to the base 24 of the RF transistor 26 to serve as a DC block and prevent DC external to the device from interfering and/or possibly damaging the device. Its value is preferably 20 pF and presents only a minimum reactance to RF energy at, for example, 870 Mhz.

The transistor 26 is preferably a 2x5x20 (that is, 10, 20 micron long fingers) micron device giving a total of 200 pm (micron) "emitter width". Leading from the base 24 is preferably a transmission line to connect the base bias resistor 28. This resistor 28 preferably has a value of 1K ohms to ensure the correct biasing of the RF transistor 26 over a given control voltage range, but without the sacrificial loss of RF power. Close by on the layout a floating resistor (not shown), for example 500 ohm, may be included, which may be added to the 1K resistor 28, or used instead of, giving a 500, 1K or 1.5K bias resistor 28 option. Connected in series with the bias resistor 28 is a 20 pf capacitor 30 which is connected to ground. This capacitor 30 serves the purpose of de-coupling or bypassing any RF to ground to eliminate bias line instabilities caused by undesirable RF feedback.

Connected to the de-coupling capacitor 30 at the node between the resistor 28 and the capacitor 30 is another transistor 32 which is used in conjunction with the base bias resistor 28 to ensure the correct control voltage range vs. power output for the input stage amplifier. A short link of metal may be used to connect the emitter 34 of this transistor 32 to the de-coupling capacitor 30. The base 36 of the DC bias transistor 32 is connected to VAPC 38 (control voltage output) via preferably a 50 ohm resistor (not shown). The resistor is to eliminate the possibility of oscillation of the DC transistor 32. The collector 40 of the DC transistor 32 which is connected to Vcc 42 of the RF transistor preferably via a 50 ohm resistor (not shown).Both VAPC 38 and Vcc 42 rails preferably have SCRs 44 connected to ground for circuit protection.

The collector 46 of the RF transistor provides the RF output. Connected to the collector 46 is a shunt tuning capacitor 48 to ground (5 pF), this along with the preferably square spiral inductor 50 (6 nH) form a resonant bias network for Vcc.

The component values and connections are chosen so at a particular frequency the inductor and capacitor resonate, and the effect is such that a large impedance is created and the inductor "appears" to be larger than it really is, thereby stopping RF being "lost" down the Vcc path. The Vcc bias inductor 50 then connects to a 26.8 pF de-coupling capacitor 52 to ground. This capacitor 52 de-couples stray RF and eliminates bias line instabilities by minimizing undesirable RF feedback. The value of this decoupling also was chosen to resonate with the Vcc bias inductor to shape the gain (reduce) at the lower frequencies thereby reducing undesirable spurious gain response. There is an optional Vcc pin 54 provided. Connecting at the node between inductor 50 and capacitor 52 is a 20 ohm resistor 56 which forms part of the bias network.This resistor 56 is to suppress any "in-band" gain troughs caused by poor quality, high selfinductance capacitors, placed on the V00 pin 42 outside the package.

Also leading from the RF transistor collector 46 is preferably a parallel feedback network from collector to base. This preferably comprises a series resistor 58 then a series capacitor 60. A resistor chain may be used to allow variation or "tuning" of the feedback resistor 58 to optimize performance in diagnosis of the circuit performance. The nominal value of the feedback resistor 58 is preferably 680 ohms and the feedback capacitor 60 is preferably 20 pF. The values are so chosen to enhance circuit stability and gain flatness over frequency with the minimum degradation of power output and noise figure. Moreover, the feedback network may be used with or without the attenuator network described previously to maintain a minimum specified input VSWR whilst bias and thus RF power output is varied.The feedback network acts to desensitize the RF transistor impedance to the effects of changing DC bias levels and hence voltage control and power output. Therefore, VSWR is minimized.

A short length of transmission line may be used to connect the RF transistor collector 46, to a DC blocking capacitor 62 followed by the RF output 64 to feed any following RF stages of the overall amplifier.

The circuit operation is generally as follows. An RF signal is applied at RF input 10. Approximately 5.8 Volts are applied to V00 42, this supplies the collector voltage to both the DC 32 and RF 26 transistors. Without any voltage applied to VAPC 38 the DC transistor 32 is switched off, hence base DC supply to the RF transistor 26 is switched off and the amplifier has no RF gain (in fact it is negative, i.e. about a 20 dB loss). As control volts (CAPO) 38 are applied, the DC transistor 32 begins to conduct and supply the RF transistor 26 with base bias and it too starts to conduct and the RF gain increases.At a VAPC 38 voltage of 3.0 Volts the RF transistor 26 is taking approximately 23 mA, and for a 0 dBm RF input power (1 mW) at 870 Mhz the power output is around 10 dBm (10 mW). For a DC current gain of around 25, the RF transistor 26 base current is approximately 1 mA. With the DC transistor 32 turned on the voltage drop over its base emitter junction is around 1.2-1.3 Volts for a GaAs heterojunction as opposed to the 0.7 V of a silicon homojunction. With 1 mA flowing in the base circuit of the RF transistor 26 then 1 volt will be dropped across the base bias resistor 28 and 0.7 V will be present at the base 24 of the RF transistor 26, thus the RF transistor 26 is not fully switched on.This bias point was chosen so that more RF power output could be achieved by increasing v and thus turning on the RF transistor 26 more. Figure 2 shows an example plot of gain vs frequency for a range of VAPC values for the circuit described above.

As an example, a design specification limit of a 3:1 inputVSWR may be set for an amplifier. To ensure it meets that under all bias/power control range conditions, a 3 dB attenuator network may be applied to the input of the amplifier. This gives a 3:1 input VSWR independent of frequency and/or impedance values proceeding the attenuator. However, one cannot add large value attenuators on the input of amplifier circuits to minimize the VSWR, since the value of attenuator in dBs "adds" directly to the noise figure ofthe amplifier in dBs and thus increases noise figure and reduces sensitivity. Also the 3 dB attenuator reduces the amplifier gain by 3 dB.

Therefore, the use of parallel feedback from base 24 to collector 46 on the RF transistor 26 in conjunction with the resistive attenuator 12,14 gives an acceptable VSWR over the desired control range. The feedback network is essentially resistive and is thus independent of frequency therefore changing the device impedance parameters to reduce VSWR over a bias and power control range. The feedback network also enhances amplifier RF stability and gain flatness. The gain response peaks at a particular frequency because of the reactive matching networks (tuning capacitors and inductors) which are themselves frequency dependent and are chosen in value to match the impedance of the device to 50 ohms thus minimizing reflected power and thus maximizing gain of the amplifier.

The amplifier of the present invention has several uses. For example, it is well suited for use in cellular telephones and, more specifically, in GaAs HBT RF power amplifiers.

A preferred embodiment has been described in detail hereinabove. It is to be understood that the scope of the invention also comprehends embodiments different from those described, yet within the scope of the claims. For example, the specific components and values given are for a specific application and may be changed to suit other applications. Similarly, the power control circuit could be applied to devices and circuits other than GaAs HBT power amplifiers. Words of inclusion are to be interpreted as nonexhaustive in considering the scope of the invention.

While this invention has been described with reference to illustrative embodiments, this description is not intended to be construed in a limiting sense.

Various modifications and combinations of the illustrative embodiments, as well as other embodiments of the invention, will be apparent to persons skilled in the art upon reference to the description. It is therefore intended that the appended claims encompass any such modifications or embodiments.

Claims (13)

WHAT IS CLAIMED IS:

1. An amplifier wherein output is controlled by a control voltage applied to a transistor forming part of a stage of said amplifier and wherein feedback is applied around said transistor to desensitize transistor impedance to applied control voltage effects.

2. The amplifier of claim 1, wherein said transistor is a RF transistor.

3. The amplifier of claim 2, wherein said transistor is a heterojunction bipolar transistor.

4. The amplifier of claim 3, wherein said transistor comprises GaAs.

5. The amplifier of claim 1, wherein a resistive attenuator network is at an input of said amplifier.

6. The amplifier of claim 5, wherein said resistive attenuator network comprises two resistors.

7. The amplifier of claim 6, wherein a first resistor is connected to ground and a second resistor is connected in series to said input on a first end of said resistors and connected to each other on a second end.

8. The amplifier of claim 1, wherein said feedback is provided by a feedback network comprising a resistor and a capacitor connected in series between a collector and a base of said transistor

9. A cellular telephone including a amplifier as claimed in claim 1.

10. The amplifier of claim 1, further comprising a DC bias transistor connected to said transistor.

11. The amplifier of claim 10, wherein said connection is indirect.

12. The amplifier of claim 1, wherein said amplifier is an input stage of a multi-stage amplifier.

13. A circuit substantially as herein described with reference to the drawings.