GB2261131A

GB2261131A - Transmission arbitration in SLM crossbar switch

Info

Publication number: GB2261131A
Application number: GB9122246A
Authority: GB
Inventors: Richard James Westmore
Original assignee: Northern Telecom Ltd
Current assignee: Nortel Networks Ltd
Priority date: 1991-10-19
Filing date: 1991-10-19
Publication date: 1993-05-05
Anticipated expiration: 2011-10-19
Also published as: GB2261131B; GB9122246D0

Abstract

A transmission arbitration arrangement for an optical crossbar switch having a first plurality of data input sources, a second plurality of data output destinations and interposed between the sources and destinations a modulator matrix including for each destination a binary tree arbitration means having a separate input corresponding to each source, the binary tree having cascaded levels of nodes, each node having two inputs being the outputs respectively of two nodes of a previous level and one output being one of the two inputs to one node of a succeeding level, the input source identities being the inputs to the nodes of the first level and the output of the single node of the last level serving to select a modulator in the matrix to effect transmission of data from a given source to a required destination, wherein in each node if two input signals are present the output of that node represents the inputs alternately. <IMAGE>

Description

Transmission arbitration in SLM crossbar switch This invention relates to SLM crossbar switches in which arbitration is required in the event of conflicting requests to transmit.

An optical crossbar switch is a device for connecting N inputs to one or more of M outputs. Light from a linear array of N input sources and forming input vector i is spread out by means of optics such that each source illuminates a respective column of an M x N array (matrix) of optical shutters (modulators). The matrix is a crossbar mask matrix A (a spatial light modulator SLM) which controls the routing of inputs from sources to outputs comprised by a second, orthogonal linear array of M detectors. The light passing through each row of the SLM is collected by optics and falls on one of the M detectors, thus forming output vector o. This configuration is known as a matrix vector multiplexer as the operation o = iA is performed. Typically the light travelling through the system carries a high bit rate data stream and the optical crossbar performs the function of a telephone exchange.In "FiberOptic Crossbar switch with Broadcast Capability", A R Dias et al, SPIE VoL 825, p 170-177", two types of SLM technologies are referred to in this context, namely PLZT and magneto-optic.

An SLM crossbar provides a full crossbar capability for all channels. In order to prevent corruption of transmitted data by multiple simultaneous transmissions to the same destination, transmission to a destination must be limited to one transmitter at a time. Arbitration between potentially conflicting requests-to-transmit, to the same destination, are required to secure sequential access to each destination.

The pattern of requests for connection through the crossbar is unpredictable. Any numbers of transmitters may wish to send to the same receiver simultaneously. In systems with a ransom distribution this worst case will be rare. Typically only a few transmitters will be involved in any arbitration.

According to the invention there is provided a transmission arbitration arrangement for an optical crossbar switch having a first plurality of data input sources, a second plurality of data output destinations and interposed between the sources and destinations a modulator matrix including for each destination a binary tree arbitration means having a separate input corresponding to each source, the binary tree having cascaded levels of nodes, each node having two inputs being the outputs respectively of two nodes of a previous level and one output being one of the two inputs to one node of a succeeding level, the input source identities being the inputs to the nodes of the first level and the output of the single node of the last level serving to select a modulator in the matrix to effect transmission of data from a given source to a required destination, wherein in each node if two input signals are present the output of that node represents the inputs alternately.

Embodiments of the invention will now be described with reference to the accompanying drawings, in which.

Fig. 1 illustrates a distributed control arrangement for an SLM crossbar switch; Fig. 2 illustrates a binary tree structured arbitration arrangement; Figs. 3a and 3b illustrate respectively serial and parallel bus interface arrangements for addressing switch control units on an SLM, and Figs. 4a and 4b illustrate the use of token addressing for switch control units.

Fig. 1 shows schematically a portion of an SLM arrangement as utilised in a crossbar switch. Each modulator 10 comprises a liquid crystal cell operating as an optical shutter controlled by a respective switch control unit (SCU) 12. Each liquid crystal ceil is switched between its transmit and non-transmit states by a switching voltage applied via an FET 14 controlled by the SCU. The SCU's respond to arbitration signals received from an arbitration arrangement which performs arbitration for each destination when conflicting requests are received from two or more sources for the same destination.

The arbitration is performed by a binary tree logic structure, Fig. 2. Each destination is provided with a separate binary tree structure. The binary tree comprises a network of nodes 16 each of which has two inputs and one output cascaded in levels so that the outputs of two nodes at the primary level form the two inputs to one node at the next level and so on, the final level having a single node.

The primary level nodes have inputs corresponding to all the N sources served by the switch, the primary primary level therefore N/2 nodes.

The final level node has its single output associated with one destination only. Each input is provided with a signal indicating whether or not the associated source is requesting access to the destination controlled by the tree. If both inputs to any node of the tree have requests present then that node selects one of its two inputs and transmits the identity of the winner to the succeeding node in the next level. Fairness would be ensured by having the winning input selected on an alternating basis. If only one input to a node has a request present then that identity automatically goes through to the next node. Sufficient temporary storage is provided at each node to identify the requesting source. The need for temporary storage at the first level could be avoided by hardwiring the source ID during fabrication.Each input request progresses through the tree until it emerges at the final level node, where the identity of the winning input request emerges. Each request moves through the tree as the requests stored in nodes ahead of it emerge from the final level node. This approach ensures fairness.

A 256 node system would require an eight level binary tree.

Only a few gate delays are required at each level, making this a fast method of resolving arbitration.

Each requesting input must be fanned out to each of the arbitration trees. This high fanout requirement can be achieved in a 256 processor system by a two-level tree of drivers each with a fanout of 16.

As described above, a switch control unit (SCU) is associated with each modulator of the SLM crossbar. The switch control unit (SCU) is capable of opening and closing the optical channel between a source and a destination as described above. It is addressed by the output of the binary tree which performs the arbitration for access to the destination.

The addressed SCU generates a latched control signal indicating that it has been selected and connects the SLM modulator to the switching voltage line 15 (Fig. 1). This signal is sent to the source control logic. A busy signal is generated on a line associated with the destination to inhibit further arbitration and selection for the same destination.

On receipt of the select signal the source control logic 17 signals the source that the channel is being opened and initiates a switch-on voltage cycle on the switching voltage line. Once the source has finished sending the message through the optical channel it signals the source control logic that it has finished. The source control logic then applies the turn-off voltage cycle to the switching voltage line, turning off the modulator. The SCU either detects that the modulator has been turned off, or receives a signal indicating that it has been turned off. It then disconnects the call from the switching voltage line and removes the busy signal, allowing the connection of the next requesting source to emerge from the binary tree to proceed.

Other methods of signalling the completion of the connection by electrical or optical means are possible: transmission of the source identity to the destination, or transmission of the destination identity to the source. Alternatively the data channel itself could be used for signalling completion.

A number of approaches to addressing the SCU's by the source control logic are possible. One straightforward approach is to have each SCU contain a bus interface, with address recognition capability, connected to a bus which runs along each row. The bus interface unit of the SCU recognises its address and latches a signal indicating that it has been selected. This can be achieved directly using either a serial or a parallel bus.

Fig. 3a shows a serial bus implementation. An 8-bit identity is sent along the serial bus data line 30 and is clocked serially into an 8-bit shift register 31. The contents of the register are then compared with the source identity held in a store 32 and if a match is detected in match circuit 33 a latch 34 is set when a strobe signal is received. The output of latch 34 forms a control signal for the FET 14 and at the same time provides a busy signal on the 'BUSY' line 36 of the bus.

Fig. 3b shows a parallel bus implementation. The 8-bit identity is loaded directly in parallel from the data bus 37 into the match circuit 38 where it is matched with the source identity held in store 32. As in the serial bus implementation, if a match occurs the latch 34 is set to control the FET 14 and simultaneously provide a busy signal on line 36.

Alternatively, a token can be clocked along the row through each SCU. Sub-division of the row can be used to reduce the latency of this approach. Fig. 4a illustrates addressing of the SCU using serial shifting of a bit token. Fig. 4b shows serial shifting of a bit token sub-divided into four segments. In a 256 way implementation with four-way sub-division, 64 clock cycles would be required to correctly position the addressing token. In contrast, the parallel bus approach offers the shortest addressing latency and best performance/t ransistor-count/area trade off.

Claims

CLAIMS:

1. A transmission arbitration arrangement for a crossbar switch including binary tree arbitration means wherein conflicting requests from two or more sources for transmission to the same destination are resolved by alternate selection of concurrently conflicting requests at each level of the binary tree.

2. A transmission arbitration arrangement for an optical crossbar switch having a first plurality of data input sources, a second plurality of data output destinations and interposed between the sources and destinations a modulator matrix including for each destination a binary tree arbitration means having a separate input corresponding to each source, the binary tree having cascaded levels of nodes, each node having two inputs being the outputs respectively of two nodes of a previous level and one output being one of the two inputs to one node of a succeeding level, the input source identities being the inputs to the nodes of the first level and the output of the single node of the last level serving to select a modulator in the matrix to effect transmission of data from a given source to a required destination, wherein in each node if two input signals are present the output of that node represents the inputs alternately.

3. An arrangement according to claim 2 wherein the optical crossbar switch comprises a spatial light modulator (SLM).

4. An arrangement according to claim 2 or 3 wherein each modulator in the matrix has a respective switch control unit (SCU) to control opening and closing of a channel between a source and a destination by controlling the modulator and said SCU is addressed by the output of the binary tree.

5. An arrangement according to claim 4 including a bus accessing the SCU's of the matrix each SCU having a bus interface and address recognition capability, the binary tree providing the address for a selected SCU.

6. A transmission arbitration arrangement for an optical cross bar switch substantially as described with reference to the accompanying drawings.