GB2232860A

GB2232860A - Audio signal echo cancellation circuit

Info

Publication number: GB2232860A
Application number: GB8910956A
Authority: GB
Inventors: Derek Norman Glanville
Original assignee: Plessey Co Ltd
Current assignee: Plessey Co Ltd
Priority date: 1989-05-12
Filing date: 1989-05-12
Publication date: 1990-12-19
Also published as: GB2232563B; GB2232563A; GB8910956D0; GB9010752D0

Abstract

An audio signal processor circuit treats a digitally encoded signal. Units 3, 12 sample the encoded signal and units 8, 13 calculate from the sampled values a correlation function relevant to a particular time frame, the function value serving to control an adaptive echo cancellation algorithm. The sampled signal portions are truncated in units 2, 5 so that only the arithmetic sign bit of each signal portion contributes to the function calculation. The hardware for this processor circuit may be built into a telephone exchange line interface circuit with only a small increase in the chip area needed. <IMAGE>

Description

AUDIO SIGNAL PROCESSOR CIRCUIT This invention relates to an audio signal processor circuit for treating the signals from a telephone subscriber's line when these are received at the telephone exchange, and converting the signals to a sampled digital form.

In a telephone exchange, the signals on the telephone subscriber's line are converted from an analogue to a digital form by a sampling and coding operation performed by an audio processor circuit. The impedances which are presented to each individual telephone line at any particular time are likely to give an impedance mismatch and this can cause a 2-to-4 wire hybrid echo signal to appear. It is possible for at least part of this echo effect to be cancelled digitally in the audio processor unit. The echo cancellation operation may be static, that is, its operation will be pre-set by the manufacturer of the circuit at some compromise value.

Alternatively, the echo cancellation could be designed to work by a process of continuous adaption to minimise the echo signal.

If sinusoidal signals happen to be present on the telephone line instead of speech, the adaptive operation can lead to the occurrence of further unwanted side effects in the adaption circuit output.

It is possible to overcome some of these problems by providing an adaptive echo cancellation system which can be modified in response to the statistical properties of the signal input, but a conventional adaptive system with a conventional signal correlator would need a substantial quantity of hardware for its realisation.

The correlator hardware and necessary signal processing would be likely to take up a significant proportion of the area of integrated circuit chip which is available for that subscriber at the exchange.

This could lead to a substantial increase in the cost of building the exchange.

An object of the present invention is to provide an audio processor circuit which can carry out an adaptive echo cancellation function with normal speech signals and which will not respond adversely to large sinuosidal signals, but which can be economical in the quantity of hardware needed.

According to the invention, there is provided an audio signal processor circuit for treating a digitally encoded incoming signal, the circuit comprising means for sampling the encoded signal, means for calculating from the sampled values a measure of the correlation function relevant to a particular time frame, the value of said function serving to control operation of an adaptive echo cancellation algorithm, in which the sampled signal portions are truncated such that only the arithmetic sign bit of each signal portion contributes to the function calculation, such that control can be effected on the adaptive algorithm for eliminating unwanted effects.

The circuit further comprises means for controlling the operation of said adaptive algorithm at the end of each time frame for a new function calculation.

In one embodiment, an incoming signal sample is initially treated in an extraction block arranged to determine the arithmetic sign relevant to that signal, the resulting sign bits being fed in sequence to a shift register arranged to store a predetermined number of said sign bits.

By way of example, a particular embodiment of the invention will now be described with reference to the accompanying drawing which shows the correlator circuit in the form of a block diagram.

In order to prevent an adaptive echo cancellation system exhibiting instability with sinusoidal signals, it is sufficient to be able to estimate when two signals are both periodic and have a high degree of correlation. For the cross-correlation function, it would be helpful to produce a binary output indicating, in one state, if the signals were uncorrelated or random and correlated. In the other state, the signals would be periodic and of substantially the same period. It can also be sufficient to determine if a signal transmitted in one path is sinusoidal. In this case, the auto-correlation function can be used to discriminate between sinusoidal and random signals.

The auto-correlation function will be produced if each of two extraction blocks are connected to a common signal path.

Given two signals x and y, the cross-correlation function will have the following properties dependent on the nature of the signals.

If g and X are 'uncorrelated' then by definition the cross-correlation function will be zero. If 2L and y are random but have some degree of correlation the cross-correlation function will have a maximum value at some point and the function will diminish to zero at points removed from the location of the maxima. If, however, the signals are sinusoidal, differing only in amplitude and phase, the cross-correlation function will be a cosinusoid of half the amplitude of the product of the amplitudes of the sinusoids.

For periodic signals, correlation functions are precisely given by the integral

In this expression, T is the period of the sinusoidal signal, t is time, X is a shift in time (shifted time) and x(t) is a function of the signal x with respect to time. For a finite set of samples (sampled digital systems), this integral may be summed approximately as follows:

In this expression, C(k) is the correlation function, N is the total number of samples, i is any one of the set of the samples from zero to the number N, K is a different one of the set of samples from zero to the number N, Xj is the jth member of the set of samples of x(t).

The degree of approximation which has been effected depends on the statistics of the signals, sampling frequency and the size of the set of samples used. If the signals are uncorrelated, or random but correlated, then instead of tending to zero they will tend to a small number which will 'hover' about zero. But, if the signals x and are periodic and exhibit a high degree of correlation the correlation function will be a close approximation to a cosinusoid even with a relatively small sample set.The conventional hardware realisation of the above summation (the correlation function) would require the provision of k shift registers of shift 1 to k, k + 1 full word length multipliers, k adders and a software algorithm for determining. from the stored waveform, the nature of the signals X and y for all levels of x and y (mean square value).

The present invention proposes to estimate the occurrence of the periodic case from the other classes of signals that can be present, and with a significant reduction in the amount of hardware that may be necessary to achieve the required result.

If the signals x and y are replaced by their arithmetic signs (that is, by the sign +1 if the signal is greater than zero and -1 if less than zero), we can calculate an estimate of the cross-correlation function as

It will be noted that by taking the sign bits of the signal portions this expression will be independent of the exact amplitude of the signals but, in the cases considered, the mean values of the signals are assumed to be zero.

The latter case, that of periodic correlated signals, can be deduced if the above summation is more negative than -0.5.

The accompanying block diagram shows one form that the circuit hardware can take.

As shown in the drawing, an x signal path 1 is connected to a first extraction block 2 by which the sign bit of an incoming digitally encoded signal is extracted and the relevant sign bit is passed to a multiplier 3. Similarly, a y signal path 4 is connected to a second extraction block 5 by which the sign bit of the signal is extracted and the relevant sign bit is passed to an M bit shift register 6. In the shift register 6, the number of samples falling within a given time period, can be given to the y value. A control logic select kl circuit 7 takes the relevant X sign bit and passes it to the multiplier 3.

In the multiplier 3, multiplication is performed according to the following truth table to give the xy product:

Y= -1 +1 x= -1 +1 .1 +1 -1 +1 The output of the multiplier 3 is delivered to an upidown counter 8 which serves to sum the multiplier output over N samples.

At the conclusion of the count the values of the sign and magnitude bits are delivered to an evaluation point 9. By noting the logic output, a simple gate device is able to indicate if both the sign bit indicates a negative value and the magnitude of the output is greater than half the maximum count. The counter 8 is then cleared and the process is arranged to start again to produce a sequence of estimated values.

As already mentioned, an auto-correlation function would be produced if both extraction blocks 2 and 5 are connected to a common signal path, that is, to either path 1 or path 4 in the diagram.

This construction as just described is able to estimate the crosscorrelation (or auto-correlation) function at only a single point.

However, because of the periodic nature of sinusoids, we are able to construct other values of the correlation function by simply repeating the process within a given time frame. This will therefore build up a 'sampled' correlation function. Because of a relationship that may exist between the sample frequency and the set of values, it may be that all values generated are greater than -0.5, thus a second set of k-values (k2) that are not numerically related to the first set (kl) should be used simultaneously.

For example, a first set kl could result in estimation of a crosscorrelation function occurring at, for example, arbitrary points 7, 14, 21 ..., whilst a second set k2 could detect correlation at points 13, 26, 39 ... . By choice of sample size, shift register length and knowledge of the signal bandwidth, the above process can be repeated within a particular time frame whereby a high degree of certainty of detection of the periodic signals, if these signals should exist, can be assured.

The provision of the 'sampled' correlation function is capable of being effected in the circuit just described since the shift register 6 is additionally coupled to a control logic select k2 circuit 11. The select circuit 11 thus passes a v sign bit selected for a different value of k to a second single bit multiplier 12. The multiplier 12 has a second input which receives a sign bit from the first extract block 2 in the x signal path.

The output from the multiplier 12 is delivered to a second up/down counter 13 which serves to sum the multiplier output over N samples. At the conclusion of the count the values of the sign and magnitude bits are delivered to a second evaluation point 14.

This process may be extended further, at the cost of providing additional hardware, for a third (K3), a fourth (K4) etc. set of values.

At the conclusion of the estimation period, the logic control of the adaptive echo cancellor is able to update its adaption to the echo signal improving its cancellation performance, or in the presence of large sinusoidal signals prevent further adaption and thereby avoid the unwanted side effects.

It has been found that the hardware for the correlator circuit of the invention is capable of being built on an integrated circuit chip with only a small increase in the chip area needed over that required for the audio processor including the adaptive echo cancellor. In one embodiment, an area increase of only 3% was required to support the components needed for the correlator circuit.

The foregoing description of an embodiment of the invention has been given by way of example only and a number of modifications may be made without departing from the scope of the invention as defined in the appended claims.

Claims

CLAIMS:-

1. An audio signal processor circuit for treating a digitally encoded incoming signal, the circuit comprising means for sampling the encoded signal, means for calculating from the sampled values a measure of the correlation function relevant to a particular time frame, the value of said function serving to control operation of an adaptive echo cancellation algorithm, in which the sampled signal portions are truncated such that only the arithmetic sign bit of each signal portion contributes to the function calculation, such that control can be effected on the adaptive algorithm for eliminating unwanted effects.

2. A circuit as claimed in Claim 1, comprising means for controlling the operation of said adaptive algorithm at the end of each time frame for a new function calculation.

3. A circuit as claimed in Claim 1 or 2, in which an incoming signal sample is initally treated in an extraction block arranged to determine the arithmetic sign relevant to that signal, the resulting sign bits being fed in sequence to a shift register arranged to store a predetermined number of said sign bits.

4. A circuit as claimed in Claim 3, which provides outputs from selected locations in the shift register in accordance with a control logic select circuit.

5. A circuit as claimed in Claim 4, in which the output from the said select circuit is combined in a multiplier with arithmetic sign signals extracted from a second signal path, and a multiplier output signal is delivered to an up/down counter.

6. An audio signal processor circuit, substantially as hereinbefore described with reference to the accompanying drawing.

7. A telephone exchange line interface circuit, when including an audio signal processor circuit as claimed in any one of Claims 1 to 6.