GB2232035A - Colour signal format conversion - Google Patents

Description

:2:2 232-1 0 Z3 ES VIDEO SIGNAL FORMAT CONVERSION CIRCUITRY The present

invention relates to a video signal format conversion circuitry.

In the color video signal of the NTSC video format (referred to as NTSC color video signal hereinafter), the number of scanning lines is 525 with the field frequency of 60 Hz, and the sub-carrier frequency is 3.58 MHz. On the other hand, in the color video signal of the PAL video format (referred to as PAL color video signal hereinafter) the number of scanning line is 625 with the field frequency of 50 Hz, and the sub-carrier frequency is 4.43 MHz.

However, there is a demand that the retrieval of images from a disk on which the NTSC color video signal is recorded can also be performed by a PAL video reproduction system, such as a television set for reproducing images from the PAL color video signal. To meet such a demand, it is contemplated to incorporate a signal format conversion circuitry, as shown in Fig. 1, for converting the NTSC color video signal into a pseudo PAL color video signal, as shown in Fig. 1, in a video 1 71.

disk player.

In Fig. 1, an NTSC color video signal -a retrieved from a disk is supplied to a subtractor 2 and an adder 3 through an input terminal IN. The NTSC color video signal -a is also supplied to an 1H delay circuit 1 in which the signal a is delayed for 1H (one horizontal scanning period), and the delayed NTSC color video signal a is supplied to the subtractor 2 and the adder 3. In the subtractor 2, a luminance signal component is canceled, so that only a chrominance signal component is transmitted. Conversely, in the adder 3 the chrominance signal component is canceled so that only the luminance signal component is transmitted. The chrominance signal component issued from the subtractor 2 is supplied to a multiplier 4 in which the color signal component is multiplied with an output signal of an oscillator 5.

The oscillation frequency of the oscillator 5 is set at 854 kHz which is equal to a difference between the frequency (4.43 MHz) of the color subcarrier signal in the PAL color video signal and the frequency (3.58 MHz) of the color sub- carrier signal in the NTSC color video signal. Therefore, a signal obtainable by converting the frequency of the chrominance signal component from 3.58 XHz to 4.43 MHz, is formed in the multiplier 4. The color signal component of 4.43 MHz issued from the multiplier 4 2 is supplied to phase shifters 7 and 8 and a stationary contact Bl of a change-over switch SWl through a bandpass filter 6 whose central frequency of the passing band is 4.43 MHz.

The phase shifter 7 is configured to perform a +450 phase shift of the input signal. The phase shifter 8 is configured to perform a -450 phase shift of the input signal. Output signals of the phase shifters 7 and 8 are respectively supplied to stationary contacts Al and C1 of the change-over switch SW1. A stationary contact D1 of the change-over switch SWl is grounded.

A change-over control signal generating circuit 9 is provided, and its output signal is supplied to a control input terminal of the change-over switch SWl which is configured so that its movable contact El is one of the stationary contacts Al through D1 according to the contents of the change-over control input. The changeover control signal generating circuit 9 is configured to detect, from the horizontal sync signal in the NTSC color video signal a, a period Tj within the horizontal scanning period in which the color burst exists and-a period T2 outside the period Tl, in which the video information signal exists. The circuit 9 generates, as the change-over control signal, a s;-anal for connecting the movable contact El alternately to the stationary 3 1 L contacts Al and Cl at intervals of 1H within the period Tj and for connecting the movable contact El alternately to the stationary contacts Bl and Dl at a periodic rate of 1H during the period T2.

The signal derived at the movable contact El of the change-over switch SWl is supplied to an adder 10 in which it is combined, by summation, with the luminance signal component issued from the adder 3 so that a color video signal is formed. The output signal of this adder 10 is supplied to an output terminal OUT, and'forwarded to a PAL video reproduction system (not shown).

In the circuit whose structure is described above, when the NTSC format color video signal a as shown in Fig. 2A is supplied to the input te-minal IN, a signal obtained by +450 phase shifting the chrominance signal component converted to the frequency of 4.43 MHz and a signal obtained by -450 phase shifting the same chrominance signal are alternately derived at intervals of 1H at the movable contact El of the change-over switch SW1 during the period T1. During the period T2. on the other hand, the chrominance signal component and a signal whose amplitude is zero are alternately derived at the movable contact El. Therefore, the chrominance signal component d issued from the movable contact El of the change-over switch Swl becomes a signal as shown in Fig.

4 2B. This chrominance signal component d is supplied to the adder 10 in which it is combined by summation with the luminance signal component, the color video signal b issued from the adder 10 becomes as illustrated in Fig.

2C.

When this color video signal b is supplied to a PAL video reproduction system (not shown), the signal -b is supplied to a demodulation circuit as shown in Fig. 3. In Fig. 3, the color video signal b is supplied to a Y/C separator circuit 20 and a sync separator circuit 21. In the Y/C separator circuit 20, the luminance signal component and chrominance signal component are separated from the color video signal b, and the luminance signal component is supplied to a picture tube driving circuit (not shown) for driving a picture tube. The chrominance signal, on the other hand, is supplied to a burst phase discriminating circuit 23, a 1H delay line 24, a polarity inverting circuit 25 and an adder 26 via an ACC (automatic color saturation control) circuit 22. The ACC circuit 22 contains a variable gain amplifier 22a for amplifying the chrominance signal component, a burst gate circuit.22b for separating a color burst signal from the chrominance signal component, an ACC detector circuit 22c for generating an ACC voltage corresponding to the level of the color burst signal separated by the burst gate 6 circuit 22b and supplying the voltage to the variable gain amplifier 22a as a gain control signal. With these circuits, the ACC circuit 22 adjusts the gain of the variable gain amplifier 22a so that the level of the color burst signal is maintained constant.

In the burst phase discrimination circuit 23, the color burst signal is separated from the chrominance signal component and supplied to a sub-carrier generator circuit 33, and a reset signal is generated each time when the phase of the color burst signal equals a certain phase. The reset signal is supplied to a T-flip flop 34. To a trigger input terminal of the T-flip flop 34, the horizontal sync signal separated from the color video signal by the sync separator circuit 22 is supplied so that inversion of the T-flop flop 34 occurs at intervals of 1H.

In the 1H delay line 24, the chrominance signal component is delayed for 1H, and the delayed signal is supplied to adders 26 and 27.

In the adder 26, the chrominance signal and the signal obtained by delaying the chrominance signal by 1H is added together. The adder 26 is configured so that the R-Y component in the PAL color video signal with the phase alternation at intervals of 1H is canceled and only the B-Y component is produced. However, in the case of 6 7. the color video signal b, the chrominance signal component exists only during the period T2 which appears every other 1H period. Therefore, the chrominance signal component existing in the period T2 in every other 1H period is issued from the adder 26 also in the period T2 in the next 1H period, so that the chrominance signal component is issued in every 1H period.

In the adder 27, a reverse phase component of the chrominance signal component and the signal obtained by delaying the chrominance signal component by 1H are added together. The adder 27 is configured so that the B-Y component in the PAL color video signal is canceled and only the R-Y component which is inverted in phase in every 1H period is issued. However, as in the case of the adder 26, the chrominance signal component is issued from the adder 27 in every 1H period.

Output signals of the adders 26 and 27 are supplied to synchronous detectors 28 and 29. A color sub-carrier signal is generated by a sub-carrier generating circuit 33 and 900 phase-shifted by a phase shifter 35. The phase-shifted sub-carrier signal is supplied to the synchronous detector 28. The color sub-carrier signal generated by the sub-carrier generating circuit 33 and a signal obtained by 1800 phase-shifting the color sub carrier signal at the phase shifter 35 are alternately 7 is supplied to the synchronous detector 29 via a change-over switch 36 at the periodic rate of 1H. By means of these synchronous detectors 28 and 29, the B-Y signal and the R-Y signal are demodulated, and supplied to the picture tube driving circuit (not shown) via low-pass filters 31 and 32 having the cut-off frequency of 1.3 MHz, so that a color picture is reproduced.

As specifically described in the foregoing, the conventional signal format converting circuitry shown in Fig. 1 contains the phase shifters 7 and 8, coils, capacitors, resistors, etc., and configured to process the input signal and to effect the phase shift in analog form. Therefore, a precise phase shift cannot be performed due to variations in the value of each circuit element, and the operation of the circuitry is easily affected by the temperature characteristic of each circuit element. Because of these reasons, there was a problem a color picture of high quality cannot always obtained.

The present invention is based on the abovedescribed points, and an objective of the present invention is to provide a signal format conversion circuitry for processing a video signal in which the signal format is converted without using the phase shift 8 by analog processes, so that a color picture having high quality is always obtained.

In the signal format conversion circuitry according to the present invention, a first reference signal having a frequency four times the frequency of the color subcarrier frequency in the PAL system is generated, first to third phase shift signals are produced on the basis of the first reference signal and an output signal of dividing means for dividing in frequency the first reference signal by four, the first to third phase shift signals having a frequency the same as the frequency of the output signal of the dividing means and in turn phase shifted by a time period corresponding to one half the period of the first reference signal, and a signal obtained by varying the frequency and phase of the chrominance signal and the color burst signal of an NTSC color video signal by using the first to third phase shift signals is issued as a PAL video signal.

Embodiments of the invention will now be described, by way of example only and with reference to the accompanying drawings, in which:- Fig. 1 is a block diagram showing a conventional signal format conversion circuitry; Figs. 2A through 2C are waveform diagrams showing the function of each part of the circuitry shown in Fig.

1; Fig. 3 is a block diagram showing a demodulator circuit used in the PAL system; Fig. 4 is a block diagram showing an embodiment of the signal format conversion circuitry according to the present invention; Figs. SA through 5D. 6A through 61, 7A through 7D are waveform diagrams showing the function of each part of the circuitry shown in Fig. 4; Fig. 8 is a diagram showing a part of the reproduced picture; Figs. 9A through 9C are waveform diagrams showing the function of the delay circuit 51; Figs. 10A and 10B. 11A and 11B. 12A through 12C are vector diagrams showing the chrominance signal component:

Fig. 13 is a block diagram showing another is embodiment of the present invention; Figs 14A through 141 are waveform diagrams showing the function of each part of the circuitry shown in Fig. 13; and Figs. 15A and 15B, when combined, are a block diagram showing a further embodiment of the present invention, and Fig. 15 is a diagram showing the arrangement of"Figs. 15A and 15B.

Referring to Figs. 4 through 15 of the accompanying 25 drawings, the embodiment of the present invention will be I I. described hereinafter.

In Fig. 4, the 1H delay circuit 1, subtractor 2, adder 3, multiplier 4, and band-pass filter 6 are mutually connected in the same manner as in the circuitry shown in Fig. 1. However, in this embodiment, a band-pass filter 41 is provided and an output signal of the bandpass filter 41 is connected to the multiplier 4. The band-pass filter is configured to have a central frequency of 854 kHz, and an output signal of a multiplier 42 is supplied to the band-pass filter 41. The multiplier 42 receives an output signal of a digital phase shifter 40 and an output signal of an oscillator 43. The oscillator 43 is configured to generate a reference signal r2 whose frequency is the same as the frequency of the color sub-carrier signal in the NTSC format video signal.

The digital phase shifter 40 receives an output signal of an oscillator 44. The oscillator 44 is configured to generate a reference signal rl whose frequency is four times the frequency of the color subcarrier signal in the PAL format video signal. In the digital.phase shifter 40, the reference signal rl is divided in frequency by four at a divider 45, directly supplied to a clock input terminal of a D-flip flop 47, and also supplied to a clock input terminal of a D-flip 11 12 flop 46 via an invertor 48. An output signal of a divider 45 is supplied to a D-input terminal of the D--flip flop 46, and also supplied to a stationary contact Cl of a change-over switch SW1. A i5 output signal of the D-flip flop 46 is supplied to a D-input terminal of the D-flip flop 47 and also supplied to a stationary contact B1 of the change-over switch SW1. A i5 output signal of the Dflip flop 47 is supplied to a stationary contact Al of the change-over switch SW1. A stationary contact Dl of the change-over switch SWl is grounded. To a change-over control input terminal of the change-over switch SW1, the output signal of the change- over control signal generating circuit 9 is supplied as in the case of the circuitry shown in Fig. 1.

The chrominance signal component issued from the band-pass filter 6 is supplied to one of the input terminals of the adder 10 through a gain controller 50. The gain controller 50 consists of means for sensing the period Tj in which the color burst signal is present and generating a gain decrease command signal, and a variable gain amplifier whose gain is lowered in response to the gain decrease command signal. To the other input terminal of the adder 10, the luminance signal component which is the output signal of the adder 3 delayed for a time period TD by means of a delay circuit 51. The chrominance 12 13 signal component and the luminance signal component are combined by summation at the adder 10, so that a color video signal is provided. The delay time TD in the delay circuit 51 is set at a value equal to a summation (250 nanoseconds + A D) between a value corresponding to a half of the difference between 1H in the NTSC system and 1H in the PAL system and a delay time A D in the bandpass filter 6.

The output signal of the adder 10 is supplied to an amplitude suppresser circuit 52 and a vertical sync separator circuit 53. In the vertical sync separator circuit 53, the vertical sync signal is separated from the color video signal issued from the adder 10, and the vertical sync signal is supplied to a monostable multivibrator (referred to as HMV hereinafter) 54. The MMV 54 is configured to be triggered by a leading edge of the output signal of the vertical sync separator circuit 53 and generate a pulse signal which is present during a period T3 starting from a time of extinction of the vertical sync signal and a time of completion of the vertical blanking period. This output pulse signal of the MW 54 is supplied to the amplitude suppresser circuit 52. The amplitude suppresser circuit 52 is configured to limit the instantaneous level of an input signal below a level VA slightly higher than the pedestal level for 13 1 L example in response to the output pulse signal of the Mw 54. An output signal of the amplitude suppresser circuit 54 is supplied to an output terminal OUT.

In the structure described above, the following operations are performed. As shown in Fig. SA, the reference signal rl having a frequency four times the frequency of the color sub-carrier signal of the PAL format video signal is issued from the oscillator 44. The output signal of the divider 45 for dividing this reference signal rl by four will become as shown in Fig. 5D. This output signal of the divider 45 is supplied to the D input terminal of the D- flip flop 46 as a phase shift signal fsc3 having the same frequency as the color sub-carrier signal in the PAL system, and also supplied to a stationary contact Cl of the change-over switch SW1.

Since the reference signal rl is supplied to the clock input terminal of the D-flip flop 46 through the invertor 48, the phase shift signal fsc3 is held in the D-flip flop 46 by the falling edge of the reference signal rj, and the Q output signal of the D-flip flop 46 becomes equal to a signal obtained by advancing in phase the phase shift signal fsc3 by 450, as shown in Fig. SC. The Q output signal of the D-flip flop 46 is supplied to the D-input terminal of the D-flip flop 47 as a phase shift signal fsc2, and also supplied to the stationary 14 Is contact Bl of the change-over switch SWj.

Since the reference signal rl is directly supplied to the clock input terminal of the D-flip flop 47, the phase shift signal fsc2 is held in the D-flip flop by the leading edge of the reference signal rl, and the output signal of the D- flip flop becomes equal to a signal obtained by advancing in phase the phase shift signal fsc2 by 450, as shown in Fig. 5B. This Q output signal of the D-flip flop 47 is supplied to the stationary contact Al of the change-over switch SWl as the phase shift signal fscl.

Assuming that an NTSC color video signal a as shown in Fig. 6A is supplied to the input terminal IN, the movable contact El of the change- over switch SW1 makes contact in turn with the stationary contacts Al, C1, Djr and Bl as in the manner shown in Figs. 6B through 6E. Specifically, during the period Tj in which the color burst signal exists, the movable contact El is connected alternately to the stationary contacts Al and C1 at intervals of 1H. In the period T2 in which the video information signal is present, the movable contact E 1 connects alternately to the stationary contacts B1 and Dl at the periodic rate of 1H. As a result, the phase shift signals fscl and fsc3 are alternately derived at the movable contact El at intervals of 1H during the period is T1, and the phase shift signal fsC2 and the ground level are alternately derived at the periodic rate of 1H at the movable contact El during the period T2. Since the signal derived at the movable contact El is supplied to the multiplier 42 and multiplied with the reference signal r2 having the frequency of 3.58 MHz, a signal having the frequency of 854 KHz, that is, the difference between the frequency of the phase shift signals fscl through fsc3 and the frequency of the reference signal r2 is produced.

As shown in Fig. 6F, this signal is a signal c for conversion, whose phase changes alternately between -450 and +450 at intervals of 1H during the period Tl, and whose amplitude reduces to zero every other 1H period during the period T2 The signal c for the conversion at 854 kHz is supplied to the multiplier 4 through the band-pass filter 41. In the multiplier 4, a color signal component d as shown in Fig. 6G is formed. The color signal component d has the frequency of 4.43 MHz differing from the chrominance signal component in the NTSC system by 854 Khz, its phase alternation between +450 and -450 occurs at the periodic rate of 1H, and the amplitude of its video information part reduces to zero every other 1H period. The chrominance signal component d is supplied to a gain control circuit 50 through the band-pass filter 6 16 17 so that the color burst signal level drops by a predetermined amount. In this way a chrominance signal is produced by the gain control circuit 50. The chrominance signal e issued from the gain control circuit 50, as shown in Fig. 6H, is supplied to the adder 10, in which the chrominance signal is combined, by addition, with the luminance signal component which is delayed for the period TD by the delay circuit 51. In this way, a color video signal b as shown in Fig. 61 is produced.

The color video signal b is supplied to the amplitude suppresser circuit 52 and vertical sync separator circuit 53. As a result, a vertical sync signal v as shown in Fig. 7B existing during a vertical sync period TV in the vertical blanking period TE Of the color video signal b as shown in Fig. 7A is issued from the vertical sync separator circuit 53. When the vertical sync signal v is supplied to the MMV 54, the MXV 54 is triggered by the leading edge of the vertical sync signal v, and a pulse j2 existing during a period TQ as shown in Fig. 7C is issued from the MMV 54. When the pulse.2 is supplied to the amplitude limiting circuit 52, the amplitude limitation operation is performed so that the instantaneous level of the color video signal b is maintained below the level VA which is slightly higher than the pedestal level. As a result, the code signal 17 I's inserted into certain lines within the vertical flyback period TE Of the color video signal substantially disappear as shown in Fig. 7D. The color video signal b issued from the amplitude suppresser circuit 51 is supplied to the output terminal OUT and in turn forwarded to a PAL video reproduction system (not shown). Thus, production of images disagreeable to see, which would be formed by changes in the luminance level caused by the presence of the code signals, is prevented.

The frequency of the color video signal b derived at the output terminal OUT is identical with the horizontal sync frequency in the NTSC system. Therefore, if the color video signal b is supplied to a PAL video reproduction system (not shown), a color error will be generated since the delay time of the 1H delay line 24 in the demodulator as shown in Fig. 3 is set to the 1H period (64 g s) of the PAL color video signal. Specifically, during the period in which the amplitude of the chrominance signal component of the color video signal b is equal to zero only the chrominance signal component of 1H before, which is supplied to the adders 26 and 27 through the 1H delay line 24, is supplied to synchronous detectors 28 and 29. During the period in which the amplitude of the chrominance signal component is not equal to zero, only the chrominance signal 18 I CI component directly supplied to the adders 26 and 27 is supplied to the synchronous detectors 28 and 29 for the reproduction of color pictures. Therefore, as shown in Fig. 8, an error w of 500 nanoseconds corresponding to the difference between 1H of the PAL color video signal and 1H of the NTSC color video signal is generated between the color signals of adjacent two of scanning lines Ln through Ln+3. However, as shown in Fig. 9A the color video signal b consists of the chrominance signal component shown in Fig. 9C and the luminance signal component shown in Fig. 9B delayed by the delay circuit 51 for the period TD (# 250 nanoseconds) with respect to the chrominance signal component. Therefore, contour lines formed by the luminance signal component on the adjacent scanning lines Ln through Ln+3 are positioned at the middle of the error of color signals, as shown by the one-dot chain line in Fig. 8. Therefore, the color error becomes less noticeable.

The amplitude of the chrominance signal component of the color video signal b is reduced to zero during the period T2 every other 1H period. Therefore, when thecolor video signal b is supplied to the video reproduction system (not shown), the amplitude of one of two input signals of the adders 26 and 27 in the demodulator as shown in Fig. 3 of the video reproduction 19 2 0 system, i.e., the-amplitude of one of the chrominance signal and the signal obtained by delaying the chrominance signal for 1H is reduced to zero. Therefore, the level of the chrominance signal component issued from the adders 26 and 27 becomes lower than the case in which the regular PAL color video signal with chrominance signal component whose amplitude will not be reduced to zero is supplied.

The chrominance signal component of the regular PAL color video signal can be expressed by a vector diagram of Fig. 10A. Fig. 10A shows the chrominance.signal component fj and the color burst signal gj accompanying the chrominance signal component fj in successive two H periods. The R-Y component of the chrominance signal component fl is alternately inverted in phase with respect to a B-Y axis at the periodic rate of 1H. In this state, the color burst signal gl is issued with the phase alternation of +1350 correspondingly to the phase alternation of the R-Y signal component. In the case of the regular PAL color video signal, the synchronous detection is effected to a chrominance signal component f2, as shown in Fig. 10B, obtained by the summation of a chrominance signal component fj and a signal obtained by inverting only the R-Y component of the chrominance signal fj of 1H before.

21.

Turning to the color video signal b, the chrominance signal component can be expressed by a vector diagram as shown in Fig. 11A. Also in Fig. 11A, a chrominance signal component f1l in successive two 1H periods and a color burst signal g1l accompanying the chrominance signal component f1l are illustrated in the similar manner as Fig. 10A. The amplitude of the chrominance signal component fl, drops to zero every other 1H period, while the color burst signal g1l is issued in the similar manner as the color burst signal of the regular PAL color video signal. Therefore, in the case of the color video signal b, the chrominance signal component fl, as it is becomes the chrominance signal component f2' to be synchronously detected, and the level of the chrominance signal component supplied to the synchronous detectors 28 and 29 becomes lower than the level obtained in the case of the regular PAL color video signal.

However, the level of the color burst signal g1l of the color video signal b is made small by the amplitude suppresser circuit 52, as shown in Fig. 12A. Therefore, by the ACC circuit 22 in the video reproduction signal, the gain.of the amplifier for amplifying the color burst signal g1l and the chrominance signal component f1l is increased until the level of the color burst signal g1l reaches a predetermined level, as shown in Fig. 12B.

21 2-2. Therefore, the level of the color signal component f2' to be synchronously detected is increased as illustrated in Fig. 12C, so that reduction of the chrome intensity can be prevented.

Fig. 13 is a block diagram showing another embodiment of the present invention. In this embodiment, the 1H delay circuit 1, subtractor 2, adder 3, multiplier 4, band-pass filter 6, delay circuit 51, amplitude suppresser circuit 52, vertical sync separator circuit 53, and MMV 54 are mutually connected in the same manner as in the circuitry shown in Fig. 4. In this embodiment, however, the output signal of the band-pass filter 6 is directly supplied to the adder 10, and the signal derived at a movable contact C2 of a change-over switch SW2 is supplied to the multiplier 4. A change-over control signal generating circuit 61 is provided and its output signal is supplied to a control input terminal of the change-over switch SW2. The change-over switch SW2 is configured so that the movablecontact C2 is connected to one of stationary contacts A2 and B2 corresponding to the signal supplied to the change-over control input. The change-over control signal generating circuit 61 is configured to sense, for example by the horizontal sync signal of the NTSC color video signal, the period Tj in which the color burst signal exists and the period T2 in 22 23 which the video information signal exists, in each horizontal scanning period. In accordance with the result of the sensing, the change-over control signal generating circuit 61 generates a signal for controlling the movable contact C2 to connect to the stationary contact B2 during the period Tj and connect to the stationary contacts A2 and B2 alternately at the periodic rate of 1H during the period T2- To the stationary contact A2 of the change-over switch SW2, an output signal of a band-pass filter 62 is supplied. The central frequency of the passing band of the band-pass filter 62 is set at 8.01.MHz. To the stationary contact B2 of the change-over switch SW2r an output signal of a band-pass filter 41 is supplied. The output signal of the multiplier 42 is supplied to band- pass filters 41 and 62. The output signals of the digital phase shifter 40 and oscillator 43 are supplied to the multiplier 42 as in the case of the circuitry shown in Fig. 4.

The digital phase shifter 40 is configured as in the circuitry shown in Fig. 4. However, in this embodiment the change-over control signal generating circuit 9 in the digital phase shifter 40 is configured to generate a change-over control signal so that the movable contact El of the change-over switch SWl connects to the stationary 23 24 contacts Al and Cl alternately at the periodic rate of 1H during the period Tj and the movable contact El connects to the stationary contact B1 during the period T2- In the structure described above, when the NTSC color video signal a as shown in Fig. 14A is supplied to the input terminal IN, the movable contact El of the change-over switch SW1 connects in turn to the stationary contacts Al, C1. and B1 as illustrated in Figs. 14B through 14D by means of the change-over control signal generating circuit 9. Specifically, in the period Tj in which the color burst signal exists, the movable contact El alternately connects to the stationary contacts Al and C1 at the periodic rate of 1H, and the movable contact El connects to the stationary contact B1 during the period T2 in which the video information signal exists. As a result, the phase shift signals fscl and fsc3 are alternately derived at the movable contact El at the periodic rate of 1H during the period T1, and the phase shift signal fsc2 is derived at the movable contact El during the period T2- Since the signal derived at the movable contact El is supplied to the multiplier 42 and multiplied with the reference signal r2 of 3.58 MHz, the multiplier 42 produces two signals having frequencies of 854 kHz and 8.01 MHz respectively, which correspond to the difference between the frequency of the phase signals 24 2-5 fscl through fsC3 and the frequency of the reference signal r2 and the sum of these frequencies, and whose phases alternately change by the amounts of +450 and -450 at the periodic rate of 1H during the period Tj and do not change during the period T2- The signal having the frequency of 854 kHz of these two signals is supplied to the stationary contact B2 Of the change-over switch SW2 through the band-pass filter 41, and the signal having the frequency of 8. 01 MHz is supplied to the stationary contact A2 of the change-over switch SW2 through the band-pass filter 62..

By the change-over control signal generating circuit 61, the movable contact C2 of the change-over switch SW2 connects alternately to the stationary contacts B2 and A2 as illustrated in Figs. 14D and 14E. Accordingly, the signal of 854 kHz is derived at the movable contact C2 during the period Tl, and the two signals of 854 kHz and 8.01 MHz are alternately derived at the movable contact C2 at the periodic rate of 1H during the period T2. SO that a signal for conversion cl as shown in Fig. 14G is produced. The signal for conversion cl is supplied to the multiplier 4, so that the chrominance signal component according to the NTSC system is multiplied with the signal for conversion cl in the multiplier 4.

Assuming that one of the input signals of the 2-6 multiplier 4 is expressed by cos and the other of the input signals is expressed by cos In this case, the output signal of the multiplier 4 is expressed by the following equation.

cos a - cos # = (112) {cos (a + 0) + cos Since one of the input signals of the multiplier 4 is the signal cl for the conversion, cos a becomes equal to COS (cO P - w N) in the period T1. Also, the cos a alternately equals cos (w p - w N) and cos (cL) P + (0 N) at the periodic rate of 1H during the period T2. On the other hand, the other input signals of the multiplier 4 is the chrominance signal component in the NTSC system, cos p becomes equal to cos (cO N + 0). In the above expression, w p represents the angular frequency of the sub-carrier in the PAL system. and w N represents the angular frequency of the sub- carrier in the NTSC system.

Therefore, the output signal of the multiplier 4 becomes a signal expressed by the following equation (2) during the period T1.

cos ( 60 P - (0 N) COS N + = (l/2) {cos (wp+ 0) +cos (wp-2o)N- 95)}..(2) During the period T2. the output signal of the multiplier 4 alternately becomes equal to the signal expressed by the above-equation (2) and a signal expressed by the 26 2-7 following equation.

Cos ( W P + 0) N) 'COS (1w N + (1/2) jcos(&) p + 2w N + + Cos (a) P + This output signal of the multiplier 4 passes through the band-pass filter 6 of 4.43MHz (w p), a chrominance signal component d, of 4.43 MHz whose phase alternates with respect to the B-Y axis at the periodic rate of 1H. as illustrated in Fig. 14H. This chrominance signal d, is supplied to the adder 10, to be combined by addition with the luminance signal component which is delayed by TD at the delay circuit 51. As a result, a color video signal bl shown in Fig. 141 is produced.

Since the amplitude of the chrominance signal component of the color video signal bl will not be reduced to zero at the periodic rate of 1H, the chrome intensity will not be reduced when the color video signal b, is supplied to the PAL video reproduction system.

Fig. 15 is a block diagram showing a video disk player equipped with a signal format conversion circuitry according to the present invention. In the Figure, the disk 71 is rotated by a spindle motor 72. As the disk 71 rotates,. the signal recorded on the disk 71 is retrieired by means of a pickup 73. So-called RF signal, i. e. a reading signal issued from the pickup 73, is supplied to a demodulator circuit 74 which, for example, comprises an 27 2-S FM demodulator, so that a color video signal is demodulated. The color video signal is supplied to a CCD (Charge Coupled Device) 75. Clock pulses issued from a VCO (Voltage Controlled Oscillator) 76 are supplied to the CCD 75. In the CCD 75, the color video signal is delayed for a time interval corresponding to the frequency of the clock pulses. The color video signal passed through the CCD 75 is supplied to a variable phase shifter 77, a burst gate circuit 78, and a sync separator circuit 79.

In the sync separator circuit the horizontal sync signal is separated from the color video signal and supplied to the phase comparator circuit 80 as a playback horizontal sync signal. In the phase comparator circuit 80, a phase comparison is performed between a reference horizontal sync signal supplied from the reference signal generating circuit 81 and the playback horizontal sync signal, and a time-base error signal corresponding to the phase difference between the signals is generated. The time-base error signal is supplied to an equalizer 82. The amplification and phase compensation operations of the time-base error signal are performed in the equalizer 82, to produce a control voltage for the VCO 76, and a driving signal of the spindle motor 72 is generated. The driving signal generated by the equalizer 82 is supplied 28 2q to the spindle motor 72 through the drive circuit 83, and the speed of rotation of the disk 71 is controlled so that the phase difference between the reference and playback horizontal sync signals equals a predetermined value. The control voltage generated by the equalizer 82, for example, is supplied to the VCO 76 and the signal delay time in the CCD 75 is controlled so that the phase difference between the reference and playback horizontal sync signals equals a predetermined value. The time- base error is compensated in this manner.

In the burst gate 78 on the other hand, a color burst signal or a pilot burst signal is separated from the color video signal, and supplied to the phase comparator circuit 85. In the phase comparator circuit 85, the phase comparison is performed between this burst signal and a reference sub-carrier signal issued from the reference signal generating circuit 81, and a phase error signal corresponding to the phase difference between both signals is generated. The phase error signal is supplied to the variable phase shifter 77, and the color video signal is phase- shifted so that the phase of the color burst signal equals in phase the reference sub-carrier signal. The color video signal issued from the variable phase shifter 77 is supplied to a character insertion circuit 86. The character insertion circuit 86 is 29 configured to generate a video signal corresponding to characters indicated by data issued from a system controller (not shown) in accordance with the reference signal r3 supplied from the reference signal generating circuit 81, and insert the generated video signal into the color video signal.

In the reference signal generating circuit 81, the reference horizontal sync signal is issued from a movable contact C3 of the change-over switch SW3. An output signal of a divider 8lb is supplied to a stationary contact A3 of the change-over switch SW3. The divider 81b is configured to divide in frequency the signal derived at a movable contact of a change-over switch SW8 by a factor of 11910. To the stationary contacts AB and B8 of the change-over switch SW8, output signals of oscillators 81a and 81g are supplied. The oscillator 81a is configured to generate a signal having a frequency 4fsc(N) which is four times the frequency of the color sub-carrier signal in the NTSC system. On the other hand, the oscillator 81g is configured to generate a signal whose frequency is expressed by 4fsc(N)fH(N)/fH(P).-The fH (N) represents the frequency of the horizontal sync signal in the NTSC system, and fH(P) represents the horizontal sync frequency in the PAL system.

The change-over switch SW8 is configured to 1 31 selectively issue the output signal of the oscillator 81a by the connection of its movable contact C8 to the stationary contact A8 when the change-over control input is at a high level, and selectively issue the output signal of the oscillator 81g by the connection of its movable contact C8 to its stationary contact B8 when the change-over input signal is at a low level. The changeover control input terminal of the change-over switch SW8 is connected to a terminal of a switch SW6 of a lock type. The power supply voltage is supplied to the terminal of the switch SW6 through a register R. The other terminal of the switch SW6 is connected to ground. A low level signal which is generated at the terminal of the switch S76 when the latter is at the on-position is issued as a signal format conversion command signal.

To the stationary contact of the change-over switch SW3 an output signal of a divider 81e dividing an output signal of an oscillator 81d by 240 is supplied. The oscillator 81d is configured to generate a signal of 3.75 MHz being the frequency of a pilot burst signal to be inserted into a predetermined section of the PAL color video signal when the PAL color video signal is recorded on the disk.

The change-over switch SW3 is configured so that its movable contact C3 connects to the stationary contact A3 31 32 to selectively transmit the output signal of the divider 8lb when the change-over control signal is at the high level, and the movable contact C3 connects to the stationary contact B3 to selectively transmit the output signal of the divider 81e, that is. the signal having the horizontal scanning frequency in the PAL system when the change-over control signal is at the low level. An output signal of a signal format discriminator circuit 87 is supplied to the change-over control input terminal of this change-over switch SW3. The signal format discriminator circuit 87 is configured for example to detect whether or not the pilot signal is inserted in the color video signal retrieved from the disk, and generate a signal format detection signal indicating whether the retrieved color video signal is the PAL color video signal or the NTSC color video signal. The detail of such a signal format discriminator circuit 87 is disclosed in Japanese Patent Application No. 63-12240.

The reference sub-carrier signal is issued from a movable contact C4 of a change-over switch SW4. To a stationary contact A4 of the change-over switch SW4. an output signal of a divider 81c generating a reference signal r2 by dividing an output signal of the change-over switch SW8 by 4 is supplied. The output signal of the oscillator 81d is supplied to a stationary contact B4 Of 32 33 the change-over switch SW4. The change-over switch SW4 is configured so that its movable contact C4 connects to the stationary contact A4 to selectively transmit the output signal of the divider 81c when the signal level at its change-over control input is high, and the movable contact C4 connects to the stationary contact B4 to selectively transmit the output signal of the oscillator 81d, i.e., the signal having the frequency of the pilot burst signal when the signal level at its change-over control input is low. The output signal of the signal format discriminator circuit 87 is supplied to the change-over control input of the change-over switch SW4 The reference signal r3 is issued from the movable contatct C5 of the change-over switch SW5. The output signal of the change-over switch SW8 is supplied to a stationary contact AS of a change over switch SW5. To a stationary contact B5 of the change- over switch SW5, an output signal of an oscillator 81f is supplied. The oscillator 81f is-configured to generate a reference signal rl having a frequency four times the frequency of the color sub- carrier frequency in the PAL system. The change-o.ver switch SW5 is configured so that its movable contact C5 connects to the stationary contact AS to selectively transmit the output signal of the change-over switch SW8 when a signal level at its change-over control 33 ZL. input is high and the movable contact C5 connects to the stationary contact B5 to selectively transmit the reference signal rl having the frequency four times the frequency of the color sub-carrier signal in the PAL system when the signal level at its change-over control input is low. The output signal of the signal format discriminator circuit 87 is supplied to the change-over control input of this change-over switch SW5.

The color video signal issued from the character insertion circuit 86 is supplied to a stationary contact A7 of a change- over switch SW7, and also to a signal format conversion circuit 91. The output signal of the signal format conversion circuit 91 is supplied to a stationary contact B7 of the change-over switch SW7- In the signal format conversion circuit 91, circuit elements are mutually connected in the same manner as in the circuit shown in Fig. 4 except that the oscillators 43 and 44 are eliminated. In this signal format conversion circuit 91, the reference signal r2 issued from the divider 81c is supplied to the multiplier 42. The reference signal rl issued from the oscillator 81f is supplied to that divider 45, D-flip flop 47, and invertor 48.

The change-over switch SW7 is configured that its movable contact C7 connects to the stationary contact A7 34 1 315 to transmit the color video signal issued from the character insertion circuit 86 when the signal level at the change-over control input is high, and the movable contact C7 connects to the stationary contact B7 to transmit the color video signal whose signal format is changed by the signal format conversion circuit 91 when the signal level at the change- over control input is low. The color video signal derived at the movable contact C7 of the change-over switch SW7 is supplied to the output terminal OUT.

With the structure described above, when the switch SW6 is turned off, the low level signal format conversion command signal is not issued, and the output signal of the oscillator 81a that is, the signal of 4fsc(N), is selectively issued from the change-over switch SW8, and the switch control of the change-over switches SW3 through SWS is performed by the output signal of the signal format discriminator circuit 87. By this operation, the retrieval of information is performed in a good manner both from the disk carrying NTSC color video signal is recorded and the disk carrying the PAL color video signal. In this case, the color video signal from the character insertion circuit 86 is directly transmitted from the change-over switch SW7 to the output terminal, so that the color video signal retrieved from 3E> the disk is forwarded as it is.

When the switch SW6 is turned on by a manual operation, the low level signal format conversion command is issued. Then, the output signal of the oscillator 81g, that is, the signal of 4fsc(N)fH(N)/fH(P) is selectively issued from the change-over switch SW8 in the reference signal generating circuit 81. As a result, the reference horizontal sync signal having the frequency equal to the horizontal sync frequency in the PAL system is provided.

The burst phase comparison is performed by using, as a reference, the signal obtained by dividing the output signal of the oscillator Blg by four. The conversion of the chrominance signal is also performed by using the signal obtained by dividing the output signal of the oscillator 81g by four. As the same time, the output signal of the signal format conversion circuit 91 is derived from the change-over switch SW7.

Therefore, by loading the disk on which the NTSC color video signal is recorded, a pseudo PAL color video signal converted by the signal format conversion circuit 91 is obtained automatically. The horizontal sync frequency of this pseudo PAL color video signal becomes equal to the horizontal sync frequency of the regular PAL color video signal. Therefore, when the pseudo PAL color video signal is supplied to the PAL demodulator circuit 36 37.

shown in Fig. 18, the chrominance signal component is delayed accurately by 1H, so that color error will not be generated in the reproduced picture. Therefore, in the signal format conversion circuit 91, it is sufficient to set the delay time of the delay circuit 51, which delays the luminance signal component, to be equal to the delay time of the band-pass filter 6.

As specifically described in the foregoing, in the video signal format conversion circuitry according to the present invention, a first reference signal having the frequency four times the frequency of the color subcarrier signal in the PAL system is generated, and first to third phase shift signals are generated on the basis of an output signal of dividing means for dividing the first reference signal by four, the first to third phase shift signals having a frequency identical with the frequency of the output signal of the dividing means and respectively having phases shifted in turn by an amount corresponding to a half of the period of the first reference signal, and a video signal obtained by changing the frequency and phase of the chrominance signal component and the color burst signal of the NTSC color video signal is issued as a PAL format color video signal.

Therefore, in the signal format conversion circuitry 37 3 8 according to the present invention, phase shifters for performing the phase shift by the analog processing are not used, so that the color picture is always obtained with good quality without being affected by variations of operating values or temperature characteristic of circuit elements of the phase shifters.

is c 38

Claims (2)

1. CLAIMS:

   - 39 1. A video signal format conversion circuitry, comprising: first reference signal generating means for generating a first reference signal having a frequency four times the frequency of a color sub-carrier signal in the PAL system; dividing means for dividing said first reference signal by four; phase shift signal generating means for generating first, second, third phase signals on the basis of an output signal of said dividing means, said first to third phase shift signals having a frequency identical with the frequency of said output signal of said dividing means, and having phases in turn shifted by a period corresponding to a half the period of said first reference signalr wherein a video signal obtained by varying the frequency and the phase of a chrominance signal component and a color burst signal of a video signal of the NTSC system is issued as a PAL video signal.
2. 2.. A video signal format conversion circuit substantially as hereinbefore described with reference to and as illustrated in any one of figures 4, 13 and 15 of the accompanying drawings.

   i 39 Published 1990 atThe Patent Office. State House.6671 High Holborn. London WC1R4TP.Further copies may be obtained from The Patent Office.

   1QqOkt.ThpPa-tentoff,,. RA'71 T-Tio'hT-T11,,,T.IrinnU7r'.1'R4T1 'Wirth"nnicmnihPnhtained from The Patent Office.