JPH02292994A - Video signal format conversion circuit - Google Patents

Abstract

PURPOSE:To prevent the occurrence of a prescribed code picture by detecting a prescribed section in a vertical flyback time when a prescribed code of a video signal is inserted and suppressing the amplitude so as to prevent the instantaneous level of the video signal from exceeding a prescribed level. CONSTITUTION:An NTSC color video signal (a) is supplied directly to a subtractor 2 and an adder 3 via an input terminal IN as well as to a 1H delay circuit 1. At the same time, the signal (a) is supplied to a switch control signal generating circuit 9 of a digital phase shifter 40 for production of an NTSC/PAL system conversion signal (c). Thus the chroma signal component obtained by the subtractor 2 is converted into a frequency corresponding to a PAL system with the signal (c) and synthesized with a luminance signal component via an adder 10. The output of the adder 10 is supplied to an amplitude suppression circuit 52 and a vertical synchronizing separator 53 for detection of a prescribed section where a prescribed code of the video signal is inserted. Then the circuit 52 is controlled by an MMV 54 so that the instantaneous level of the video signal does not exceed a prescribed level in accordance with the detection signal.

Description

TECHNICAL FIELD The present invention relates to a signal format conversion circuit for video signals.

Background Art A color video signal based on the NTSC system (hereinafter referred to as NTSC)
(referred to as a color video signal), the number of scanning lines is 5.
The field frequency is 60 Hz, and the color subcarrier frequency is 3.58 MHz. In addition, color video signals based on the PAL system (hereinafter referred to as P
In the AL color video signal), the number of scanning lines is 625, the field frequency is 50 Hz, and the frequency of the color subcarrier is 4.43 MHz.

There is a demand for a PAL video playback device such as a television receiver that plays video using PAL color video signals to be able to obtain video recorded on a disc on which NTSC color video signals are recorded. It has been considered to provide a video disc player with a format conversion path as shown in FIG. 13 for pseudo-converting a color video signal into a PAL color video signal.

In Figure 13, the NTSC read from the disk
The color video signal a is sent to the subtracter 2 via the input terminal IN.
and directly supplied to the adder 3 and 1; IH delay circuit 1
After being delayed by IH (one horizontal scanning period), the signal is supplied to the subtracter 2 and adder 3. In the subtracter 2, the luminance signal component is canceled and only the color signal component is output, and in the adder 3, the color signal component is canceled and only the luminance signal component is output. The color signal component output from the subtracter 2 is supplied to a multiplier 4 and multiplied by the output of an oscillator 5.

The oscillation frequency of the oscillator 5 is equal to the difference between the frequency of the color subcarrier in the PAL color video signal (4.43MHz) and the frequency of the color subcarrier in the NTSC color video signal (3.58MHz), that is, 8
The frequency is 54kHz. Therefore, in the multiplier 4, a signal obtained by converting the frequency of the color signal component from the subtracter 2 from 3.58 MHz to 4.43 MHz is formed.

The 4.43 MHz color signal component output from the multiplier 4 is supplied to the phase shifters 7 and 8 and the fixed contact B1 of the changeover switch SW+ via the bandpass filter 6 whose passband center frequency is 4.43 MHz. be done.

The phase shifter 7 is configured to shift the phase of the supplied signal by +45°. Further, the phase shifter 8 is configured to sum-shift the co-fed signal by -45@. The outputs of these phase shifters 7.8 are supplied to each of the fixed contacts A1 and C1 of the changeover switch SW1. In addition, the changeover switch SW1
The fixed contact D1 is grounded.

The output of the switching control signal generating circuit 9 is supplied to the control input terminal of the switching switch SW1. Changeover switch SW1
is configured such that the movable contact E1 contacts one of the fixed contacts A1 to D1 according to a switching control input.

For example, the switching control signal generation circuit 9 uses a horizontal synchronizing signal in the NTSC color video signal a to detect a period T1 in which a color burst exists in each horizontal scanning period and a period other than this period T1 in which a video information signal exists. T2 is detected, and during period TI, movable contact E1 changes to fixed contact A! every IH! and CI, and generates a signal for controlling the movable contact E1 to alternately contact the fixed contacts B1 and D1 every IH during the period T2.

The signal led to the movable contact El of the changeover switch SW+ is supplied to the adder 10 and is added and combined with the luminance signal component output from the adder 3 to form a color video signal. The output of this adder 10 is supplied to an output terminal OLIT and sent to a PAL video playback device (not shown).

In the above configuration, the NTS as shown in FIG. 14(A)
When the C color video signal a is supplied to the input terminal IN,
During the period T1, the movable contact E1 of the changeover switch SW1 receives a signal obtained by shifting the color signal component frequency-converted to 4.43 MHz by +45 degrees, and a signal obtained by shifting the phase of the color signal component by +45°.
A signal obtained by shifting the phase by 45 degrees is output alternately every IH, and during period T2, the color signal component and a signal with zero amplitude are output alternately every IH. Therefore, the color signal component d output from the movable contact E1 of the changeover switch SWI becomes a signal as shown in FIG. 14(B). This color signal component d is supplied to the adder 10 and combined with the luminance signal component, so that the color video signal b output from the adder 10 becomes as shown in FIG. 14(C).

This color video signal b is transmitted to a PAL video playback device (
In this PAL video reproducing apparatus, the color video signal b is supplied to a demodulation circuit as shown in FIG. 15.

In FIG. 15, color video signal b is supplied to a Y/C separation circuit 20 and a sync separation circuit 21. In FIG. The Y/C separation circuit 20 separates the color video signal b into a luminance signal component and a color signal component, and the luminance signal component is supplied to a picture tube drive circuit (not shown) that drives the picture tube.

Further, the color signal component passes through an ACC (automatic color saturation control) circuit 22, a burst phase discrimination circuit 23, and an IH delay line 2.
4, supplied to the polarity inversion circuit 25 and adder 26.

The ACC circuit 22 includes a variable gain amplifier 22a that amplifies the color signal component, a burst gate circuit 22b that separates the color burst signal from the color signal component, and a burst gate circuit 22b that amplifies the color burst signal according to the level of the color burst signal separated by the burst gate circuit 22b. variable gain amplifier 22
ACC detection circuit 22c that supplies the gain control signal to a
The gain of the variable gain amplifier 22a is controlled so that the level of the color burst signal is constant.

In the burst phase discrimination circuit 23, the color burst signal is separated from the color signal component, and the subcarrier generation circuit 23 separates the color burst signal from the color signal component.
On the other hand, a reset signal is generated every time the phase of the color burst signal supplied to the output terminal 3 reaches a predetermined phase. This reset signal is supplied to the T-type flip-flop 34. T
A horizontal synchronization signal separated from the color video signal by the synchronization separation circuit 22 is supplied to the trigger input terminal of the T-type flip-flop 34.
is inverted every 1H.

On the other hand, in the IH delay line 24, the color signal component is delayed by IH and is supplied to adders 26 and 27.

In the adder 26, the color signal component and this color signal component are
The signal obtained by delaying by H is added. In this adder 26, the PA whose phase is inverted every IH
The R-Y component in the L color video signal is canceled and the B-
Although only the Y component is output, in the color video signal b, as shown in FIG. 14(C), the color signal component exists only in the period T2 every IH, The color signal component existing in the period T2 of every IH is also output in the period T2 of the next IH, and the color signal component is output for each H.

Further, in the adder rough, the opposite phase component of the color signal component and the signal obtained by delaying the color signal component by IH are added. In this adder 27, the B-Y component in the PAL color video signal is canceled and only the R-Y component, which is inverted every IH, is output. Similarly, the adder 27 also outputs a color signal component for each H.

The outputs of these adders 26 and 27 are sent to the synchronous detection circuit 28.
29. The synchronous detection circuit 28 is supplied with color subcarriers generated by the subcarrier generation circuit 33 and phase-shifted by 90° by the phase shifter 35. Further, the synchronous detection circuit 29 receives the color subcarrier generated by the subcarrier generation circuit 33 and a signal obtained by shifting the phase of this color subcarrier by 180 m by a phase shifter 35 through a changeover switch 36.
It is supplied alternately every H. These synchronous detection circuits 2
The B-Y signal and the R-Y signal are demodulated by 8.29 and supplied to a picture tube drive circuit (not shown) via a low-pass filter 31.32 with a cutoff frequency of 1.3 MHz to produce a color image. is played.

However, the color video signal b output from the conventional signal format conversion circuit as shown in FIG.
When supplied to the L format video playback device, the number of scanning lines of the color video signal b is 525, which is the same as the number of scanning lines in the NTSC format, which is smaller than the PAL format.
As shown in the figure, an image pε based on the signal within the vertical retrace period of the color video signal b is also displayed on the screen.

On the other hand, a code called a Phillips code representing a frame number or the like is inserted into a portion corresponding to a predetermined line within the vertical retrace period of a color video signal read from a disc. This code is inserted as a signal whose instantaneous level is within the level range from the vedestal level Vp to the white level VW of the color video signal, as shown in FIG.

Therefore, the image pε formed by the signal within the vertical retrace period of the color video signal b changes depending on the content of the code and becomes unsightly.

Summary of the Invention The present invention has been made in view of the above points, and includes:
An object of the present invention is to provide a signal format conversion circuit for a video signal that can convert the signal format of a video signal while preventing the generation of an image due to a code inserted in a predetermined section within a vertical retrace period of a video signal. shall be.

In the signal format/sort conversion circuit for a video signal according to the present invention, a predetermined section in the vertical blanking period in which a predetermined code is inserted in the video signal is detected, a detection signal is generated, and the video signal is The amplitude is suppressed so that the instantaneous level of the signal does not exceed a predetermined level.

Embodiments Hereinafter, embodiments of the present invention will be described in detail with reference to FIGS. 1 to 12.

In FIG. 1, an IH delay circuit 1, a subtracter 2, an adder 3
, multiplier 4 and bandpass filter 6 are connected in the same way as in the device of FIG. However, in this example, the multiplier 4 is supplied with the output of the band noise filter 41. The band noise filter 41 is configured so that the center frequency is equal to 854 kHz.

The output of the multiplier 42 is supplied to the output filter 41 . The multiplier 42 includes a digital phase shifter 4.
0 output and the output of the oscillator 43 are supplied. The oscillator 43 is configured to generate a reference signal "2" having the same frequency as the frequency of the color subcarrier of the video signal according to the NTSC system.

The output of the oscillator 44 is supplied to the digital phase shifter 40 . The oscillator 44 is configured to generate a reference signal r1 having a frequency four times that of the color subcarrier of a PAL video signal. Digital phase shifter 40
, the reference signal ``1'' is divided into 1/4 by a frequency divider 45, while being directly supplied to the clock input terminal of the D-type flip-flop 47, and also supplied to the clock input terminal of the D-type flip-flop 46 via an inverter 48. Supplied to the terminal. The output of the frequency divider 45 is a D-type flip-flop 46.
It is supplied to the D input terminal of the switch SW+, and also to the fixed contact C1 of the changeover switch SW+. Also, the ○ output of the D-type flip-flop 46 is the D-type output of the D-type flip-flop 47.
It is supplied to the input terminal and also to the fixed contact B1 of the changeover switch SW1. In addition, the Q output of the D-type flip-flop 47 is connected to the fixed contact A of the changeover switch SW1.
It is supplied to I. Further, the fixed contact D1 of the changeover switch SW1 is grounded. The output of the switching control signal generating circuit 9 is supplied to the switching control input terminal of the switching switch SWI, as in the case of the device shown in FIG.

Further, the color signal component output from the bandpass filter 6 is fed to one input terminal of the adder 10 via the gain control circuit 50. The gain control circuit 10 includes a means for detecting a period T1 in which a color burst signal exists, for example, by the output of the switching control signal generation circuit 9, and generating a gain reduction command signal, and a means for reducing the gain in accordance with this gain reduction command signal. It consists of a variable gain amplifier. The other terminal of the adder 10 is supplied with a time T by a delay circuit 51.
A luminance signal component which is the output of the adder 3 delayed by o is provided. The adder 10 adds and combines the color signal component and the luminance signal component to form a color video signal. Note that the delay time TC in the delay circuit 51 is 1H in the NTSC system and 1H in the PAL system.
The time corresponding to 1/2 of the difference between
The value is set to be equal to the sum of the delay time ΔD (250 ns+ΔD).

The output of the adder 10 is supplied to an amplitude suppression circuit 52 and a vertical synchronization separation circuit 53. In the vertical synchronization separation circuit 53, a vertical synchronization signal is separated from the color video signal output from the adder 10, and is supplied to a monostable multivibrator (hereinafter referred to as MMV) 54. MMV54 is
It is configured to generate a pulse that is triggered by a rising edge of the output of the vertical synchronization separation circuit 53 and exists over a period T3 from the disappearance of the vertical synchronization signal to the end of the vertical blanking period. This output pulse of the MMV 54 is supplied to an amplitude suppression circuit 52. The amplitude suppression circuit 52 is configured to limit the instantaneous level of the input signal to a level below vA, which is slightly higher than the pedestal level, depending on the output pulse of the MMV 5 4, for example. The output of this amplitude suppression circuit 52 is supplied to the output terminal OUT.

In the above configuration, the oscillator 44 outputs a reference signal r1 having a frequency four times that of the color subcarrier of the PAL video signal as shown in FIG. 2(A). Then, the frequency divider 45 divides the frequency of this reference signal r1 into 1/4.
The output is as shown in FIG. 2(D). This frequency divider 4
The output of No. 5 is supplied to the D input terminal of the D-type flip-flop 46 as a phase-shifted signal fSC3 having the same frequency as the color subcarrier in the PAL system, and is also supplied to the fixed contact C1 of the changeover switch SW1.

Since the reference signal r1 is supplied to the clock input terminal of the D-type flip-flop 46 via the inverter 48, the phase shift signal fSC3 is stored and stored in the D-type flip-flop 46 at the falling edge of the reference signal r1. The Q output of the D-type flip-flop 46 is as shown in Fig. 2(C).
The signal obtained by advancing the phase of the phase-shifted signal fSC3 by 458 is obtained as shown in FIG. This D-type flip-flop 4
The Q output of No. 6 is supplied as a phase shift signal fsc2 to the D input terminal of the D-type flip-flop 47, and also to the fixed contact B1 of the changeover switch SWt.

Since the reference signal rl is directly supplied to the clock input terminal of the D-type flip-flop 47, the phase shift signal fsc2 is stored and held in the D-type flip-flop 47 by the rising edge of the reference signal rl. The 0 output of 47 is the phase shift signal f as shown in FIG. 2(B).
The signal is obtained by advancing the phase of sc2 by 45 degrees. The O output of this D-type flip-flop 47 is supplied to the fixed contact A1 of the changeover switch SW1 as a phase shift signal fSC1.

Here, when the NTSC color video signal a as shown in FIG. Figure 3 (B) for each
- contact as shown in each of the figures (E). That is, during the period T1 in which the color burst exists, the movable contact E1 alternately contacts the fixed contacts AI and C1 every IH,
During the period T2 in which the video information signal exists, the movable contact E1 alternately contacts the fixed contacts B1 and D1 every IH. Then, in period T1, the first shift signal f Se
l and fSe3 are alternately led out to the movable contact E1 every IH, and during period T2, the phase shift signal tsc2 and the ground level signal are alternately led out to the movable contact E1 every IH. The signal derived from this movable contact E is transmitted to the multiplier 42
2! of 3.58MHz. Since it is multiplied by 1 with the quasi-signal r2, the multiplier 42 outputs the phase-shifted signal f S
et~f A signal with a frequency equal to the difference between the frequencies of sc3 and reference signal r2, that is, a signal of 854 kHz, whose phase alternately changes by +45° and -45° every IH during period T1, and during period T2. has an amplitude of IH
A conversion signal C as shown in Fig. 3 (F) that becomes zero every other time.
is formed.

The conversion signal C of 854kHz is passed through the bandpass filter 4.
1 to the multiplier 4. Then, the multiplier 4 receives a 4.43 MHz signal whose frequency differs by 854 kHz from the color signal component of the NTSC system, and the phase of the color burst signal changes alternately by +45° and -45° every IH, and the image The amplitude of the information part is IH
The color signal component d, as shown in FIG. 3 (G), becomes zero every other time.
is formed. This color signal component d is fed to the gain control circuit 50 via the bandpass filter 6, and the level of the color burst is lowered by a predetermined value.

FIG. 3 (H) output from this gain control circuit 50
The color signal e as shown in FIG.
is formed.

The color video signal b is supplied to an amplitude suppression circuit 52 and a vertical synchronization separation circuit 53. Then, Figure 4 (A)
Vertical blanking period Tε of color video signal b as shown in
A vertical synchronization signal V as shown in FIG. When this vertical synchronization signal V is supplied to the MMV 54, the rising edge of the vertical synchronization signal V causes the MMV to
54 is triggered, and a pulse p existing over a period TQ is outputted from the MMV 54 as shown in FIG. 4(C).

When this pulse p is supplied to the amplitude suppression circuit 52, the instantaneous level of the color video signal b becomes a level VA slightly higher than the vedestal level over the period in which this pulse p exists.
Since the amplitude is limited so that it is as follows, Figure 4 CD
), the code signal inserted in a predetermined line within the vertical blanking period TE of the color video signal almost disappears.

Since the color video signal b output from the amplitude limiting circuit 51 is fed to the output terminal OUT and sent to a PAL video playback device (not shown), an eyesore caused by a change in brightness due to the code signal is caused. No image is created.

Also, the color video signal b derived to the output terminal OUT
The frequency of the horizontal synchronizing signal is equal to the horizontal synchronizing frequency of the NTSC system, so when this color video signal b is supplied to a PAL video playback device (not shown), the signal shown in FIG. Since the delay time of the IH delay line 24 in the demodulation circuit as shown is set to IH of the PAL color video signal, that is, 64 μS, color shift occurs. That is, during the period when the amplitude of the color signal component of the color video signal b is zero, only the pre-IH color signal component supplied to the adder 26.27 via the IH delay line 24 floods into the synchronous detection circuit 28.29. During the period in which the amplitude of the brown signal component is not zero, direct addition T is applied.
Since only the color signal components supplied to I26.27 are supplied to the synchronous detection circuit 28.29 to reproduce a color image, scanning lines Ln-Lnn which are close to each other as shown in FIG.
The colors on J are PAL color video signal IH and NTS
It has a deviation W corresponding to 500 nS, which is the difference between I and H of the C color video signal. However, as shown in FIG. 6(A), the color video signal b is as shown in FIG. 6(C).
It consists of a color signal component as shown in FIG. 1, and a luminance signal component as shown in FIG. Therefore, scanning lines Ln' = L r that are close to each other
The contour formed by the luminance signal component on uj is the fifth
As shown by the dashed line y in the figure, the color shift is located between the widths of shift between the colors, and the color shift is not noticeable.

Furthermore, since the amplitude of the color signal component of the color video signal b becomes zero over the period T2 every 1H, when this color video signal b is supplied to a PAL video reproduction device (not shown), The amplitude of one of the two outputs of the adders 26 and 27 in the demodulation circuit shown in FIG. 15 in the video reproducing apparatus, that is, the color signal component and the signal obtained by IH delaying this color signal component, is , becomes zero. Therefore, the level of the color signal component output from the adders 26 and 27 is lower than when a regular PAL color video signal in which the amplitude of the color signal component does not become zero is fed during the period T2.

The color signal components of a regular PAL color video signal can be represented by a vector diagram as shown in FIG. 7(A). FIG. 7A shows a color signal component f1 in continuous 2H and a color burst signal g1 accompanying this color signal component f1. The R-Y component of the color signal component f1 is phase-inverted with respect to the B-Y axis for each IH, and the color burst signal g1 is ±135° from the B-Y axis in response to the phase inversion of the R-Y component. is output. In the case of a regular PAL color video signal, the signal shown in FIG. 7(B) is obtained by adding the color signal component f1 and a signal obtained by inverting only the RY component of the color signal component f1 before IH. A color signal component f2 as shown in is synchronously detected.

On the other hand, the color signal component of color video signal b is
It can be represented by a vector diagram as shown in Figure (A).

In Fig. 8 (A), continuous 2H as in Fig. 7 is also shown.
The color signal component f1 and the color burst signal g1' associated with the color signal components f and J are shown. The color burst signal "rg+" is output in the same way as the color burst signal g1 of the regular PAL color video signal, but the amplitude of the color signal components t and I becomes zero every IH. Therefore,
In the case of the color video signal b, as shown in FIG. 8(B), the color signal component (,l becomes the color signal component f2' which is synchronously detected as it is, and the color signal component is supplied to the synchronous detection circuit 28, 29. The level is lower than that of a regular PAL color video signal.

However, the level of the color burst signal g1' of the color video signal b is reduced by the amplitude suppression circuit 52 as shown in FIG. 9(A).

Therefore, the ACC circuit 22 in the video reproducing apparatus controls the color burst signal g1' until the level of the color burst signal g1' reaches a predetermined level as shown in FIG. 9(B).
' and the gain of the amplifier that amplifies the color signal component t% increases, and the color signal component (
, J becomes large, so that a decrease in saturation can be prevented.

FIG. 10 is a block diagram showing another embodiment of the present invention, in which IH delay circuit 1, subtracter 2. Adder 3, Multiplier 4,
Bandpass filter 6, delay circuit 51. Amplitude suppression circuit 5
2. The vertical synchronization separation circuit 53 and MMV 54 are connected in the same way as in the device shown in FIG. However, in this example, the output of the bandpass filter 6 is directly supplied to the adder 10, and the multiplier 4 is supplied with the changeover switch SW2.
The derived signal is supplied to the movable contact C2. The output of the switching control signal generation circuit 61 is supplied to the control input terminal of the switching switch SW2.

The changeover switch SW2 has a movable contact C2 as a fixed contact A2,
It is configured to contact one of B3 according to the switching control input. The switching control signal generation circuit 61 generates a period T1 in which a color burst exists during each horizontal scanning period by using, for example, a horizontal synchronizing signal in an NTSC color video signal.
and the period T2 in which the video information signal exists, and the period T2 is detected.
, the movable contact C2 contacts the fixed contact B2, and during the period T2, the movable contact C2 contacts the fixed contact A every IH.
2 and B2, and generates a control signal to alternately contact the terminals B2 and B2.

The output of the bandpass filter 62 is supplied to the fixed contact A2 of the changeover switch SW2. The center frequency of the passband of this bandpass filter 62 is 8. It is OIMHz. In addition, the fixed contact B2 of the changeover switch SW2
is supplied with the output of the bandpass filter 41.

The output of the multiplier 42 is supplied to these bandpass filters 62 and 41. Multiplier 42 is supplied with the output of digital phase shifter 40 and the output of oscillator 43, similar to the device shown in FIG.

The digital phase shifter 40 has the same configuration as the device shown in FIG.
The movable contact E1 of the changeover switch SW1 alternately contacts the fixed contacts A1 and C1 every H, and a switching control signal is generated so that the movable contact E1 contacts the fixed contact B1 during the period T2.

In the above configuration, the NTS as shown in FIG. 11(A)
When the C color video signal a is supplied to the input terminal IN,
The switching control signal generating circuit 9 changes the movable contact E1 of the changeover switch SW1 to the fixed contact AI+CI. Each of the Bl is contacted as shown in FIG. That is, during the period T1 in which the color burst exists, IH
The movable contact E1 alternately contacts the fixed contacts A1 and C1 at every interval, and during the period T2 in which the video information signal exists, the movable contact E1 contacts the fixed contact B1. Then, in the period T1, the phase-shifted signals f sc+ and f Se3 are I
The phase shift signal f sez is alternately led out to the movable contact E1 every H, and in the period T2, the phase shift signal f sez is led out to the movable contact E1. The signal derived from this movable contact E1 is supplied to the multiplier 42 and multiplied by the 3.58 MHz reference signal r2.
Two signals with frequencies each equal to the difference between the frequencies of SC3 and reference signal r2 and the sum of both frequencies, i.e. 85
Two signals of 4 kHz and 8.01 MHz are formed whose phases alternately change by +45° and -45° every IH during period T1, and do not change during period T2. Our 854 of these two signals
The kHz signal is supplied to the fixed contact B2 of the changeover switch SW2 via the bandpass filter 41, and 8. OIM
The Hz signal is supplied to the fixed contact A2 of the changeover switch SW2 via the bandpass filter 62.

The movable contact C2 of the changeover switch SW2 is connected to each of the fixed contacts B2+A2 by the changeover control signal generation circuit 61.
Contact as shown in Figure (D) and Figure (E). That is, in the period T1, the movable contact C2 contacts the fixed contact B2, and in the period T2, the movable contact C2 contacts the fixed contacts A2 and B2 alternately at every IH. Then, in period T1, the 854kHz signal is transmitted to the movable contact C.
2, and in period T2, 854kHz and 8
．． Two signals of 0.01 MHz are alternately led out to the movable contact C2 every IH, and a conversion signal C' as shown in FIG. 11(G) is formed. The conversion signal C' is supplied to a multiplier 4. Then, in the multiplier 4, the color signal component based on the NTSC system and the conversion signal C' are multiplied together.

Here, one input of the multiplier 4 is assumed to be α, and the other input of the multiplier 4 is assumed to be β. Then, the output of the multiplier 4 is expressed by the following equation.

ωSα Fist circumference β − (1/2) fcOs (α+β) +CO
S (α - β))... (1) Now, one input of the multiplier 4 is the conversion signal C', so ■Sα becomes ■S(ωP-ωN )
, and in period T2, CI)S alternately every IH
(ωP-ωN) and (ωP+ωN). Further, since the other input of the multiplier 4 is a color signal component based on the NTSC system, COSβ becomes .S(ωN+φ). Note that ωP is the angular frequency of the subcarrier in the PAL system, ωN
is the angular frequency of a subcarrier in the NTSC system.

Therefore, the output of the multiplier 4 becomes a signal expressed by the following equation during the period T1.

Encircle (ωP - ωN)●■S(ωN+φ) − (1/2) t animals (ωρ+φ) +Q)5 (IJJP-2(IJN-φ') l
...= (2) Also, the output of the multiplier 4 is
In this case, the signal expressed by equation (2) and the signal expressed by the following equation are alternately obtained every IH.

4(ωρ+ωN) φ4(ωN+φ) − (1/2) f range (ωp+2ωN+φ)+0
)S(ωρ+φ)} ・・・・・・
(3) The output of this multiplier 4 is 4.43MHZ (ωP
), a 4.43 MHz color signal component d' as shown in FIG. 11(H) whose phase is inverted for each IH with respect to the BY axis is obtained. This color signal component d' is co-fed to the adder 10, and is added and synthesized with the luminance signal component delayed by TD by the delay circuit 51 to form the color video signal b' as shown in FIG. 11(1). Ru.

The color signal component of this color video signal b' has an amplitude of IH.
Color video signal b
Even if ' is supplied to a PAL video playback device, the saturation will not decrease.

FIG. 12 is a block diagram showing a video disc player equipped with a signal format conversion circuit according to the present invention. In the figure, a disk 71 is connected to a spindle motor 72.
Rotationally driven by.

As the disk 71 rotates, a signal recorded on the disk 71 is read by a pickup 73. A so-called RFC high frequency (RFC) signal, which is a read signal output from the pickup 73, is supplied to a demodulation circuit 74 comprising an FM demodulator or the like, and a color video signal is demodulated. The color video signal is CCD (Charge Cou
pledDevice) 7 5. C
A clock pulse output from a VCO (voltage controlled oscillator) 76 is supplied to the CD 75 . CCD75
In this case, the color video signal is delayed by a time corresponding to the frequency of this clock pulse. This CCD7
The color video signal passed through variable phase shifter 77 . The signal is supplied to a burst gate circuit 78 and a synchronous separation circuit 79.

In the synchronization separation circuit 79, the horizontal synchronization signal is separated from the color video signal and supplied to the phase comparison circuit 80 as a reproduced horizontal synchronization signal. In the phase comparison circuit 80, the reference horizontal synchronization signal outputted from the reference signal generation circuit 81 and the reproduced horizontal synchronization signal are compared in phase, and a time axis error signal is generated according to the phase difference between the two signals. This time axis error signal is fed to the equalizer 82. In the equalizer 82, the time axis error signal is amplified and phase compensated to generate a control voltage for the VCO 76 and a drive signal for the spindle motor 72. The drive signal formed by the equalizer 82 is fed to the spindle motor 72 via a drive circuit 83, and the rotational speed of the disk 71 is controlled so that the phase difference between the reference and reproduction horizontal synchronization signals becomes a predetermined value. Ru. Further, the control voltage formed by the equalizer 82 is
The signal delay time at the COD 75 is controlled so that the phase difference between the reference and reproduced horizontal synchronizing signals becomes a predetermined value, thereby compensating for time base errors.

On the other hand, the burst gate circuit 78 separates the color burst signal or pilot burst signal from the color video signal and supplies it to the phase comparator circuit 85 . In the phase comparison circuit 85, the phase of this burst signal and the reference subcarrier signal outputted from the reference signal generation circuit 81 is compared, and a phase error signal is generated according to the phase difference between the two signals. This phase error signal is supplied to a variable phase shifter 77, and the color video signal is phase-shifted so that the phase of the color burst signal matches the phase of the reference subcarrier signal. The color video signal output from the variable phase shifter 77 is fed to a character insertion circuit 86. The character insertion circuit 86 generates a video signal according to the character indicated by the data output from the system controller (not shown) etc. using the reference signal "3" output from the reference signal generation circuit 81, and converts it into a color video signal. It is configured to be inserted into.

In the reference signal generation circuit 81, the reference horizontal synchronization signal is
It is output from the movable contact C3 of the changeover switch SW3. The output of the frequency divider 81b is supplied to the fixed contact A3 of the changeover switch SW3. Frequency divider 8lb is switch S
The structure is such that the signal derived to the movable contact C8 of W8 is divided into 1/910. The outputs of oscillators 81a and 81g are supplied to fixed contacts A8 and B8 of changeover switch SW9, respectively. The oscillator 81a has a frequency 4 which is four times the frequency of the color subcarrier in the NTSC system.
It is configured to generate a signal of f sc (N). Further, the oscillator 81g has a frequency of 4 f sc (N
) · It is configured to generate a signal of f H (N) / f H (P). Furthermore, f+(N) is NT
Represents the horizontal synchronization frequency in the SC system, fH(P)
represents the horizontal synchronization frequency in the PAL system.

When the changeover control input is at a high level, the changeover switch SW8 causes the movable contact C8 to contact the fixed contact A8 to turn off the oscillator 81a.
When the switching control input is at a low level, the movable contact C8 contacts the fixed contact B8, and the oscillator 81
The configuration is such that the output of g is selectively output. A switching control input terminal of this changeover switch SW8 is connected to one end of a lock type switch SW6. This switch S
A voltage m is applied to one end of W6 via a resistor R. Further, the other end of the switch SWs is grounded.

When this switch SW1B is turned on, a low level signal derived from one end is output as a signal format conversion command signal.

The fixed contact B3 of the changeover switch SW3 is supplied with the output of a frequency divider 81e that divides the output of the oscillator 81d by 1/240. The oscillator 81d is configured to generate a frequency of 3.75 MHz, which is the frequency of a pilot burst signal inserted into a predetermined section of the PAL color video signal when recording the PAL color video signal on a disc.

In the changeover switch SW3, when the changeover control input is at a high level, the movable contact C3 contacts the fixed contact A3 and the frequency divider 81b is switched on.
When the switching control input is at a low level, the movable contact C3 contacts the fixed contact B3, and the frequency divider 81
e, that is, a signal having a frequency equal to the horizontal synchronization frequency in the PAL system is selectively output. The output of the signal format discrimination circuit 87 is supplied to the switching control input terminal of the changeover switch SW3.

For example, the signal format determination circuit 87
Detects whether or not a pilot signal is inserted into the color video signal read from the system, and generates a signal format discrimination signal indicating whether the signal is a PAL or NTSC color video signal based on the detection result. The structure is as follows. The signal format discrimination circuit 87 is described in detail in Japanese Patent Application No. 12240/1983.

Further, the reference subcarrier signal is output from the movable contact C4 of the changeover switch SWa. The fixed contact A4 of the changeover switch SWa is supplied with the output of a frequency divider 81c which divides the output of the changeover switch SW into 1/4 and outputs a reference signal r2. In addition, the fixed contact B of the changeover switch SWa
4 is supplied with the output of the oscillator 81d. In the selector switch SWa, when the switching control input is at a high level, the movable contact C4 contacts the fixed contact A4 to selectively output the output of the frequency divider 81c, and when the switching control input is at a low level, the movable contact C4 contacts the fixed contact A4 to selectively output the output of the frequency divider 81c. It is configured to contact the fixed contact B4 and selectively output a signal having a frequency equal to the output of the oscillator 81d, that is, the frequency of the pilot burst. The output of the signal format discrimination circuit 87 is supplied to the switching control input terminal of the changeover switch SW4.

Further, the reference signal r3 is output from the movable contact C5 of the changeover switch SWs. Fixed contact A of changeover switch SW5
5 is supplied with the output of the changeover switch SW9. Further, an oscillator 81 is connected to the fixed contact B5 of the changeover switch SWs.
The output of f is supplied. The oscillator 81f is configured to generate a reference signal r1 having a frequency four times the frequency of the color subcarrier in the PAL system. When the changeover control input is at a high level, the changeover switch SWs causes the movable contact C5 to contact the fixed contact A5, and the changeover switch SWs
9 is selectively output, and when the switching control input is at a low level, the movable contact C5 contacts the fixed contact B5 and the oscillator 8
1f output, that is, a reference signal "1" having a frequency four times the frequency of the color subcarrier in the PAL system is selectively output. The output of the signal format discrimination circuit 87 is supplied to the switching control input terminal of the changeover switch SWs.

The color video signal output from the character insertion circuit 86 is
The signal is supplied to the fixed contact A7 of the changeover switch SW7 and also to the signal format conversion circuit 97. The output of the signal format conversion circuit 91 is supplied to the fixed contact B7 of the changeover switch SW7. In the signal format conversion circuit 97, each part is constructed in the same manner as the circuit shown in FIG. 1, except that the oscillators 43 and 44 are removed. The multiplier 42 in the signal format conversion circuit 97 is supplied with the reference signal r2 output from the frequency divider 81c. In addition, the signal format conversion circuit 97
A reference signal r1 outputted from an oscillator 81f is supplied to a frequency divider 45, a D-type flip-flop 47, and an inverter 48.

In the selector switch SWy, when the switching control input is at a high level, the movable contact C7 contacts the fixed contact A7 and outputs the color video signal output from the character insertion circuit 86, and when the switching control input is at a low level, it is movable. Contact C7 is fixed contact B7
The color video signal whose format has been converted by the signal format conversion circuit 97 is outputted by contacting the signal format conversion circuit 97. Movable contact C7 of changeover switch SW7
The color video signal derived from the output terminal OUT is supplied to the output terminal OUT.

In the above configuration, if switch SW6 is off,
The low-level signal format conversion command signal is not output, and the output of the oscillator 81a, that is, the signal of 4 f sc (N) is selectively output from the changeover switch SW9 in the reference signal generation circuit 81, and the signal format discrimination concave path 87 The switching of the changeover switches SW3 to SWs is controlled by the output of , and it is possible to read either of the two types of discs on which NTSC and PAL color video signals are recorded. Also, at this time, the color video signal output from the character insertion circuit 86 is output as is from the changeover switch SW7 and supplied to the output terminal, and the color video signal that has not been read from the disc is output as is.

Next, when the switch SWs is turned on by manual operation, a low-level signal format conversion command signal is output. Then, from the changeover switch SW9 in the reference signal generation circuit 81, the output of the oscillator 81g, that is, 4 fs
A signal of c(N)·f+(N)/fH(P) is selectively output. As a result, a reference horizontal synchronization signal having the same frequency as the horizontal synchronization frequency in the PAL system is output. In addition, burst phase comparison is performed based on a signal obtained by frequency-dividing the output of this oscillator 81g to 1/4, and color signal conversion is also performed by frequency-dividing the output of this oscillator 81g to 1/4. This is done by the signal obtained. At the same time, the output of the signal format conversion circuit 91 is derived from the changeover switch SW7.

Therefore, by loading a disc on which an NTSC color video signal is recorded, the signal format conversion circuit 91
A pseudo PAL color video signal is obtained. The horizontal synchronization frequency of this pseudo PAL color video signal is equal to the horizontal synchronization frequency of the regular PAL color video signal. Therefore, when this pseudo PAL color video signal is co-fed to a PAL demodulation circuit as shown in FIG. will not occur. Therefore, the signal format conversion circuit 91
In this case, the delay amount of the delay circuit 51 that delays the luminance signal component may be the same as that of the bandpass filter 6.

Effects of the Invention As detailed above, the signal format conversion circuit for a video signal according to the present invention detects a predetermined section within the vertical retrace period in which a predetermined code is inserted in the video signal, generates a detection signal, and generates a detection signal. Depending on the detection signal, the amplitude of the video signal is suppressed so that the instantaneous level of the video signal does not exceed a predetermined level.

Therefore, the instantaneous level of the predetermined section within the vertical retrace period of the color video signal output from the video signal signal format conversion circuit according to the present invention becomes lower than the predetermined level;
It is possible to eliminate brightness changes depending on the contents of the Phillips code, etc. in the portion corresponding to the vertical retrace period on the playback screen, and a good playback image can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIGS. 2 to 4 are waveform diagrams showing the operation of each part of the device shown in FIG. 1, and FIG. 5 shows a part of the reproduced image. 6 is a waveform diagram showing the action of the delay circuit 51, FIGS. 7 to 9 are vector diagrams showing color signal components, and FIG. 10 is a block diagram showing another embodiment of the present invention. 11 is a waveform diagram showing the operation of each part in FIG. 10, FIG. 12 is a block diagram showing still another embodiment of the present invention, and FIG. 13 is a block diagram showing a conventional format conversion circuit. 14 is a waveform diagram showing the action of each part of the circuit in FIG. 13, and FIG. 15 is a PAL
A block diagram showing the demodulation circuit in the method, FIG. 16, is as follows.
FIG. 17, which is a diagram showing an image formed on the screen of a PAL video reproducing apparatus, is a waveform diagram showing a code inserted within a vertical retrace period of a video signal. Explanation of symbols of main parts 40... Digital phase shifter 42... Multiplier 43, 44... Oscillator 50... Gain control circuit 51... ...Delay circuit 52...Amplitude suppression circuit

Claims (1)

[Claims] A signal format conversion circuit for a video signal that converts the signal format of a video signal in which a predetermined code is inserted in a predetermined section within a vertical blanking interval, the circuit detecting the predetermined section in the video signal and generating a detection signal. A signal format conversion circuit for a video signal in a disk performance device, comprising: a detection means; and a suppression means for suppressing the amplitude of the video signal so that the instantaneous level of the video signal does not exceed a predetermined level according to the detection signal. .