GB2231199A - Forming semiconductor body structures with electrical connection on substrates - Google Patents

Forming semiconductor body structures with electrical connection on substrates Download PDF

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Publication number
GB2231199A
GB2231199A GB8908219A GB8908219A GB2231199A GB 2231199 A GB2231199 A GB 2231199A GB 8908219 A GB8908219 A GB 8908219A GB 8908219 A GB8908219 A GB 8908219A GB 2231199 A GB2231199 A GB 2231199A
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Prior art keywords
substrate
electrode leads
further characterised
major surface
body structure
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GB8908219A
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GB8908219D0 (en
Inventor
Michael David Jenner
Maurice Victor Blackman
Graham Joseph Crimes
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Philips Electronics UK Ltd
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Philips Electronic and Associated Industries Ltd
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Priority to GB8908219A priority Critical patent/GB2231199A/en
Publication of GB8908219D0 publication Critical patent/GB8908219D0/en
Publication of GB2231199A publication Critical patent/GB2231199A/en
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
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  • Engineering & Computer Science (AREA)
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  • Physics & Mathematics (AREA)
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  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Light Receiving Elements (AREA)
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Abstract

In the manufacture of infrared-sensing arrays of cadmium mercury telluride a semiconductor body structure (12) is formed on a substrate (20) by bonding a body (10) to the substrate (20) via an adhesive layer (4) and removing at least one portion (11) of the body throughout its thickness. The electrode leads (13) and active regions (14) of the device are formed at the first body surface (1) which is subsequently bonded to the substrate (20), after which parts of the leads (13) are exposed by the removal of the body portion (11), for contacting with a subsequently deposited conductor pattern which may form substrate conductors or interconnecting links to substrate conductors (23). The regions (14) at the first surface (1) are protected against material degradation which can occur at the opposite surface (2) during prolonged or high temperature heat treatments and since the leads (13) are always supported on either the body (10) or the substrate (20) the semiconductor material at the active device surface (1) is not strained. <IMAGE>

Description

DESEIJg SEMICONDUCTOR DEVICE MANUFACTURE This invention relates to methods of manufacturing a semiconductor device (for example, an infrared-sensing array device) comprising a semiconductor body structure bonded to a substrate, and further relates to semiconductor devices, particularly but not exclusively having a body structure of cadmium mercury telluride bonded to a substrate.
It is known to manufacture such a device using a method comprising the steps of (a) bonding a body comprising semiconductor material (for example, cadmium mercury telluride) to a substrate via an adhesive layer, (b) removing at least one portion of the body throughout its thickness to leave a remaining semiconductor body structure on the substrate, and (c) providing electrical connections from the substrate to regions of the body structure; the connections comprise electrode leads which contact said regions of the body structure, and a conductor pattern which is provided on the substrate and contacts the electrode leads.Published European patent application EP-A-O 050 512 and United States patent US-A-4 197 633 disclose knawn methods involving these steps. The whole contents of EP-A-O 050 512 and US-A-4 197 633 are hereby incorporated herein as reference material.
In the known methods such as disclosed in EP-A-O 050 512 and US-A-4 197 633, the body is bonded via a first major surface to a substrate on which the conductor pattern is already present. The substrate conductor pattern is exposed in the removal step (b).
The substrate may contain, for example, a silicon circuit for processing signals from device elements (such as infrared photodiodes) which are formed in the body after bonding to the substrate. After the bonding step (a), active regions of the device elements are provided (for example by dopant diffusion or ion implantation) adjacent the top, second major surface of the body which is opposite the bonded first major surface. After the removal step (b), an insulating passivation layer is provided on the top and exposed side faces of the remaining body structure.
The electrode leads are then deposited to contact the active regions at the top, second major surface via contact windows in the layer and then to extend down the layer on the side faces and onto the substrate so as to overlap the exposed conductor pattern.
The applicants have found that active regions (and p-n junctions) formed adjacent the top, second major surface of the body (especially with a difficult semiconductor material such as cadmium mercury telluride) can be degraded by previous or subsequent heat treatments. Thus, for example a prolonged baking of the assembly to cure the adhesive layer may sometimes cause degradation, even though the adhesive-curing treatment described in EP-A-O 050 512 may not be problematic in this manner. In the case of cadmium mercury telluride, such degradation can occur by out-diffusion of mercury. Contaminants may also diffuse into the top surface from the ambient.Such degradation of the semiconductor material in the vicinity of the active regions (and p-n junctions) can degrade the characteristics of the device elements.
Published United Kingdom patent application GB-A-2 095 905 (our reference PffB32767) describes a modification in which the active region (and p-n junctions) can be formed around apertures formed through the body by removing portions of the body.
Furthermore, instead of bonding the body to the substrate with a cured adhesive layer, the adhesive layer may be an insulating passivation layer which is grown together with the body on the substrate. However, even in the methods disclosed in GB-A-2 095 905, part of the active regions and p-n junctions extend to the top, second major surface of the body where material degradation can occur during heat treatments and by contamination.
The whole contents of G -A-2 095 905 are hereby also incorporated herein as reference material.
According to the present invention there is provided a method of manufacturing a semiconductor device comprising the steps of (a) bonding a body comprising semiconductor material to a substrate via an adhesive layer, (b) removing at least one portion of the body throughout its thickness to leave a remaining semiconductor body structure on the substrate, and (c) providing electrical connections from the substrate to regions of the body structure, which connections comprise electrode leads which contact said regions of the body structure and a conductor pattern which is provided on the substrate and contacts the electrode leads, which method is characterised in that the electrode leads are formed on a first major surface of the body before bonding said first major surface to the substrate in step (a), in that parts of the electrode leads are exposed on the substrate by removing at least said portion of the body in step (b), and in that the conductor pattern is then deposited to contact the exposed parts of the electrode leads and to extend on the substrate.
By forming the electrode leads on the first major surface and supporting them in this manner until bonded to the substrate in step (a) and exposed in step (b), and by then providing the conductor pattern after the removal step (b), an inverted device structure can be formed simply on the substrate.This inverted device structure can afford better protection against material degradation for active regions and pn junctions formed adjacent the bonded first major surface and is readily compatible in manufacture of devices comprising easily-damaged semiconductor material such as cadmium mercury telluride. FurthermDre the active regions and any pn junctions can adjoin a passivation layer to provide more optimum protection and stable characteristics.
Thus, before step (a), there may be formed on the semiconductor material at the first major surface of the body an insulating passivation layer structure having contact windows therein, and the electrode leads can be provided on the body so as to contact said regions of the body via said contact windows.
Furthermore, before step (a), at least one pn junction may be formed in the body between at least one of said regions of the body and an adjacent part of the body, which pn junction extends to the insulating passivation layer structure at the first major surface of the body.
The inverted device structure is particularly useful for an array of infrared (or other photo-sensing) detector elements formed in and/or from the body, since it permits the top, second major surface to be free to provide radiation transmission to the array in various desired manners. Thus for example, before and/or after the removal step (b), the body or body structure may be provided with an infrared-transmission array (for example an optical mask array, a cold shield array, and/or an array of lenses) which may correspond to the array of detector elements and which is formed on the second major surface.
However, the present invention may also be used in the manufacture of other types of semiconductor device (instead of infrared and photo-sensing semiconductor devices), for example ones in which transistors are formed adjacent the first major surface of the body. Furthermore, the present invention may be used with other semiconductor materials (instead of cadmium mercury telluride), for example lead tin telluride or III-V semiconductor compound materials or even silicon and germanium. Various different device arrangements and structures may be manufactured in accordance with the invention, as will now be illustrated with respect to some examples.At least from the standpoint of manufacturing tolerances and connection reliability, a particularly advantageous device structure is one in which the remaining body structure formed on the substrate in step (b) is of elongate shape having longitudinal sides from at least one of which there protrudes a plurality of the electrode leads spaced along that longitudinal side of the body structure.
A few embodiments of the invention are now described, by way of example, with reference to the accompanying diagrammatic drawings, in which: Figures 1 and 2 illustrate a semiconductor body at a stage in the manufacture of a semiconductor device by a method in accordance with the invention, Figure 1 being a cross-section on the line I-I of the plan view of Figure 2; Figure IN is a cross-section similar to Figure 1 but illustrating a modification of the structure which may be employed in accordance with the invention, Figures 3 to 5 illustrate the semiconductor body at subsequent successive stages in the manufacture in accordance with the present invention, Figures 3 and 5 being cross-sectional views and Figure 4 being a plan view;; Figure 6 is a wider plan view of a device manufactured in accordance with the invention but with one or more modifications as compared with that of Figures 1 to 5; Figures 7 and 8 illustrate a semiconductor body structure at successive stages in manufacture in accordance with the invention but with further irodifications, Figure 7 being a plan view and Figure 8 being a cross-section on line VIlI-VIlI of Figure 7; and Figure 9 is a cross-section of part of a device arrangement at the stage of Figures 2 and 7 but with additional modifications.
It should be noted that the Figures are diagrammatic and not drawn to scale. The relative dimensions and proportions of parts of these drawings have been shown exaggerated or reduced in size for the sake of clarity and convenience in the drawings. The same reference signs as used in one embodiment are generally used when referring to corresponding or similar parts in other embodiments.
The manufacturing method now to be described with reference to Figures 1 to 5 comprises the steps of (a) bonding a semiconductor body 10 to a substrate 20 via an adhesive layer 4, (b) removing at least one portion 11 of the body 10 throughout its thickness to leave a remaining semiconductor body structure 12 on the substrate 20, and (c) providing electrical connections 13,3 from the substrate 20 to regions 14 of the body structure 12. These connections comprise electrode leads 13 which contact said regions 14 of the body structure 12 and a conductor pattern 3 which is provided on the substrate 20 and contacts the electrode leads 13.
In accordance with the present invention the electrode leads 13 are formed on a first major surface 1 of the body 10 (Figures 1 and 2) before bonding said first major surface 1 to the substrate 20 in step (a); parts of the electrode leads 13 are exposed (Figures 3 and 4) by removing portion 11 of the body 10 in step (b); and the conductor pattern 3 is then deposited (Figures 4 and 5) to contact the exposed parts of the electrode leads 13 and to extend on the substrate 20.
In the particular form illustrated, by way of example, the semiconductor device being manufactured comprises two staggered linear arrays of infrared photodiodes in the or each body structure 12 on a substrate 20. The substrate 20 may be, for example, a silicon circuit for processing signals from the photodiodes. This silicon circuit may be of knows form; its details are not shank in Figures 3 to 5, apart from external conductors in the form of contact pads 23.
Figures 1 and 2 illustrate the semiconductor body 10 before the bonding step (a). In the case of infrared photodiodes, the body 10 advantageously comprises cadmium mercury telluride as its infrared-sensitive material. The bulk of the body 10 may be, for example, p type cadmium mercury telluride material. As illustrated in Figure 1, there is formed at the first major surface 1 of the body 10 an insulating passivation layer structure 16 having contact windows 17 therein. With cadmium mercury telluride photodiodes, the passivation layer 16 may be for example zinc sulphide or cadmium telluride, or a ccmbination of layers of different insulating materials.
At least one pn junction 15 is formed in the body 10 between at least one region 14 of the body and an adjacent part of the body. Figures 1 and 2 show two staggered linear arrays of n type regions 14 (one for each photodiode) formed along an elongate portion (or width 12) of the body 10. The pn junctions 15 are located adjacent to the first major surface 1 of the body 10 and extend to the insulating passivation layer structure 16. The n type regions 14 and pn junctions 15 may be formed by ion milling first the passivation layer structure 16 to form the windows 17 and then continuing to ion mill slightly the cadmium mercury telluride surface at the windows 17 until the regions 14 and pn junctions 15 are formed.However, the regions 14 and pn junctions 15 may be formed in other ways, for example by localised mercury inaiffusion or donor dopant implantation before providing the passivation layer.
The electrode leads 13 are subsequently provided to contact the regions 14 via the contact windows 17. The leads 13 may be of known type, for example consisting mostly of gold. The layer pattern forming the leads 13 may be defined in known manner, for example by depositing the layer over a patterned photoresist and then dissolving the photoresist to remove the layer parts thereon and to leave the lead pattern 13. To facilitate seeing this layer pattern in so far as it is visible in the views of Figures 2 and 4, these leads 13 are hatched in these Figures (except for 1\ leads 13 in Figure 2 for clarity in seeing the patterns 15 and 17). For the same reason, the substrate contact pads 23 are hatched in Figure 4.
The surface 1 of the body 10 of Figures 1 and 2 is now bonded to the substrate 20 via the electrically-insulating adhesive layer 4 (for example of an insulating epoxy). The adhesive 4 may be provided over the whole upper surface of the substrate 20 where the body 10 is mounted, or it may be provided only locally in the area (or areas) where only the body structure 12 is to be retained. The array of leads 13 of the body 10 are aligned with the substrate contact pads 23. For clarity in the drawing, Figures 3 and 4 illustrate a lateral spacing between the leads 13 and pads 23, but it should be understood that the leads 13 may instead overlap parts of the pads 23 as illustrated in Figure 5.
After positioning the body 10 in the desired location on the substrate 20, the adhesive layer 4 is cured to bond securely the body 10 to the substrate 20. Because the active regions 14 and junctions 15 are present adjacent the passivated lower surface of the body 10 during this heat treatment (and during any subsequent heat treatment) they do not suffer to any significant extent from degradation of the material properties of the cadmium mercury telluride which occurs most easily and rapidly at the top major surface and exposed sides of the body 10.
Before the removal step (b), the body 10 is provided with an infrared transmission array 19 which corresponds to the array of infrared detector elements. The array 19 is formed on a second major surface 2 opposite the first major surface 1. In the form illustrated in Fgures 3 to 5, the array 19 comprises an array of windows in an infrared mask layer 18 on the surface 2. The mask layer 18 may be provided on an insulating passivation layer on the cadmium mercury telluride surface 2, or it may contact the surface 2 as illustrated by way of example in Figures 3 and 5.In this latter case, the infrared mask layer 18 may be of electrically conductive material (for example mostly gold) contacting a portion of the body structure 12 carrion to the array of detector elements so as to provide an electrical connection to this carton portion (p type in Figures 3 to 5).
A masking pattern 32 (for example, of photoresist) is then provided on the top surface 2 of the body 10 to protect the surface area of the body portion 12 which is to be retained. The exposed peripheral portions 11 of the body 10 (including the passivation layer 16) are then etched away, for example in known manner by spray-etching. Exposed adhesive 4 can be removed from the substrate contact pads 23 and other exposed areas by, for example, plasma etching which may also be used to remove the masking pattern 32. The remaining body structure 12 (with exposed parts of the electrode leads 13) bonded to the substrate 20 is illustrated in Figure 4.This body structure 12 formed in step (b) is of elongate shape having two longitudinal sides from each of which there protrudes a plurality of electrode leads 13 spaced along the respective longitudinal side.
It should be noted that the exposed protruding parts of the electrode leads 13 are supported throughout their length by the first major surface 1 of the body 1, until bonded to the substrate 20 and exposed by the removal of the body parts 11. Attempts have been made to fabricate device structures in which the leads 13 of Figure 1 are thickened over most of their length (e.g. by electro-plating) so that the protruding leads 13 have sufficient strength to be self-supporting if the body parts 11 are removed before bonding to the substrate 20. This modification which reverses the sequence of steps (a) and (b) is not in accordance with the present invention, and the applicants believe that the strain imposed on the semiconductor material at the surface 1 by having long, self-supporting, thick leads protruding from the body structure 11 without the support of the substrate 20 can sometimes degrade the semiconductor material properties adjacent the surface 1, at least with easily strained and damaged semiconductor materials such as cadmium mercury telluride.
After the removal step (b), the electrical connections are completed by forming interconnecting links 3 (e.g. as gold-layer straps) between the electrode leads 13 and the substrate conductors 23. A layer pattern for these links 3 is illustrated in broken outline 3' in Figure 4. This broken outline 3' may correspond to, for example, windows in a patterned photoresist provided over the bonded assembly, the conductive layer for the links 3 can be deposited over this patterned photoresist which may then be dissolved to leave the link pattern 3.Although Figures 4 and 5 illustrate large transverse dimensions for the links 3 so that they overlap both the pads 23 and a part of the substrate adjacent the pads, smaller dimensions may be used so that the links 3 may simply extend on the substrate pads 23 and the electrode leads 13, especially when the electrode leads 13 partly overlap the pads 23.
In situations in which the optical mask layer 18 does not additionally provide the electrical connection to the common (p type) portion of the body structure 12, electrical connections to this common portion may be formed at, for example, opposite ends of the elongate body structure 12 of the array. These connections may comprise electrode leads (similar to leads 13) which contact a p type area of the surface 1 at windows in the passivation layer 16 and which are then contacted with conductive links (similar to links 3). Alternatively, these connections may comprise electrode tracks which contact a p type area of the opposite surface 2 and which then extend down the sides of the ends of the body structure 12 and onto the substrate 20. These electrode tracks may be formed at the same time as the links 3.
It will be evident that many other modifications and variations are possible within the scope of the invention. Thus, for example, instead of the substrate 20 comprising a semiconductor circuit to which the infrared array body structure 12 is linked by connections 3,13,23, the substrate 20 may be of electrically insulating material, for example a singlecrystal sapçhire substrate 20, and the conductor pattern 3 may form terminal areas (e.g. for wire-bonding) on the substrate 20. Such an arrangement is illustrated in Figure 6, in which the conductor pattern 3 is deposited to overlap the exposed parts of the electrode leads 13 and to fan out on the substrate 20 to form wider terminal areas.
Figure 6 also illustrates common connections 6,26 at each end of the array, and these may comprise electrode leads 26 formed to contact the p type material at the same time as the electrode leads 13 contact the n type regions 14, and conductors 6 which overlap exposed areas of the leads 26 and which are formed at the same time as the conductor pattern 3. The exposure of the leads 26 may be effected in the same process step (b) as the exposure of the leads 13.
Figures 1 to 5 illustrate two rows of infrared detector elements. However, if desired, only a single row may be formed in the elongate body portion 12. In this mase, if desired, the electrode leads 13 contacting the n type regions 14 may protrude at only one of the two longitudinal sides of the elongate body structure 12, and the common connection may be provided at the opposite longitudinal side. Instead of simply one or two rows, more rows of semiconductor device elements may be formed along the elongate portion 12 of the body 10, i.e. the portion having the elongate shape of the subsequently formed body structure 12. Thus, for example, Figures 7 and 8 illustrate 4 rows of infrared photodiodes in the body structure 12.Alternate electrode leads 13 along each longitudinal side are connected to the n type regions 14 alternately of the two rows nearest that side. Depending on the type of substrate 20, the conductor pattern 3 which is deposited to contact the exposed parts of the leads 13 may extend to form terminal areas on the substrate 20, or it may provide links 3 to contact pads of a circuit substrate.
The infrared masking layer 18 with windows 19 in Figures 3 to 5 defines the infrared-sensing area of each detector element. It is also possible to space an infrared mask layer 18 with windows 19 further in front of the detector elements so as to define the field of view of each detector element. Normally the body structure 12 will be cooled during operation to a cryogenic temperature via the substrate 20. Figure 8 illustrates an arrangement in which the layer 18 defining the field of view also is cooled so acting as a cold shield in front of the detector elements. In this cold-shield arrangement, the semiconductor body structure 12 is a cadmium mercury telluride layer on an electrically insulating base 35. The top, second major surface 2 on which the cold-shield layers 18 is formed is an insulating surface of the base 35.The structure can be formed by growing a cadmium mercury telluride layer 10 on a base of, for example, cadmium telluride; then forming the regions 14, pn junctions 15 and passivation layer 16 adjacent the major surface 1 of the layer 10 opposite the base; then performing step (a) to bond this surface 1 to the substrate 20 by the adhesive layer 4; and then performing step (b) to remove peripheral areas 11 of both the layer 10 and its base so as to leave the remaining body structure 12 on the remaining base 35 as illustrated in Figures 7 and 8. However, instead of growing the layer 10 on the base, the base may be bonded to the semiconductor layer/body 10 either before or after mounting the body 10 on the substrate 20. The base 35 may even be bonded to the body structure 12 after the step (b) has been performed.
The formation of the body structure as a semiconductor layer/body 12 on an insulating base 35 such as cadmium telluride, for example, allows several interesting variations. Thus, the connection to the p type common portion of the arrays can be formed at the ends of the arrays by electrode leads 26 and a conductor pattern 6, as illustrated in Figure 6. Instead of carrying a cold shield, the cadmium telluride or other infrared-transmissive base 35 may be shaped by etching at its top surface 2 to form, for example, an array of lenses corresponding to the array of detector elements in the layer 10. Such a lens modification of the base 35 is illustrated in Figure 9.Furthermore, even if no transmission array (such as an optical mask, cold shield or lens array) is formed on or from the base 35, the provision of the base 35 can protect the top surface of the layer/body 10,12 against degradation in its material properties during heat treatments.
In the specific embodiments as described so far, the insulating passivation layer 16 at the first major surface 1 of the body 10 is removed over the same area 11 as is the semiconductor bulk of the body 10. Depending on the specific materials of the layer 16 and the semiconductor bulk, this removal of portion 11 of the layer 16 may be effected in the same etching treatment as for the bulk, or with different etchants used successively in the same masked removal step in the manner illustrated in, for example, Figure 3. Figure 9 illustrates a further modification in which the exposure of the electrode leads 13 is effected with a different mask 30 from the mask 32 used to define the boundaries for the bulk of the body 12.In this case, the body 10 with the mask 32 is etched (over the areas 11) to the interface of the semiconductor bulk and the insulating layer 16, but the layer 16 is left on the leads 13 to protrude (on the substrate 20) from the sides of the resulting island 12 until, for example, a later masking stage such as Figures 4 and 7 used to define the substrate conductor pattern 3. Thus, for example, at this second masking stage a photoresist mask pattern 30 may be provided on the island structure on the substrate 20, with windows 3' corresponding to the desired substrate conductor pattern 3. The structure may then be subjected to an ion-milling treatment (with the pattern 30 as a mask) to remove the exposed parts of the layer 16 and underlying parts of the electrode leads 13 at the windows 3'. mis completes the removal step (b) to expose parts of the leads 13 for contacting.
Thereafter, metal is deposited over the structure to form the conductor pattern 3 which is left on the substrate by removal of the photoresist mask 30 to lift off the part of the metal deposit thereon. In this case, as illustrated in Figure 9, the substrate conductor pattern 3 contacts exposed sidewalls of the electrode leads 13 instead of overlapping the leads 13 as in Figures 5 and 8. If an overlapping contact is desired in the Figure 9 structure (instead of this abutting side contact), this may be achieved with an etching treatment which removes only the layer 16 at the windows 3' while leaving (at least most of) the underlying lead parts 13 in the windows 3'.
In the specific embodiments as described so far, at least one portion of the insulating passivation layer 16 is removed in step (b) to expose parts of the electrode leads 13 for contacting.
However, Figure IA illustrates an alternative body structure which when used instead of the structure of Figure 1 avoids the need for this subsequent removal of these parts of the layer 16 in step (b). Thus, the insulating passivation layer structure 16 of Figure IA comprises not only the contact windows 17 but also at least one additional window 37. The parts of the electrode leads 13 which are subsequently exposed in step (b) (when the body 10 is restricted to the area 12) extend into this additional window 37.
In the specific embodiments as described so far, the masking pattern with windows 3' for defining the conductor pattern 3 is provided before the metal deposition stage and the pattern 3 is left on the substrate by removing this masking pattern to lift off the overlying metal deposit. This is particularly advantageous in that the body 12 is protected by the overlying masking pattern during the deposition and definition of the metal for the conductor pattern 3.However, with sate materials and etching treatments, an alternative process for defining the conductor pattern 3 may sometimes be used, in which the metal is first deposited and then a photoresist mask pattern (cat#lementary to the pattern of the mask having windows 3') is provided on the metal to mask the parts 3, after which the exposed metal is removed by etching to leave the pattern 3 of the deposited metal.
Although in the device structures formed in Figures 5 and 8 a plurality of device elements are present in the or each remaining body structure 12, the body 10 may be etched throughout its thickness (e.g. in the step (b)) to define separate body structures 12 for each device element. Although Figures 1,3,5 and 7 illustrate the use of the invention with photodiodes, it may be employed with other device elements as well or instead of photodiodes. Thus, for example, infrared-sensing phototransistors (each with two p-n junctions) may be formed in the body 10, and/or photoconductive elements without p-n junctions may be formed.
Although the invention is particularly advantageous with cadmium mercury telluride and with infrared-sensing devices, it may be employed with other infrared-sensing materials such as lead tin telluride or indium antimonide, or even with devices which are not designed to sense infrared radiation, for example silicon circuit elements formed in the body 10 or even fast transistors of cadmium mercury telluride formed in the body 10.
From reading the present disclosure, other variations will be apparent to persons skilled in the art. Such variations may involve other features which are already knawn in the design, manufacture and use of cadmium mercury telluride infrared-sensing devices, systems and component parts thereof and other semiconductor devices, systems, and component parts thereof, and which may be used instead of or in addition to features already described herein. Although claims have been formulated in this application to particular combinations of features, it should be understood that the scope of the disclosure of the present application also includes any novel feature or any novel catibination of features disclosed herein either explicitly or implicitly or any generalisation thereof, whether or not it relates to the same invention as presently claimed in any claim and whether or not it mitigates any or all of the same technical problems as does the present invention. The applicants hereby give notice that new claims may be formulated to such features and/or combinations of such features during the prosecution of the present application or of any further application derived therefrom.

Claims (17)

1. A method of manufacturing a semiconductor device ccwprising the steps of (a) bonding a body comprising semiconductor material to a substrate via an adhesive layer, (b) removing at least one portion of the body throughout its thickness to leave a remaining semiconductor body structure on the substrate, and (c) providing electrical connections fran the substrate to regions of the body structure, which connections comprise electrode leads which contact said regions of the body structure and a conductor pattern which is provided on the substrate and contacts the electrode leads, characterised in that the electrode leads are formed on a first major surface of the body before bonding said first major surface to the substrate in step (a), in that parts of the electrode leads are exposed on the substrate by removing at least said portion of the body in step (b), and in that the conductor pattern is then deposited to contact the exposed parts of the electrode leads and to extend on the substrate.
2. A method as claimed in Claim 1, further characterised in that the remaining body structure formed on the substrate in step (b) is of elongate shape having longitudinal sides from at least one of which there protrudes a plurality of the electrode leads spaced along that longitudinal side of the body structure.
3. A method as claimed in Claim 2, further characterised in that before step (a) at least one row of semiconductor device elements is formed along an elongate portion of the body having the shape of the subsequently-formed body structure.
4. A method as claimed in Claim 3, further characterised in that said row of device elements is an array of infrared detector elements.
5. A method as claimed in Claim 4, further characterised in that the body or body structure is provided with an infrared-transmission array which corresponds to said array of infrared detector elements and which is formed on a second major surface opposite the first major surface of the body or body structure.
6. A method as claimed in Claim 5, further characterised in that the infrared-transmission array comprises an array of windows in an infrared mask layer on said second major surface.
7. A method as claimed in Claim 6, further characterised in that the infrared mask layer is of electrically conductive material contacting a portion of the body structure common to the array of detector elements so as to provide an electrical connection to this carton portion.
8. A method as claimed in any one of Claims 1 to 6, further characterised in that the body camprises a semiconductor layer on an electrically insulating base, said first major surface being the surface of the layer opposite the base.
9. A method as claimed in any one of the preceding claims, further characterised in that before step (a) there is formed on the semiconductor material at the first major surface of the body an insulating passivation layer structure having contact windows therein, and the electrode leads are provided on the body so as to contact said regions of the body via said contact windows.
10. A method as claimed in Claim 9, further characterised in that before step (a) at least one pn junction is formed in the body between at least one of said regions of the body and an adjacent part of the body, which pn junction extends to the insulating passivation layer structure at the first major surface of the body.
11. A method as claimed in Claim 9 or Claim 10, further characterised in that at least one portion of the insulating passivation layer is removed in step (b) to expose parts of the electrode leads.
12. A method as claimed in Claim 9 or Claim 10, further characterised in that the insulating passivation layer structure comprises the contact windows and at least one additional window into which extend parts of the electrode leads which are subsequently exposed in step (b).
13. A method as claimed in any one of the preceding claims, further characterised in that the semiconductor material of the body comprises cadmium mercury telluride.
14. A method as claimed in any one of the preceding claims, further characterised in that the substrate is of electrically insulating material and the conductor pattern forms terminal areas on the substrate.
15. A method as claimed in any one of Claims 1 to 13, further characterised in that the conductor pattern forms interconnecting links between the electrode leads and conductors on the substrate.
16. A method of manufacturing a semiconductor device substantially as described with reference to and/or as illustrated in any of the drawings.
17. A semiconductor device manufactured by a method as claimed in any one of the preceding claims.
GB8908219A 1989-04-12 1989-04-12 Forming semiconductor body structures with electrical connection on substrates Withdrawn GB2231199A (en)

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GB2231199A true GB2231199A (en) 1990-11-07

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5349234A (en) * 1992-05-29 1994-09-20 Eastman Kodak Company Package and method for assembly of infra-red imaging devices
DE19838373A1 (en) * 1998-08-24 2000-03-09 Fraunhofer Ges Forschung Photodetector, especially a photodiode array, is produced by bonded substrate thinning to allow back face radiation transmission to a photosensitive region
DE19838430A1 (en) * 1998-08-24 2000-03-09 Fraunhofer Ges Forschung Photodetector array, especially a photodiode array, is produced by forming a common electrode on the radiation incident back face to avoid radiation shadowing by front face wiring of individual electrodes

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1147469A (en) * 1965-06-30 1969-04-02 Texas Instruments Inc Semiconductor devices, integrated circuits and methods for making same

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1147469A (en) * 1965-06-30 1969-04-02 Texas Instruments Inc Semiconductor devices, integrated circuits and methods for making same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5349234A (en) * 1992-05-29 1994-09-20 Eastman Kodak Company Package and method for assembly of infra-red imaging devices
DE19838373A1 (en) * 1998-08-24 2000-03-09 Fraunhofer Ges Forschung Photodetector, especially a photodiode array, is produced by bonded substrate thinning to allow back face radiation transmission to a photosensitive region
DE19838430A1 (en) * 1998-08-24 2000-03-09 Fraunhofer Ges Forschung Photodetector array, especially a photodiode array, is produced by forming a common electrode on the radiation incident back face to avoid radiation shadowing by front face wiring of individual electrodes
DE19838373C2 (en) * 1998-08-24 2002-01-31 Fraunhofer Ges Forschung Method of making an array of thin film photodiodes
DE19838430C2 (en) * 1998-08-24 2002-02-28 Fraunhofer Ges Forschung Method of making an array of photodetectors

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