GB2228616A - Semiconductor optical receiver circuit - Google Patents

Abstract

In a semiconductor optical receiver circuit, comprising a PIN photodiode coupled to a JFET amplifier, the photodiode is provided as a lateral structure on a mesa disposed in a recess in the surface of a substrate on which the amplifier is formed. The photodiode and JFET amplifier are fabricated simultaneously. The photodiode is made in a different material from the substrate material. <IMAGE>

Description

OPTO-ELECTRONIC DEVICE This invention relates to opto-electronic devices, and in particular to integrated circuits incorporating both optical and electronic elements. The invention also relates to a method of fabricating such circuits.

The recent introduction of optical fibre transmission systems has generated a need for devices that provide an interface between the optical and the electronic portions of such systems. In particular, optical receiver circuits have been devised comprising a photo-diode, typically a PIN diode, coupled to an amplifier. Conventionally, the diode is a discrete device having a vertical configuration, i.e. a layered structure. Such an arrangement has a significant capacitance which limits the frequency at which the receiver circuit operates with the introduction of high speed transmitters, the data rate at which optical communication systems operate is becoming restricted by the speed limitation of currently available receiver circuits.

The object of the present invention is to minimise and to overcome this disadvantage.

Our co-pending application No. 8821304.6 (G.R.

Antell et al 15-3-1) describes and claims an integrated circuit device incorporating both electronic and optical elements disposed on a common semiconductor substrate, the optical elements being located each in a respective recess in the substrate whereby the structure having a substantially planar surface is provided.

The present invention is concerned with a further development of the device structure and process of our co-pending application.

According to one aspect of the present invention there is provided an optical receiver circuit disposed on a semi-conductor substrate, the circuit including a lateral photodiode formed on a body of a further semiconductor which body is located in a corresponding recess in said semiconductor substrate, and an amplifier circuit fabricated on the substrate adjacent the recess and coupled to the photodiode.

According to another aspect of the invention there is provided a method of fabricating an optical receiver circuit on a monolithic semiconductor substrate, the method including forming a recess in a major surface of the substrate, providing in said recess an epitaxially grown mesa of a further semiconductor material, said mesa being substantially coplanar with the substrate surface, and fabricating simultaneously a lateral PIN photodiode on said mesa and a field effect transitor amplifier on said substrate adjacent the mesa.

By providing the photodiode in a lateral or planar configuration, the input capacitance of the receiver circuit is reduced thus increasing the speed with which the circuit can operate. Advantageously the semiconductor body on which the photodiode is formed comprises a material whose spectral response to received radiation differs from that of the substrate on which the amplifier is formed. This prevents the generation of spurious signals within the amplifier and this improves the signal to noise ratio of the circuit.

An embodiment of the invention will now be described with reference to the accompanying drawings in which: Fig. 1 is a cross-sectional view of the receiver circuit; Fig. 2 is a plan view of the receiver circuit of Fig. It Fig. 3 shows the circuit diagram of the receiver of Fig. It Fig. 4 is a general view of a photodiode structure for use in a receiver circuit of Fig. 1 to 3; Fig. 5 shows an alternative receiver circuit incorporating a transimpedance amplifier; and Figs. 6 to 10 illustrate process steps in the fabrication of the receiver circuit of Fig. 1 to 3 or Fig. 5.

Referring to Figs 1 and 2 the receiver circuit is formed in a semiconductor substrate body 11, typically of indium phosphide (In P). The substrate 11 is semi-insulating and may be doped with iron (Fe). A recess 12 formed in a major surface of the substrate 11 contains a mesa 13 of a semiconductor material different from that of the substrate 11 but crystal lattice matched thereto. Preferably the mesa is formed from epitaxially grown material. Advantageously the mesa 13 is formed from undoped indium gallium arsenide (In Ga As) provided by epitaxial growth on the substrate 11.

Typically the mesa 13 is from 1.5 to 2.5 microns in thickness. The depth of the recess 12 corresponds to the thickness of the mesa 13 such that a substantially planar structure is obtained. The mesa 13 is etched around its periphery to define an isolation trench 14 whereby a lateral photodiode structure 15 fabricated on the mesa 13 is electrically isolated from the surrounding substrate 11. The side walls and bottom of the trench 15 are coated with an insulating film 16 e.g.

of silicon nitride.

The diode structure is formed by a plurality of p -type, e.g. magnesium or beryllium, implants 17, into the intrinsic mesa, and n-type surface regions (not shown) formed by the application to the mesa of a metallisation pattern 18 of a material which provides donor impurities at the semiconductor surface For this purpose we prefer to employ a layered structure of nickel coated with a gold/germanium alloy. A further metallisation 19, e.g. a multilayer gold/zinc/gold structure is applied to the mesa 13 in register with the + p -type implant to provide the anode of the diode structure. The silicon nitride film 16 extends over the diode surface and, advantageously, provides an anti-reflection coating.

An amplifier is formed on a substrate 11 adjacent the recess 12 containing the photodiode structure. This amplifier may comprise a pair of junction field effect transitions (JFET's) as shown in the circuit diagram of Fig. 3. Only one of these JFET's is shown in the sectional view of Fig. 1. Each JFET is formed by an n-type channel implant 20 into which a + p -type gate implant 21 is provided. Drain and source electrodes 22 are provided by a metallisation e.g. of nickel contact with a gold/germanium alloy. A gate metallisation 23, e.g. of a gold/zinc/gold layered structure, is also provided.

A further metallisation 24 is applied to provide a contact to the substrate (24a, 24b) and to the drain and source electrodes (24c) of the JFET. The circuit structure is coated with an insulating layer 16, e.g. silicon nitride, which as previously stated, performs the additional function of isolating the side walls of the mesa 13. The layer 16 is in turn coated with a plastics, e.g. polyimide, planarising layer 25.

An upper metallisation layer 26, e.g. of titanium/gold provides the circuit interconnections.

The equivalent electrical circuit of the receiver is shown in Fig. 3. The output of the photodiode D1 is coupled to the gate of JFET TR1 which, together with JFET TR2 forms an inverter amplifier.

It will of course be appreciated that the JFET's in the receiver circuit of Figs. 1 to 3 may in some applications be replaced with MESFET's. Also, the arrangement is not limited to the particular circuit arrangement shown in Figs. 2 and 3.

Referring now to Fig. 4, this details the construction of a photodiode. As previously described, the diode comprising a lateral PIN structure is disposed on a mesa 13 of semi-insulating indium gallium arsenide grown on the receiver substrate (not shown). A p -type region 17 is provided e.g. by implantation of magnesium or beryllium ions and is contacted by metallisation pattern 19 of gold/zinc/gold. The n-region of the diode is formed by metallisation 18 of gold-germanium on nickel alloyed into ther semiconductor. As shown in Fig. 4 the two metallisations provide an interdigitated pattern. This provides a planar diode of good sensitivity and of low capacitance.

For the mesa material described above, the photodiode responds to radiation in the wavelength range 1.3 to 1.55 microns. This wavelength range includes those wavelengths at which minimum dispersion of light carried by silica optical fibres is exhibited. Further, this is a wavelength range to which the JFET amplifier is insensitive. This prevents the generation of spurious signals in the amplifier by the incident radiation.

Typically the receiver circuit of Figs. 1 to 3 is mounted in a housing (not shown) whereby an optical film is terminated adjacent the surface of the photodiode. This ensures efficient optical coupling e.g. between an optical communications network and the receiver circuit Referring now to Fig. 5, this shows an alternative receiver circuit incorporating a transimpedance amplifier. The photodiode D1 is coupled to a cascode input stage provided by JFET's, TR51, TR52 and TR53. The output of the cascode is fed with JFET TR54 at a level shifting diode chain LSD to a transimpedance amplifier constituted by JFET's TR55 to TR59. Output from the circuit can be taken either from the source follower or from an open chain JFET TR60.

Advantageously the gate width of the input JFET TR51 is selected to match the capacitance of the photodiode D1 thus optimising the receiver sensitivity. An on-chip capacitor C1, employing the silicon nitride coating in the dielectric. reduces the series resistance effect of the level shift diode chain at high frequencies.

Figs 6 to 10 illustrate a fabrication process for the receiver circuit. Referring to Fig. 6, a semi-insulating indium phosphide substrate 11 is masked and etched to define a recess or well 12. The entire substrate is then provided with epitaxially grown surface layer 51 of indium gallium arsenide. The structure is next masked and etched to remove the InGaAs from the substrate surface outside the recess and from around the periphery of the material grown in the recess to form a mesa 13 (Fig. 7) surrounded by an isolation trench 14. The photodiode and JFETs of the receiver are next formed by a simultaneous processing technique.

An n-channel, e.g. silicon, implant 20 (Fig. 8) is provided to form the channel region of the JFET.

This is followed by a p -type implant, e.g. magnesium, to form the gate region 21 of the JFET and the p -type region 17 of the diode. A first metallisation comprising a lower nickel layer and an upper gold/germanium layer is applied to provide the drain and source 22 (Fig. 9) of the JFET and the cathode 18 of the photodiode. The first metallisation also provides a substrate contact 22a adjacent the JFET. A second metallisation comprising e.g. gold/zinc/gold provides the gate metal 23 of the JFET and the anode 19 of the diode. A third metallisation e.g. of titanium/platinum/gold provides contact (24a) to the drain and source of the JFET and (24b) to the substrate 11 adjacent the photodiode.

Next a passivating silicon nitride layer 16 (Fig. 10) is applied to the structure. This passivating layer is masked and etched and is then coated with a planarising polyimide layer. Windows are formed in this polyimide layer to expose the anode/cathode contacts of the photodiode and the drain/source contacts of the JFET. The polyimide is also removed from the surface of the photodiode to allow access of light thereto.

Finally, a fourth metallisation is applied to contact the diode and JFET and to provide an interconnection pattern thus achieving the structure of Fig. 1. Finally the structure may be mounted in a suitable package or housing.

It will be appreciated that, although the photodiode and JFET amplifier are formed on different semiconductor materials, they are both fabricated via the same processing steps. This greatly simplifies the fabrication process.

It will be understood that the process described above is not limited to the particular semiconductor materials described. Thus, for example, the substrate may comprise semi-insulating gallium arsenide and the mesa may comprise epitaxially grown indium gallium arsenide.

The optical receiver circuit described above may be used in a variety of applications, but is of particular use as a receiver in a long wavelength optical communication system.

Claims (12)

1. An optical receiver circuit disposed on a semi-conductor substrate, the circuit including a lateral photodiode formed on a body of a further semiconductor which body is located in a corresponding recess in said semiconductor substrate, and an amplifier circuit fabricated on the substrate adjacent the recess and coupled to the photodiode.

2. An optical receiver as claimed in claim 1, wherein the substrate comprises indium phosphide

3. An optical receiver as claimed in claim 2, wherein the substrate is doped with iron.

4. An optical receiver as claimed in any one of claims 1 to 3, wherein the amplifier comprises a plurality of junction field effect transitions (JFETs).

5. An optical receiver as claimed in any one of claims 1 to 4, wherein the photodiode is a PIN diode comprising a p-type region, an intrinsic region and an n-type region.

6. An optical receiver as claimed in claim 5 wherein the p-type region of the diode and the p-type gate regions of the JFETs comprise a magnesium or beryllium ion implant.

7. An optical receiver as claimed in claim 5 or 6, wherein the n-type region of the photodiode is provided by a surface metallisation alloyed with the semiconductor from which the diode is formed.

8. An optical receiver as claimed in any one of claims 1 to 7, wherein the amplifier is a transimpedance amplifier.

9. An optical receiver circuit substantially as described herein with reference to and as shown in Figs.

1 to 3 or Fig. 5 of the accompanying drawings.

10. A method of fabricating an optical receiver circui on a monolithic semiconductor substrate, the method including forming a recess in a major surface of the substrate, providing in said recess an epitaxially grown mesa of a further semiconductor material, said mesa being substantially co-planar with the substrate surface, and fabricating simultaneously a lateral PIN photodiode on said mesa and a field effect transitor amplifier on said substrate adjacent the mesa.

11. A method of fabricating an optical receiver circuit substantially as described herein with reference to and as shown in the accompanying drawings.

12. An optical communications system incorporating one or more receivers as claimed in any one of claims 1 to 9.