GB2222833A - Electrical circuit board production - Google Patents
Electrical circuit board production Download PDFInfo
- Publication number
- GB2222833A GB2222833A GB8920080A GB8920080A GB2222833A GB 2222833 A GB2222833 A GB 2222833A GB 8920080 A GB8920080 A GB 8920080A GB 8920080 A GB8920080 A GB 8920080A GB 2222833 A GB2222833 A GB 2222833A
- Authority
- GB
- United Kingdom
- Prior art keywords
- layer
- metal
- copper
- section
- silver
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/03—Metal processing
- H05K2203/0315—Oxidising metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/09—Treatments involving charged particles
- H05K2203/095—Plasma, e.g. for treating a substrate to improve adhesion with a conductor or for cleaning holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
- H05K2203/1142—Conversion of conductive material into insulating material or into dissolvable compound
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/12—Using specific substances
- H05K2203/121—Metallo-organic compounds
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/105—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by conversion of non-conductive material on or in the support into conductive material, e.g. by using an energy beam
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
Abstract
A thin metal layer is bonded to an insulating substrate and metal tracks are plated e.g. by electroplating onto the thin metal layer, the surface of the tracks and the entire thickness of the metal layer are then converted to compound which is soluble in a fluid that doesn't attack the metal conductors, and the compound is removed by chemical dissolution to leave the metal tracks substantially unaltered.
Description
ELECTRICAL CIRCUIT BOARD
BACKGROUND
The present invention relates to an improved method for the fabrication of electrical circuit boards. Such circuit boards have been in use for a long time and general methods for their fabrication are well known. However recent developments in the utilisation of such boards have led to the requirement for the boards with better track definition and the ability to remove heat from the thermally sensitive semiconductor devices. One objective of this invention is to enable circuit boards to be more easily fabricated for such uses.
Conventional printed circuit boards have used the concept of pattern plating for many years in which a thin layer of copper is chemically deposited onto a plastic substrate and then a photosensitive polymeric film is laminated onto the surface. After a pattern corresponding to the tracking has been formed in the polymeric film, copper is electroplated into those channels using the chemically deposited copper as an electrical pathway. Finally the resist is removed and a layer of copper is chemically etched away from the entire board to leave the electroplated tracks electrically isolated and mechanically attached to the plastic by the electroless or chemically deposited copper.The advantage of this method is that the geometry of the track is defined by the attainable geometry of the channels that are formed in the resist, and it has been found that this can be very accurately control led.
In attempting to convert the same process to use an electrically insulating but heat conducting ceramic as the substrate, there is a difficulty in obtaining adequate adhesion of the electroless copper to the ceramic. Deluca has described a method in UK Patent
Application 2141740A that requires extensive preparation of the ceramic surface in order to obtain adequate adhesion of the electroless copper. Moran has previously taught (U.S. Patent 4606788) a method using dissimilar metals where the first thin layer is formed of a metal that is readily bonded to the ceramic and the second layer is electroplated high conductivity copper.
The success of this method lies in the ability to etch the thin layer in a molten solder. In some circumstances it may be required not to end up with a circuit board in which the tracks are solder coated. It is an objective but not a limitation of this invention to provide advantageously a method for etching dissimilar metals in which the thin layer is chemically more resistant than the thick layer.
SUMMARY OF INVENTION
According to the present invention it is provided that a circuit board maybe formed by the steps of:
a) Coating a substrate with a thin layer of metal.
b) Coating the said layer of metal with a photoresist and
developing a pattern in the photoresist corresponding to
the electrical tracking desired.
c) Electroplating a metal in the channels of the
photoresist to form the tracks using the thin layer as
the electrical pathway for electroplating.
d) Removing the photoresist.
e) Treating the surface of the thin metal layer and
electroplated metal to form a new chemical compound on
either the thin layer or both metals. The depth to which
the conversion takes place shall be equivalent to the
entire thickness of the thin layer.
f) Etching away the treated surface so as to leave the
electroplated tracks isolated but bonded to the
substrate.
According to this invention the thin metal layer and electroplated layers may be the same metal or dissimilar metals.
According to this invention the surface treatment may be either using liquid chemistry or gas plasma methods, or exposure to gases that attack the surface of the metals.
In an alternative version of this invention the steps b) and c) can be revised to:
b) Electroplating a second metal layer over the first layer
of metal.
c) Coating the second layer of metal with a photoresist,
developing a pattern in the photoresist, and then
removing the exposed parts of the second metal layer by
means of an etching fluid.
PREFERRED EMBODIMENT
Figure 1 shows the ceramic substrate coated with a thin metal
layer.
Figure 2 shows a layer of photoresist added.
Figure 3 shows the pattern of conductors developed in the
photoresist.
Figure 4 shows the electroplated metal conductors.
Figure 5 shows the substrate after removal of the photoresist.
Figure 6 shows the effect of converting the thin layer to
another compound.
Figure 7 shows the substrate and conductors after
processing.
A 96% alumina#substrate (10) (e.g. purchasable from Hoechst
Technical Ceramics) is precleaned and a layer of silver resinate (20) (e.g. Heraeus 30001) is screened onto the surface and fired to deposit a thin typically less than 2 microns but not limited to this thickness silver layer according to the manufacturers instructions. A dry film photoresist (30) for example but not limited to Du Pont 10/10, is laminated onto the substrate and processed according to the manufacturers instructions using a photomask to leave channels (35) in the resist where it is desired to form electrical tracks. Copper (40) is then electroplated onto the silver using any standard industrial electroplating bath that doesn't effect the resist or silver layer. The resist is then stripped according to the manufacturers instructions.The thickness of the copper layer will depend on the choice of resist and is typically from 5 to 200 microns.
The entire substrate is then placed in a gas plasma chamber and is subjected to an oxygen plasma using methods well known in the circuit board industry for de-smearing. This action will convert the surface of the silver (50) (especially) and the copper (60) to their respective oxides. The conditions in the plasma should be such as to oxidise the silver to its entire thickness and will depend on the machine and electrode arrangement employed. Experimentation is required to determine the optimum for any particular machine.
The entire susbtrate is then placed in dilute, typically but not limited to, 10% - 20% hydrofluoric acid, in which both the silver and copper oxides dissolve rapidly but the copper does not. This leaves the electroplated copper tracks electrically isolated but mechanically bonded to the ceramic substrate.
It will be readily appreciated that the method is not limited in form to the example given which could equallly well have been double-sided with or without through connections from side to side or multilayered. It will also be readily appreciated that the choice of plasma is not limited to oxygen plasma and could include any plasma with free species that cause the metal to be converted into a compound that is readily soluble in a fluid that does not attack the metal.
It will be further readily appreciated that the chemical changes in the metal surface could be induced using liquid chemistry or exposure to gaseous substances. It will be still further appreciated that the dissolving liquid could be any fluid that preferentially dissolves the converted surface rather than the metal.
It will be appreciated that the metal layer (20) could be copper, silver, gold, nickel or chromium but is not limited to these metals and deposited by any suitable method well known in the industry.
It will be appreciated that the electroplated metal (40) could include but is not limited to copper, gold, silver or nickel.
It will be appreciated that the substrate (10) could include but is not limited to ceramic (of any type but especially aluminium oxide or aluminium nitride), glass ceramic, glass, epoxy, polyimide, polyphenylensulphide, polyester or any other suitable high temperature plastic.
Claims (12)
1 A method for forming an electrical wiring board that includes
the steps of:
a) coating an insulating material with a first metal
layer
b) selectively forming a second layer of metal on the
first metal layer such that the second layer forms the
bulk of the desired conductor pattern
c) treating the first and second layers so as to convert at least thefirst layer into a new compound and d) removing the new compound by chemical dissolution so as
to leave the second metal layer substantially
unaltered
2 A method according to claim 1 in which the two metal layers
are the same material
3 A method according to claim 1 in which the two metal layers
are different materials
4 A method according to claim 3 in which the first layer is
silver and the second layer is copper
5 A method according to claim 4 in which the silver layer is
formed by metallo-organic or metal resinate decomposition
6 A method according to claim 4 in which the copper layer is
formed by electroplating
7 A method according to claim 6 in which the copper layer is
formed by electroplating a pattern defined by a photoresist
8 A method according to claim 1 in which the treatment of
section c) is by means of an aqueous solution
9 A method according to claim 1 in which the treatment of
section c) is by means of exposure to a gas or mixture of
gases.
10 A method according to claim 1 in which the treatment of
section c) is by means exposure to a gas or mixture of gases
in the plasma state
11 A method according to claim 10 in which the gas is either a
mixture containing oxygen or is oxygen.
12 A method according to claim 1 in which the chemical
dissolution of section d) is by means of a diluted acid 13 A method according to claim 12 in which the acid is
hydrofluoric acid 14 Any method substantially in accordance with the preceding
claims 15 A circuit board formed by the method described in the
preceding claims
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB888820960A GB8820960D0 (en) | 1988-09-07 | 1988-09-07 | Electrical circuit board |
Publications (2)
Publication Number | Publication Date |
---|---|
GB8920080D0 GB8920080D0 (en) | 1989-10-18 |
GB2222833A true GB2222833A (en) | 1990-03-21 |
Family
ID=10643182
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB888820960A Pending GB8820960D0 (en) | 1988-09-07 | 1988-09-07 | Electrical circuit board |
GB8920080A Withdrawn GB2222833A (en) | 1988-09-07 | 1989-09-06 | Electrical circuit board production |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB888820960A Pending GB8820960D0 (en) | 1988-09-07 | 1988-09-07 | Electrical circuit board |
Country Status (1)
Country | Link |
---|---|
GB (2) | GB8820960D0 (en) |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3708403A (en) * | 1971-09-01 | 1973-01-02 | L Terry | Self-aligning electroplating mask |
US3922420A (en) * | 1974-05-31 | 1975-11-25 | Rca Corp | Method of making a semi-transparent photomask |
EP0170477A2 (en) * | 1984-08-01 | 1986-02-05 | Peter Leslie Moran | Multilayer systems and their method of production |
-
1988
- 1988-09-07 GB GB888820960A patent/GB8820960D0/en active Pending
-
1989
- 1989-09-06 GB GB8920080A patent/GB2222833A/en not_active Withdrawn
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3708403A (en) * | 1971-09-01 | 1973-01-02 | L Terry | Self-aligning electroplating mask |
US3922420A (en) * | 1974-05-31 | 1975-11-25 | Rca Corp | Method of making a semi-transparent photomask |
EP0170477A2 (en) * | 1984-08-01 | 1986-02-05 | Peter Leslie Moran | Multilayer systems and their method of production |
Also Published As
Publication number | Publication date |
---|---|
GB8920080D0 (en) | 1989-10-18 |
GB8820960D0 (en) | 1988-10-05 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |