GB2215557A - Interface unit - Google Patents

Abstract

The interface unit is a message switch used in a telecommunication system between control and monitoring means and the system proper. It includes a set of USART's, one of which is a master and is connected to a link from the control and monitoring means, while the others are slaves which give access via output ports to various portions of the system. A message from the control and monitoring means passes via memory to a processor which determines the action needed, and emits a message via the appropriate slave USART to the appropriate part of the system. A message from the system, either in response to a message from the interface or generated in the system, is received via the appropriate port and is passed in a reverse manner to that just described to control and monitoring means. Messages generated in the system are usually alarms. <IMAGE>

Description

INTERFACE UNIT The present invention relates to telecommunication systems, and especially to control equipment for use in such systems.

Modern telecommunication systems often have an arrangement included for network management, which as its name implies, performs a number of functions for the control and operation of the system. Such control and management includes dealing with internal communications for the system's own so-called house-keeping operations. One of these functions is the collection of alarms.

According to the invention there is provided an interface unit which includes a multi-port message switch which is processor controlled to interface between a number of telecommunication equipments and a control arrangement.

An embodiment of the invention will now be described with reference to the accompanying drawings, in which: Figure 1 is a highly schematic block diagram of a digital telecommunication system in which the interface can be used, and Figure 2 is a schematic diagram of the interface unit, which appears in Figure 1 as the block CFS.

The system in which the message switch to be described is used includes a local area network (LAN) of the Ethernet type, shown at 1, Figure 1, to which are connected a number of access manager work stations, including prime and shadow stations. There is also connected to the LAN a file server 2, which as indicated is duplicated, and contains information useful in the operation of the systems. The whole is controlled by a Network Control NCS, with which is associated a laser printer 3 which prints out information relating to the operation of the system, as needed.

The system also includes a network connected thereto via a bridge unit 4, with which is associated a number, four as shown, of CXS units 5 each of which is a unit such as described below with reference to Figure 2.

This includes a service access switch 6, via which customers gain access to the network, and a number of multiplexers included in the CSM blocks. These can be of the type described in our patent specifications Nos.

2185658A and 2185659A, referred to below. Each of these CSM's is a customer service module, whose multiplexers give access, to customers. Network messages from the access manager work stations are routed- via the LAN 1 to the appropriate bridge, one of which is shown at 4. This bridge transfers each of the messages via an RS232 link, using the Polled Session Protocol, to the correct CXS, such as 5. The CXS, under control of its CPU (see below) does a validation check on each incoming message, and if it is destined for that CXS it is buffered. If the message is for that CXS, then it takes action accordingly. If the message is intended for one of the other multiplexers served, it is switched out of the relevant CXS port to the multiplexer.

Each of the multiplexer ports on a CXS is connected to a control multiplexer within an ETM unit, and such a control multiplexer routes the message to the appropriate CSM unit where it is internally routed via a master multiplexer to the destination multiplexer.

Responses from the multiplexers follow the same route in reverse back up to the access manager work stations via the CXS.

The system also includes a service access switch 6, which gives access, inter alia, to the public switched network, and also (additionally) to the network management system.

The equipment shown in Figure 2, which is referred to hereinafter as CXS, is based around a central processor unit (CPU), in this case an Intel 80188 eight-bit microprocessor. Input to and output from the equipment is controlled by nine USART's (Universal Synchronous Asynchronous Receiver Transmitter), in this case of the 8251A type, four DMA( Direct Memory Access) controllers, in this case of the 8237A type, and four Interrupt Controllers, in this case 8259A type. There is 64K of EPROM for firmware storage and 5 x 32K of SRAM. Note that other equivalent components to those specified above may be used.

The interconnection of these arrangements can be seen from the drawing, which also includes logic for address/data bus buffering and decoding.

In this drawing the USART's are all included in one block.The master has a full duplex input/output connection to the system of which the equipment forms part. There are also eight half-duplex ports from the slave USARTs which in the system referred go to multiplexers such as described in our Patent Specifications No. 2185658A (D.B. Waters et al 6-3) and No. 2185659A (M.J. Sexton 5). Such multiplexers are referred to as PDMX units, PDMX being a Registered Trade Mark of STC PLC. Messages to and from these multiplexers are thus dealt with, and these messages include alarm messages. These messages are communicated to a system management arrangement, known as an Access Manager (not shown) via the full duplex port. The messages from the Access Manager may include instructions to the multiplexers as to what to do about the conditions represented by the messages from the multiplexers.Thus the CXS is a specialised message switch which acts as an interface between the multiplexers and the Access Manager. Where the system includes a very large number of multiplexers (or other units), two or more CXS devices may be needed.

The CXS also includes other logic, as indicated in the drawing.

The address ranges of the EPROM and the RAM's which contain information for, and instructions for, the microprocessor and other parts of the equipment, are set out in the following table: Low RAM Ok to 32k Mid RAM 1 512k - 544k Mid RAM 2 544k - 576k Mid RAM 3 576k - 608k Upp. RAM 608k - 640k EPROM 960k - 1024k Note that incoming messages, including alarm messages, are passed via the appropriate USARTs to the memory, from which they pass as needed to the CPU. The latter examines these messages, and determines what response is needed, under control of its own instructions, and sends the appropriate reply messages via the Master USART to the Access Manager.

The nine input/output ports are asynchronous.

The full duplex port, which is connected to the Master USART works at 9600 baud. The other eight ports, which are half duplex, and which in the present case serve eight control PDMXs, work at 4800 baud.

There are four programmable interrupt controllers, in this case of the 8259A type. These are configured as one master and three slaves. Each of these controllers can handle up to eight vectored prioritised interrupts. The sources of these interrupts are: (a) Tx-rdy (Transmit Ready Signal) and Rx-rdy (Receive Ready Signal) for each USART.

(b) EOP (DMA End of Process Signal) from each DMA Controller.

(c) Timer output for a scheduler interrupt.

Any interrupt to a slave causes an interrupt to the Master, which in turn sends an interrupt request signal on the line Int-Req to the CPU. The latter then acknowledges the receipt of the interrupt request via an interrupt acknowledge line Int-Ack. The CPU responds to the interrupt as appropriate thereto. Thus for an alarm it would cause a message to be sent to the Access Manager relating to that alarm, plus any suggested response to the alarm.

The Master USART interrupts have the highest priority.

There are four programmable DMA controllers, whose function is to facilitate direct data transfer to and from the system memory (SRAMs) via the USARTs.

These controllers are configured as one master and three slaves. Note that the master DMA does not output any addresses or directly transfer any data; its channels are used only for prioritising and controlling the three slaves.

Requests for DMA control comes from the control logic, whose inputs are the Tx-rdy amd Rx-rdy lines from each USART. Thus this logic block has 18 input lines The end of a DMA transfer operation causes an EOP message, which in turn causes an interrupt procedure for message validation and BCC checking. BCC refers to Block Character check.

The CPU is the control element of the CXS, which is implemented on a single surface mount board.

The 80188 microprocessor used is an eight-bit processor with sixteen-bit internal registers, running at 6MHz.

It has a multiplexed bus structure to communicate with the programmable devices. It uses memory segmentation to allow a physical address space of lMByte. It has interrupt request (Int-Req) and interrupt acknowledge (Int-Ack) pins for use with external interrupt controllers, and Hold-Req and Hold-Ack for use with external DMA controllers. These external interrupt sources and controllers facilitates the interworking with the Access Managers.

Claims (6)

1. A message switch for use in a telecommunications system as an interface between an access work station used for the control and monitoring of the system and a number of parts of the system, in which: (a) switching means is provided which has an input from a said work station and a numberof ports each giving access to one of a number of portions of the system; (b) messages from a said work station are passed by said switching means to a memory from which they go to a processor; (c) the processor determines from a said message what action is needed and transmits signals appropriate to such action via the appropriate one of said ports to the portion of the system to which that message relates:: (d) a message from a said portion of the system, either originated thereat or generated in response to a message from a said work station, arrives at the message switch via the appropriate one of said ports; (e) a message received via a said port is passed by said switching means to said memory from which it goes to said processor; and (f) the processor determines from a message received via a said port what action is needed, which action includes transmission of a message appropriate thereto to a said work station.

2. A message switch as claimed in claim 1, in which the switching means includes a number of USART's one of which is a master USART via which messages are received from and sent to a said work station and the others of which are slave USART's via which messages are sent to and received from the appropriate portion of the system.

3. A message switch as claimed in claims 1 or 2, in which reception of a message such as an alarm via one of said ports causes interrupt means to advise the processor that a said message has arrived, whereafter the processor deals with that message.

4. A message switch for use in a telecommunications system as an interface between an access work station and a number of parts of the system, substantially as described with reference to Fg.2 of the accompanying drawings.

5. An automatic telecommunications system, which includes a local area network (LAN) to which are connected 2 plurality of work stations for use for control and monitoring of the system, a memory network for the storage and supply of information relative to the system, a control processor for the system, and an access node (hereinafter called a bridge) to give access to the system as used by subscribers, wherein (a) the bridge gives access to a plurality of interface units each serving part of the system, (b) each said interface unit gives access to a sub-part of its said part of the system, each said interface unit being a message switch as claimed in claim 1,2,3 or 4; ; (c) messages appropriate to the system are sent in a hierachical manner from a said work station via the LAN, the bridge and the appropriate one of said interfaces to the part of the system to which those messages relate; and (d) messages originating in the system are sent in the reverse direction to that set out in (c) to a said work station.

6. An automatic telecommunications system substantially as described with reference to the accompanying drawings.