GB2211972A - Keyboard - Google Patents

Abstract

In a keyboard using key scanning, memory means saves inputted data for a predetermined period, and entry of data the same as that saved in the memory means is inhibited. Thereby, doubled entry of data in error caused by key chatterings and so on is prevented. Duplication of memory means permits two rapid sequential data entries. <IMAGE>

Description

8picification Data input device provided with multipl keys This invention relates to a data input device provided with multiple keys, more particularly to a data input device capable of preventing doubled data entry in error with the same key.

In conventional data input devices on electronic equipmer.ts, such as electronic typewriters, personal computers and word processors are qenerallv provided with stroke-type keys (hereinafter referred to simply as "stroke keys") which prove to be easily operated and relatively reliable.

In such devices, stroke keys are located at the corresponding contact points of the electrical contact matrix on an FPC (Flexible Printed Circuit) board. The control unit of the data input device carries out key scanning operation to identify which key has been depressed and whether the key is turned "ON" or "OFF".

A number of arrangements have been proposed to offer such an identifying operation of a selected key depressed by the operator as accurate as possible to determine if it is turned "ON" or "orr'11 For inotance, some stroke keys are provided with contact rubbers to resiliently rebound the key depressed to ensure a light-touch key operation while facilitating "ON" and "OFF" identifying operation.

Furthermore, it is disclosed in Japanese Patent Provisional Publication SHO 48-41628 and so on, a key entry system in which the key operation is not identified as "OS" until a predetermined length of time (approx. 50 milliseconde(msec.)) passes after the key is depressed, and release operation of the key is not identified to be "OFF" until a predetermined length of time (approx. 50 msec,) passes after the key is released. The arrangement thus attempts to avoid any key data entry in error due to key chattering occuring at the electrical contact when depressed. The above key entry system publication is thus able to avoid key entry in error, i.e., tnisidentification of ON/OFF operation of the key caused by key chattering at the electrical contact.

However, in some electronic apparatuses equipped with impact printers, e.g., electronic typewriter., "turning on" a key directly causes a type associated with the key to be struck by the hammer to print out the type as a character. If the operators finger continues lightly to press the key which has been depressed for data entry, the electrical contact for that key is closed because of the hammer blow. As the period of time from release operation of the key to "OFF" determination for the key i6 short (only 50 msec.), the hammer impact may be taken for another data entry with the same key immediately after that period.

ft is possible to extend the time for "OFF" determination to 100 or 150 msec.. Skilled operators are however able to key in at a remarkable speed so that the key data typed during the extended time may not be entered actually, resulting in a text with some characters missing.

It is therefore an object of the invention to provide an improved data input device capable of being prohibited, for a given time afer the key operated has been determined to be "OFF", from accepting doubled entry of data with the same key to prevent any data entry in error key operation, while enabling other keys to be operated at a normal speed.

For this purpose, according to this invention, there is provided a data input device which comprises; a plurality of keys to be operated for data entry; key scanning means for scanning said keys to detect ON/OFF operation thereof; first confirming means for confirming that a certain keys is ON-operated for data entry, based upon the results of detection by said key scanning means; second confirming means for confirming that said certain key is OFF-operated after data entry, based upon the results of detection by said key scanning means; inhibit data memory means for saving a data corresponding to said certain key for a predetermined period after OFF operation of the certain key has been confirmed by said second confirming means; and inhibit means for inhibiting the entry of the data which is the same as that S807Rd in said inhibit data memory means.

Brief DescrlPtion of the AccomPanying Exemplary Drawings rig. I is a plan view showing a key arrangement of a data input device embodying the invention; Fig. 2 is a longitudinal sectional view showing electrical contacts of stroke keys; rlg. 3 a configuration diagram or a circuit matrix and a control unit of the data input device; Fig, 4 is a circuit diagram schematically showing part of the circuit matrix of Fig. 3; Fig.S is an operation time chart during a key scanning; Fig. 6 is an explanatory view of operation of Zmn counter Fig. 7 is a flow chart of a data input control; and rigs. 8(A) through 8(E) are flow charts of a routine for key entry processing of the data input control.

De6crintion Of the Exemplary Embodiments As illustrated in Fig. 1 a keyboard 1 of a two-key rollover type electronic typewriter embodying the invention has rows of 64 keys including alphabetic keys, numeric keys, symbol keys and function keys as in common typewriters.

Although in the actual keyboard 1, alphanumeric characters, symbols and functions are printed on key tops, the keyboard 1 shown in Fig. 1 indicates code data to be given when the keys are depressed, for easier understanding of the following descriptions, Each key is a stroke key of common structure as illustrated in Fig, 2, when a key is pressed by an operator, a key top 8 together with a key stem 9 is depressed resiliently flexing a contact plate IC to cause its projection ICa to push an electrical contact 7. The key assemblies are mounted on an FPC (Flexible Printed Circuit) board 5 including a circuit matrix (see Fig. 4) with 8-rows by 8-columns electrical contacts.The key-scanning operation is carried out with scan signals sent from a control unit to be described later for key entry processing.

The FPC board 5 is of a three-layer structure consisting of an upper plastic film 12 with an appropriate pliability and resilience (hereinafter referred to simply as "upper film"), a lower plastic film 13 (hereinafter referred to simply as "lower film"), and an insulating spacer 14 sandwiched between the upper and lower films 12 and 13. On the back surface of the upper film 12 mounted are upper electrodes 7a in the form of continuous printed circuit coordinated with the key arrangement. The front surface of the lower film 13 is provided with counterpart lower electrodes 7b likewise in the form of continuous printed circuit.At junctions of the upper and lower electrodes 7a and 7b, formed are electrical key contacts 7 which are arranged to form a circuit matrix with 8 rows and B column (see rig. 4).

The control unit 100 comprises as illustrated in Fig. 3, a CPU (Central Processing Unit) 16, a ROM (Read-Only-Memory) 17 and a RAM (Random Access Memory) 18. The lower electrodes 7b on mO through m7 columns of the keyboard circuit matrix 4 are connected to the corresponding output terminals YO through Y7 of the CPU 16, while the upper electrodes 7a on nO through n7 rows are connected to the corresponding input terminale XO through X7 of the CPU 16. Also, the lower electrodes 7b on mO through m7 columns and the upper electrodes 7a on nO through n7 are connected to a reference voltage line by way of pull-up resistors 19.

Fig. 4 is a diagrammatic view of part of the circuit matrix connected as indicated to enable two keys to be entered at one time. When one of the keys is now turned "ON1,, the input terminals XO through X7 on the corresponding columns are brought into electrical connection with the output terminals YO to Y7 on the corresponding row.If, however, three keys, for example (ml, uni), (ml, nO) and (m2, nO) are turned "ON" at one time, the input terminal X1 is electrically connected with the output terminal Y2 by way of the electrical contacts 7 corresponding to these three keys, just like the key (m2, ni) only is turned "ON", It is threrfore impossible to identify which one of the three keys has been actually turned "ON".

For a basic correspondence with the key arrangement on the FPC board 5, a. described previously, the upper electrodes 7a are mounted at the back surface of the upper film 12 in the form of continuous printed circuit, while the front surface of the lower film 13 is provided with counterpart lower electrodes 7b likewise in the form of continuous printed circuit, and key electrical contacts 7 are formed at junctions of the upper and lower electrodes 7a and 7b. The 8-rows by 8column matrix 4 is configured by partly deleting or adding circuit components of the upper and lower electrodes 7a and 7b.

The ROM 17 in the control unit 100 stores therein a control program that carries out a key scan control by delivering L(Low)-level scan signals tquentially for each column of the keyboard circuit matrix 4 while detecting scan signals sequentially for each row on each column, as well as key entry processing control associated with the key scan control to discriminate between "ON" and OFF" operations of the key. The ROM.

17 further stores therein a code data table for converting locational information of each key on the circuit matrix 4 to a code data and a control program for key entry inhibiting control to be described later.

In the RAM 18, there are provided a key buffer 30 consisting of a stack FIFO (First-Zn-First-Out) memory for storing a code data corresponding to the operated key, a m counter 31 sequentially storing mO through m7 column information in response to the key scanning operation, a n counter 32 sequentially storing nO through n7 row information in response to the key scanning operation, Zmn counter 33 corresponding to each 64 keys (m:O through 7, n::O through 7), a Zmn counter pointer 34 for sequentlally pointing at the emn counters 33 in response to the key scanning operation, a pair of first key code buffers 35a and 35b for saving a maximum of two code data from the operated key, a pair of second key code buffers 36a and 36b for retaining the data having been stored in the first key code buffers 35a and 35b for a predetermined time after the key is OFF-opercted, i.e., released, a pair of key code counters for counting the predetermined time (e.g. 50 millisecond.(msec.)) for retaining the data in the second key buffers 36a and 36b, and a number of memoricB for tentatively storing the results of operation at the CPU 16.

For convenience of explanation, the code data stared in the first key code buffers 35a and 35b are referred to as KCM1 and XCM2 respectively, the code data stored in the second key code buffers 36a and 36b as BND1 and BND2 and the count values stored in the key code counters 37e and 37b as BC? and BC2, Since the key scan control as described above is generally carried out in common 2-key rollover input devices, only a simplified explanation will be given below with reference to Fig. 5. The CPU 16 sequentially outputs 2-msec.L-level scan signals 20 at its output terminals YO - Y7. While the scan signal is sent to each of the output terminals XO through Y7 it also performs key scan operation at a 16 msec. cycle by sequentially entering signals to the input terminals XO - X7. It then detects "ON" operation signal 21 and "OFF" operation signal 22 for each key.

If for instance the (m3, n4) key is turned "ON" from the time tO to ti, two L-level "ON" operation signals are consecutively detected at the input terminal X4 as shown. When the (m3, n4) key is operated together with the (m3, n7), the two L-level "ON" operation signals 21 are consecutively detected at the input terminal X4 and then X7. As will be clarified later in connection with the key entry inhibiting control, the scan signal 20 consists of an aggregate of eight L-level signals, while "ON" operation signal 21 and "OFF" operation signal 22 are 2 msec. signals.

In case of stroke keys, chattering during key operation usually takes about 10 msec. Therefore, the problem of misidentification will not occur if the key is identified as "ON" when two or more "ON" operation signals 21 are detected, i.e., the key is kept down for at least 16 msec, The key entry processing control is now described with reference to the flow charts of Figs. 7, 8(A) through 8(E). For a better understanding of the flow chart, explanation is first given for the operation of the Zmn counter 33 which examiner whether the key depressed is turned "ON" or "OFF" with reference to Fig.

6.

Fig. 6 is a diagram showing operation of the Zmn counter 33 for each key, in which numerals indicate the value in the Zmn counter, solid-line arrows the action when detecting an "ON" operation signal 21, and brokenline arrows the action when detecting an "OFF" operation signal 22 (H(High)-level signal detected at every key scan timing).

Zn the Zmn counter 33 for each key, assuming the counter value to be CNT, CNT I 0 holds as long as the key is kept "OFF", while it turns to CNT @ 1 when the first "ON" operation signal 21 ii detected. When the second "ON" operation signal is detected successively, the key is determined to be "ON" and the data corresponding to the key is written into the key buffer 30. With succeeding 3rd and 4th "ON" operation signals 21 detected, CN r 2 is retained without being counted up. On the other hand, CNT is counted up from CRT r 2 every time an "OFF" operation signal 22 is detected in sequence.When the third "OFF" signal 22 is detected (3 x 16 msec. has elapsed from the point of CNT r 2), CNT w 4 is switched back to CNT 1 O. As soon as ONT = O is reached, the key is determined to be "OFF" and its "OFF" data is written into the key buffer 30.

In case that there is no successive second "ON" operating signal 21 after the first "ON" signal 21 has been detected, CNT " 1 is switched to CNT @ 0. Also, when an "ON" signal 21 is detected with CNT @ 3 or 4 maintained, it is turned into CNT 1 2.

Since in this embodiment two keys can be entered at the same time and therefore the two Zmn counters 33 operate at the same time, the values CNT corresponding to the two Zmn counter 33 are referred to as CNT1 and CUT2.

Routine of the key entry processing control including the key entry inhibiting control executed at the control unit 100 is now described with reference to the flow charts given in Figs, 7 8(A) through 8(E).

As shown in Fig, 7, the control routine is started as soon as the power source is turned on. In rtep 61 (hereinafter referred to simply as "S1", the same applies to other steps), initialization Is carried out by clearing the contents of all the memories in the RAY.

18, counters and pointers. In 52, key entry processing described later is executed, so that the code data corresponding to the operated key is written into the key buffer 30.

In s3, it is examined whether the key entry has been taken place, i.e., the key has been depressed or not. If it has been depressed, the processing goes to s4, where the code data written in the key buffer 30 is output to the control unit of an external device then returning to 52.

If, on the other hand1 the key has not been depressed the processing goes to S2 directly.

The processing S2 through 64 are repeatedly carried out for instance at a cycle of 2 msec..

The key entry processing in S2 is minutely described below with reference to Figs. 8(A) through 8(E), In the drawing, "#" represents the value of the counter 31, "n" the value of the counter 32, and "CNT1" and "CNT2" the values of the Zmn counters 33.

At first, in S10, it is examined whether the value "m" of the m counter 31 is m " 8 or not. If the result is "YES", processing goes to S11, while if not, it directly goes to S12. In S11, the value of the m counter 31 is set to m = 0. In 512, the value "n" of the n counter 32 is set to n . 0, while at the same time, (m, n) is written into the Zmn counter pointer 34 to point at the Zmn counter 33, In S13, then, an L-level scan signal is sent from the output terminal Ym (m . O - 7). In S14, after a predetermined time (e.q.

100 to 200 microseconds( sec.)) passes, a timer, not shown, is turned on and the scan signal from the output terminal ym:,is stabilized. In 515, the outputted signal fromlYm is received in the input terminal Xn (n = 0 - 7) as the input signal.

In S16, it is examined whether the signal received at the input terminal Xn in S15 is at L-level or not, i.e., if the key corresponding to the terminals Ym and Xn has been operated. Zf it is determined to be Llevel ("ON" operation signal 21), the step goes to 517, while if it is at H-level ("OFF" operation signal 22), it goes to 637.

S17 through 636 is a routine taken to store the code data Kmn for the operated key (mm, nn) in the key buffer 30.

The code data Kmn for the operated key (mm, nn) is first read out of the code data table in the ROM 17. In S17, S23, S29, and S30, it is sequentially examined whether the read-out code data Xm.n is identical with the code data KCM1, KCM2, BND1 and BND2 stored in the memories of the first key code buffers 35a and 35b, and the second key code buffers 36a and 36b. Zn these steps, if it is determined that the read-out code data Xmn is not identical with the code deta KCM1, XCM2, BND1 or BND2, the processing goes to 531.

In S31, it is examined whether the value CNT1 of the Zmn counter 33 is CNT1 r O or not. If it is "YES", in the next S32, the code data Kmn for the operated key (mm, nn) is stored to the first key code buffer 35a as the code data KCM1. In the next 533, the value CNT1 of the Zmn counter 33 is set to CNT1 1 1, and then the processing goes to 561.

When two keys are operated almost at the same time, in S30 through 633, the value CNT1 of Zmn counter 33 is set to CNT1 = 1 as described above for the first- operated key. When, for the second operated key, an L-level signal is received by the input terminal Xn, and the processing goes to 534 by way of S16, S17, S23, S29-S31. In these steps, it is examined whether the value CNT2 of the Zmn counter 33 is CNT2 = 0 or not.

If it is "YES", in the next s35, the code data Kmn for the operated key (mm, nn) is stored to the first key code buffer 35b as the code data KCM2. In the next 836, the value CNT2 of the Zmn counter 33 is set to CNT2 = 1 and then the processing goes to S61. In case that three or more keys are operated almost at the same time, in 534, it is determined to be "No" with the key operated third or more sequence, and processing goes to S61.

When the same key is successlvely operated, the L- level signal is again received by the input terminal Xn. Since the code data Kmn for the key being operated is retained in the first key code buffer 35b or 35b as the code data XCMI or KCM2, in S17 or 523, it is determined to be "YES", In case that it is determined to be "YES" in S17, then processing goes to S18. In 618, it is examined whether the value CNT? of the Zmn counter 33 is CNT I 1 or not in accordance with the data in the Zmn counter pointer 34.If the result is "NO", i.e., the value of CNT1 is 2 # CNT1 4 or CNT1 i 0, processing goes to S20, while the value of CNT1 is CENTI = 1 (i.e., tho result is "YES"), processing goes to 519. In S19, the code data Xmn corresponding to the operated key (mm, nn) is written into the key code buffer 30, then processing goes to 621.

In 620, i.e., the value examined in 618 is 2 # CNT1 # 4 or CNT1 = O, it is examined whether the value CNTl of the Zmn counter 33 is 2 # CNT1 # 4 or not. If the result is "YES", processing goes to S21, then the value of the Zmn counter 33 is set CNT1 = 2, processing continuously goes toS6I. If the result is "NO" i.e., the value CNT1 of the Zmn counter 33 is CNT1 = 0, processing goes to 622 and the value CNT1 of the Zmn counter 33 is added by I, then processing continuously goes to S61.

In case that it is determined to be "YES" in 523, following processes basically similar to the routine from S17 through 622 takes place in 623 through 628.

It is determined to be "YES" in 523, processing goes to S24. In 524, it is examined whether the value CNT2 of the Zmn counter 33 is CNT2 r 1 or not in accordance with the data in the Zmn counter pointer 34.

If the result is "NO", i.e., the value of CNT2 is 2 # CNT2 # 4 or CNT2 = 0, processing goes to 526, while the value of CNT2 is CNT2 = 1 (i.e., the result is "YE8"), proce6sing goes to 525. In S25, the code data Kmn corresponding to the operated key (mm, nn) it written ito the key code buffer 30, then processing goes to 527.

In Sa6, i.e., the value examined in 524 is 2 # CNT2 # 4 or CNT2 = 0, it is examined whether the value CNT2 of Zmn counter 33 is 2 # CNT2 # 4 or not.

If the result is "YES", processing goes to S27, then the value of Zmn counter 33 is set CNT2 1 2, processing oontinuously goes to S61. If the result is "No" i.e., the value CNT2 of Zmn counter 33 is CNT2 a processing goes to S28 and the value CNT2 of the Zmn counter 33 is added by 1, then processing continuously goes to 561, In the meantime, when the key operation is now released, @t is determined to be "NO" in 616 and processing goes to S37. 637 through 560 are steps for writing "OFF" data into the key buffer 30 in place of the code data Kmn, while at the same time inhibiting a code data entry from the same key for a given period of time.In 637, it is examined that the code data Xmn corresponding to the operated key (mm, nn) is identical with the code data XCMl stored in the first key code buffer 35a. If it is determined to be "YES" in 537, processing goes to 538, while it is determined to be "NO", processing goes to 649.

Zn 538, it is examined whether the value CNT1 of the Zmn counter 33 is CNT1 1 1 or not. If the result is "YES", processing goes to S47 because no code data Kmn corresponding to the operated key is written into the key buffer 30. In S47, the value CNT1 of the Zmn counter 33 is set to CNT1 0, and processing further goes to 861, On the other hand, when the result is "NO", processing goes to 539. In S39, it is examined whether the value CNT1 of the Zmn counter 33 is CNT1 r 4 or not, i.e., the "OFF" data has been confirmed or not. If the result is "YES", processing goes to S40, in 640, the "OFF" data is written into the key buffer 30, In the next S41, the code data KCM1 stored in the first key code buffer 35a is cleared, then processing goes to 942. If the result examined in 939 is "NO", processing -goes to 548, in 548, the value CNT1 of the Zmn counter 33 is added by 1, processing further goes to to 961.

542 through 646 are steps for setting up the code data Kmn to inhibit it from being written into the key buffer 30 and its inhibiting period (for example; b0 milliseconds (msec.)).

In 842, it is examined whether the value BC1 of the key code counter 37a is Bcl B O or not. If the result is "YES", processing goes to S43 to store the code data Kmn in the second koy code buffer 36a as code data BND1. In the next S44, the value BC1 of the key code counter 37a is set to BC1 w 25, processing goes to 847. If the result examined in 842 is "NO", processing goes to S45, in S45, the code data Kmn is stored in the second key code buffer 36b as the code data BED2, In the next S46, the value BC2 of the key code counter 37b is set to BC2 = 25, in S47, the value CKT1 of the Zmn counter 33 is set to CNT1 = 0, and processing goes to 661.

On the other hand, if the result examined in S37 is "NO", processing goes to S49. ;49 through 860 routine is for the case where two keys are operated almost at the same time, and is basically the same ac the routine S37 through S48. In S49, it is examined that the code data Kmn corresponding to the operated key (mm, nn) is identical with the code data XCM2 stored in the first key code buffer 35b. If it is determined to be "YES" in S49, processing goes to 850, while it is determined to be "NO", processing goes to S61.

In 850, it is examined whether the value CNT2 of the Zrnn counter 33 is CNT2 # 1 or not. If the result is "YES", processing goes to S59 because no code data Kmn corresponding to the operated key is written into the key buffer 30. In E59, the value CNT2 of the Zmn counter 33 is set to CNT2 . O, and processing further goes to 661. On the other hand, when the result is "NO", processing goes to 651. In S51, it is examined whether the value CNT2 of the Zmn counter 33 is CNT2 . 4 or not, i.e., the "OFF" data has been confirmed or not.

If the result is "YES", processing goes to S52, in S52, the "OFF" data is written into the key buffer 30.

In the next S53, the code data Xcz.2 stored in the first key code buffer 35b is cleared, then processing goes to 654. If the result examined in 651 is "NO", processing goes to S60, in S60, the value CNT2 of the Zmn counter 33 is added by 1, processing further goes to 861.

Zn 854 it is examined whether the value BC1 of the key code counter 37a is BC1 O 0 or not. If the result is "YES", processing goes to S55 to store the code data Xmn in the second key code buffer 36a as the code data BND1. In the next S56, the value BC1 of the key code counter 37a is set to BC1 1 25, processing goes to 659.

If the result examined in 854 is "NO", processing goes to 857, in S57, the code data Kmn is stored in the second key code buffer 36b as the code data BND2. In the next 658, the value BC2 of the key code counter 37b is set to BC2 r 25, in S59, the value CNT1 of the Zmn counter 33 is set to CNT2 w O, and processing goes to S61.

In S61, the value n of the n counter 32 is added by 1. In the next S32, it is examined whether the value n of then counter 32 is n a 8 or not. If the result is "YES", processing goes to S63 to add 1 to the value m of the m counter, while result is "NO" processing returns to S13. The step returns to the main routine via S64 through S69.

Thus, processing goes to S65 via S61 through B63, it is examined in S64 whether the value BC1 of the key code counter 37a is BC1 = O or not. If the result is "YES", processing goes to 566 so that the code data BND1 stored in the second key code buffer 36a is cleared, while the result is "NO", processing goes to $65 where 1 is subtracted from the value BC1 of the key code counter 37, then processing goes to S67.

In 667, it is examined whether the value BC2 of the key code counter 37b is BC2 = 0 or not. If the result is "YES", processing goes to S69, so that the code data BND2 stored in the second key code buffer 36b is cleared, while the result is "NO", processing goes to 568 where 1 is subtracted from the value BC2 of the key code counter 37b, the returning to the main routine.

When the key (mm, nn) once stopped to operate is turned on again while at least one of key code counters is counting, the step goes to 629 or S30 by way of 816 - S 17 and S23 because the code data XCMl or XCM2 in the first key code buffer 35a or 35b that has retained the code data Kmn for the key is cleared. In 529 or 630, it is always determined "YES" because the same code data as the code data Kmn for the operated key (mm, nn) is written into the code data BOND1 or SEND2 of the second key code buffer 36a or 36b. The itep then goes to S61.

According to the data input device described above, once an "OFF" data for the operated key is written into the key buffer 30, the value BC1 or BC2 of the key code counter 37a or 37b is set to 25, so that, if the same key continues to be operated, writing into the key buffer 30 is inhibited for a predetermined length of time, i.e., 50 msec. until the counter value goes down to zero. This safely prevents a doubled entry of code data in error with the iame key due to mechanical vibrations in printing or similar cause.

If a key other than the last-operated key is turned on, a code data for a key other than the key that has been identified as "OFF" is stored in the first key code buffer. Skilled operators therefore do not have to slow down their typing speed to avoid double entry, with no danger of missing types.

The input device in this embodiment is an application to the electronic typewriter so that it may share the CPtJ 16, ROM 17 and RAM 18 in the control unit 100 with the control device of the electronic typewriter The configuration of the FPC board 5 and arrangement of the stroke keys in this embodiment is for an example and can be replaced with any suitable flexible printed circuit board, rigid circuit board and any suitable stroke-key or touch-key arrangement currently available.

The circuit matrix has not necessarily to be the one with 8 rows and 8 columns and can be replaced with.

any suitable matrix configuration in term. of the number and arrangement of keys.

While an L-level scan signal is given to the output terminals Ym for scanning every row by every column, an L level signal of 2 msec. width may instead be given to the output terminal Ym throughout scanning nO to n7 rows alternatively.

It is obvious that this arrangement can be applied to a input device with a three or more key rollover function by adding one or more key code buffers.

The input device is applicable not only to an electronic typewriter but also to an input device for any suitable electronic equipment with character keys and function keys including personal computers and word processors.

Claims (7)

1. An data input device comprising: plurality of keys to be operated for data entry; key scanning means for scanning said keys to detect ONIOFF operation thereof; first confirming means for confirming that a certain key is ON-operated for data entry, based upon the results of detection by said key scanning means; second confirming means for confirming that said certain key is OFF-operated after data entry, based upon the results of detection by said key scanning means; inhibit data memory means for saving data corresponding to said certain key for a predetermined period after OFF operation of the certain key has been confirmed by said second confirming means; and inhibit means for inhibiting the entry of the data which is the same as that saved in said inhibit data memory means,

2.The data input device according to claim 1 wherein ctid key scanning means includes a key matrix having electrical contacts or switches each corresponding to a said key and key scanning is executed by detecting whether said each electrical contact is closed or not.

3. 'The data input device according to claim 2 wherein said key canning is repeatedly executed at a interval of a predetermined time, wherein said first confirming mean oonfirms that the certain key is ON-operated if the electrical contact corresponding to said certain key is detected to be closed in a sequential predetermined number of key scanning, and wherein said second confirming means confirms that said certain key is OFF-operated if the electrical contact corresponding to said certain key is detected to be open in another sequential predetermined number of scanning after said certain key has been detected to be ON-operated by said first confirming means.

4. The data input device according to claim 3, wherein said predetermined time is 16 milliseconds (msec.), and wherein said predetermined number is 2, while said another predetermined number is 3.

5. The data input device accodirg to any preceding claim wherein said first and second confirming means and said inhibit data memory means are provided respectively in duplicate for allowing two sequential data entries, and wherein said inhibit means inhibits the entry of data which is same as that saved in said respective inhibit data memory means.

6. A data input device constructed and arranged substantially as hereinbefore described with reference to and as illustrated in the accompanying drawings.

7. Electronic equipment such as a typewriter, word processor or personal computer including a data input device according to any preceding claim.