GB2191879A - Integrated circuit device arrangement - Google Patents

Integrated circuit device arrangement Download PDF

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Publication number
GB2191879A
GB2191879A GB08611570A GB8611570A GB2191879A GB 2191879 A GB2191879 A GB 2191879A GB 08611570 A GB08611570 A GB 08611570A GB 8611570 A GB8611570 A GB 8611570A GB 2191879 A GB2191879 A GB 2191879A
Authority
GB
United Kingdom
Prior art keywords
arrangement
integrated circuit
banks
devices
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
GB08611570A
Other versions
GB8611570D0 (en
Inventor
Charles Clement Moir
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Computer Concepts Corp
Original Assignee
Computer Concepts Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Computer Concepts Corp filed Critical Computer Concepts Corp
Priority to GB08611570A priority Critical patent/GB2191879A/en
Publication of GB8611570D0 publication Critical patent/GB8611570D0/en
Publication of GB2191879A publication Critical patent/GB2191879A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227—Other objects, e.g. metallic pieces
    • H05K2201/10333—Individual female type metallic connector elements
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431—Details of mounted components
    • H05K2201/10507—Involving several components
    • H05K2201/10515—Stacked components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10689—Leaded Integrated Circuit [IC] package, e.g. dual-in-line [DIL]

Abstract

The arrangement comprises first and second devices (1, 2) mounted one over the other on a substrate (3) which provides coupling between the devices. The first device (1) stores a plurality of discrete banks of data, while the second device (2) is operable to switch the output of the first device between the banks of data. The second device preferably functions by programmable array logic. The use of such an arrangement can greatly extend a computer's capabilities without requiring extra space within the computer for mounting the arrangement. <IMAGE>

Description

SPECIFICATION Integrated circuit device arrangement This invention relates to an integrated circuit device arrangement.
Computer software is generally provided in the form of discs or tape cassettes, although it is also known to provide software in the form of read-only-memories (ROMs) constituted by integrated circuit devices of standard form.
Conventional ROM devices contains only 16K bytes of software, and this is often not enough storage for many programmes now available, which programmes therefore have to be spread over two or more ROM devices.
Available computers have a limited amount of space provided for the addition of extra ROM devices, for example the well-known BBC microcomputer provides space within its housing for only four extra ROMs, and thus the need to use two or more of these spaces for adding a single additional programme stored in two or more conventional ROM devices severly limits the possible extension of the computer's capabilities.
ROM devices are now available provide 128K bytes of storage, and which are thus able to store many of the now devised larger programmes, but known computers are not able to utilise such devices, having been designed for use with only conventional 16K byte storage devices.
According to this invention there is provided an integrated circuit device arrangement comprising a first device storing a plurality of discrete banks of data, and a second device coupled to the first device and operable to switch the output of the first device between said banks of data.
In the arrangement of this invention the first device stores a plurality of banks of data, each for example of 16K bytes, and thus simulates a plurality of conventional 16K byte devices, while the second device serves to read the banks in the first device as required, for example, for a programme stored therein.
Thus, to a computer in which the arrangement is used the first device appears as an conventional 16K byte device, the advantage being that this single device can provide any of a plurality of different outputs under the control of the second device.
Preferably the second device functions by programmable array logic.
The first and second devices can be mounted on a substrate, such as a printed circuit board, one over the other, for example with the first device mounted over the second device, this giving the advantage of a minimum usage of space for mounting of the arrangement.
Thus, the complete arrangement can be provided in the space normally occupied by a conventional 16K byte device thereby greatly increasing the additional programme capabilities of available computers.
This invention will now be described by way of example with reference to the drawing which is a diagrammatic perspective view of an arrangement according to the invention.
The arrangement comprises a first integrated circuit device 1 constituting a readonly-memory and storing a plurality of discrete banks of programme data, and a second integrated circuit device 2 providing programmable array logic. The devices 1 and 2 are mounted on a substrate 3 in the form of a printed circuit board, the first device 1 having pins 4 received in socket terminals 5 mounted in the board 3, and the second device 2 having pins 6 received directly in holes in the board 3.
The socket terminals 5 have legs 7 which extend through the board 3, and by which the arrangement can be mounted on a further substrate (not shown), for example on a circuit board in a microcomputer.
The board 3 has circuitry thereon providing coupling between the first and second devices 1 and 2 whereby in use the second device 2 can switch the output of the first device 1, available at the legs 7, between the various banks of programme data stored therein. The switching is carried out by reading operations and not in the more usual way by writing operations, and thus the arrangement can be completely self-contained without the need for any flying connections thereto.
The use of programmable array logic for the second device 2 enables this device to be relatively small in size whereby it can be mounted under the device 1 as shown, the device being programmed by the user to give the desired switching of the output of the first device 1.

Claims (7)

1. An integrated circuit device arrangement comprising a first device storing a plurality of descrete banks of data, and a second device coupled to the first device and operable to switch the output of the first device between said banks of data.
2. An arrangement as claimed in Claim 1, in which the first and second devices are mounted on a substrate which provides said coupling.
3. An arrangement as claimed in Claim 2, in which the first and second devices are mounted on the substrate one over the other.
4. An arrangement as claimed in any preceding claim, in which the first device is a read-only-memory.
5. An arrangement as claimed in any preceding claim, in which the second device functions by programmable array logic.
6. An integrated circuit device storing a plurality of discrete banks of data and having an output switchable between said banks.
7. An integrated circuit device arrangement substantially as hereinbefore described with reference to the drawing.
GB08611570A 1986-05-12 1986-05-12 Integrated circuit device arrangement Withdrawn GB2191879A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB08611570A GB2191879A (en) 1986-05-12 1986-05-12 Integrated circuit device arrangement

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB08611570A GB2191879A (en) 1986-05-12 1986-05-12 Integrated circuit device arrangement

Publications (2)

Publication Number Publication Date
GB8611570D0 GB8611570D0 (en) 1986-06-18
GB2191879A true GB2191879A (en) 1987-12-23

Family

ID=10597744

Family Applications (1)

Application Number Title Priority Date Filing Date
GB08611570A Withdrawn GB2191879A (en) 1986-05-12 1986-05-12 Integrated circuit device arrangement

Country Status (1)

Country Link
GB (1) GB2191879A (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4118773A (en) * 1977-04-01 1978-10-03 Honeywell Information Systems Inc. Microprogram memory bank addressing system
EP0018843A1 (en) * 1979-05-04 1980-11-12 Fujitsu Limited Semiconductor memory device with parallel output gating
EP0136416A2 (en) * 1983-08-10 1985-04-10 International Business Machines Corporation A computer system accommodating program cartridges
EP0170078A1 (en) * 1984-07-13 1986-02-05 Hoechst Aktiengesellschaft Support for lithograhic printing plates made from an aluminium alloy, and printing plate of this material
GB2170334A (en) * 1984-12-21 1986-07-30 Plessey Co Plc Control circuit
EP0193306A2 (en) * 1985-02-28 1986-09-03 Westinghouse Electric Corporation Solid state memory cartridge
GB2175716A (en) * 1985-05-28 1986-12-03 Mitel Corp Memory management system

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4118773A (en) * 1977-04-01 1978-10-03 Honeywell Information Systems Inc. Microprogram memory bank addressing system
EP0018843A1 (en) * 1979-05-04 1980-11-12 Fujitsu Limited Semiconductor memory device with parallel output gating
EP0136416A2 (en) * 1983-08-10 1985-04-10 International Business Machines Corporation A computer system accommodating program cartridges
EP0170078A1 (en) * 1984-07-13 1986-02-05 Hoechst Aktiengesellschaft Support for lithograhic printing plates made from an aluminium alloy, and printing plate of this material
GB2170334A (en) * 1984-12-21 1986-07-30 Plessey Co Plc Control circuit
EP0193306A2 (en) * 1985-02-28 1986-09-03 Westinghouse Electric Corporation Solid state memory cartridge
GB2175716A (en) * 1985-05-28 1986-12-03 Mitel Corp Memory management system

Also Published As

Publication number Publication date
GB8611570D0 (en) 1986-06-18

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Legal Events

Date Code Title Description
WAP Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1)