GB2190816A - Transmitting video timing signals - Google Patents

Abstract

By suspending a clock waveform B for a duration 12 or 19 greater than one clock period, timing signals e.g. line 10 or field synchronising pulses, associated with a digital video can be encoded on the clock waveform as characteristic perturbations allowing all timing signals to be sent in a single transmission space and reducing circuit complexity. The encoded timing signal may be decoded by isolating the perturbed clock waveform and then reconstituting the timing signal in response to the perturbations. <IMAGE>

Description

SPECIFICATION Transmitting video timing signals This invention relates to the transmission of video timing signals, for example video line and field information.

Current developments in large bandwidth broadcasting systems, such as high definition television (HDTV) using sampling frequencies which may exceed 70MHz, are placing increasing importance on the need to keep circuit complexity to a minimum.

Conventionally, video signals have periodic gaps due to signal blanking, which is necessary to allow for line and field flyback. Line and picture synchronisation information is inserted in the blanking interval, each as a separate entity. With a composite signal, mixed synchronisation pulses are added. With digital video signals, timing references have been inserted in the form of line codes or line-timing reference codes in the data stream.

There are applications in which it is not necessary or desirable to incorporate line and field information within the analogue or digital signal, or where blanking itself is undesirable.

Some bit-rate reduction techniques remove field blanking as part of the bit-rate reduction strategy, and some future imaging devices using, for example, CCD sensors may produce a continuous active signal without blanking intervals. In such systems there is no opportunity to insert reference signals into the signal data stream for synchronising any downstream signal processing.

Where blanking is necessary, it may be desirable to maintain the integrity of the sample values of a digital signal for subsequent processing. For example, this arises in a remote AOC in a camera head whose offset and gain are servoed from downstream digital measurements of reference levels inserted into the analogue waveform before the AOC during blanking. Alternatively the video data may be required to be examined by processing means during a blanking interval and after encoding in order for instance, to stabilise quantisation levels and/or digital feedback clamping levels and the like, such information is a further complication and under such conditions it is inappropriate to interrupt or modify the video data to accommodate the line and field synchronising pulses.

Thus, there exists a need to find alternative ways of sending timing signals, while at the same time, retaining system simplicity.

We have appreciated that an extremely elegant solution to both the problems of circuit simplicity and blanking unavailability can be achieved by using a video sampling clock waveform to carry timing signals associated with a digital video signal. The timing signals may be represented as characteristic perturbations of the clock signal, allowing all the timing signals to be sent in a single transmission space.

The present invention is defined in the accompanying claims to which reference is directed.

It has previously been considered that sample clock timing waveforms accompanying parallel digital video data streams are too crucial for the synchronisation of the video information to be tampered with. Furthermore phase noise caused by insertion of timing signals on the clock signal might affect the quality of sample. By modifying the clock signal after sampling the latter problem is avoided as the signal is sampled with a continuous low phase noise clock. After sampling, the clock signal is much less crucial provided that a continuous clock can be reconstituted at the decoder stage. So, after sampling, it is possible to interrupt the clock to include line and field information. However, it may also be possible to interrupt the clock before sampling, for example where housekeeping signals such as clock, line and field pulses are sent from equipment remote from the encoder.

We have, therefore, appreciated that the clock timing waveform need not be continuous as long as a continuous co-phased feed of the clock waveform can be regenerated in the receiving equipment for use thereby. Furthermore it is envisaged that a clock waveform passed from one piece of processing equipment downstream to another can be remodulated with fresh line and field references to reflect the processing delay in any intervening processing equipment.

The present invention obviates the need to send separate synchronising signals and makes it unnecessary to incorporate such signals in a digital video signal in the form of line codes or otherwise. Furthermore as all the timing signals are carried on the same clock, they are certain to arrive at the camera head at the same time, ensuring correct timing.

Such timing could not be relied on if a remote feed was used for each of the clock line and field synchronisation signals.

A specific embodiment of the invention will now be described by way of example with reference to the accompanying drawings, in which: Figure 1 is a diagram of timing waveforms associated with one embodiment of the present invention; Figure 2 is a schematic illustration of an encoder embodying one aspect of the present invention, and Figure 3 is a schematic illustration of a line and field pulse regenerator embodying a further aspect of the present invention for use in a decoder in conjunction with the encoder of Figure 2.

Referring to the timing diagram in Figure 1, a waveform A represents a conventional line pulse, occurring at 10, which denotes the start of a television line. The waveform A is encoded within a clock waveform B to produce a modified clock waveform C which includes interruptions 12 and 13 representing the line timing information in waveform A.

The first interruption 12 is caused by an interrupting pulse 15 of one clock period duration which maintains the waveform C at logic 'high' 14. As a result the waveform C is held at logic 'high' 14 for a total duration of one and a half clock periods 12. Similarly, the waveform C is then held, after dropping to a logic 'low' 18, for a clock period 16 one half clock period later. This also results in a total duration of one and a half clock periods 13 for which the waveform C is held at logic 'low' 18. The overall three clock period perturbation of the clock waveform B denotes a line pulse.

In principle either one of these interruptions would be sufficient to encode the line timing information but the second interruption 16 is used to ensure that no net direct current (d.c.) component is added to the signal. For applications such as video recording or fibre-optic transmission this may be more desirable than the resultant loss of one clock signal transition due to the extended overall interruption.

A field pulse is encoded within the clock waveform B, illustrated at D, in a similar way by holding the clock waveform at a logic 'high' 14 for two clock periods 19 resulting in an overall period of two and a half clock periods for which the clock waveform is at a logic 'high' 14. There follows a further two clock periods 20, after the clock waveform has been allowed to drop to a logic 'low' 18, during which the waveform B is held at a logic 'low' 18. This results in a two and a half clock period duration of a logic 'low' 18.

The overall five clock period perturbation of the clock waveform B denotes the field pulse in waveform D. Again, either of the two and a half clock period durations could be used to denote a field pulse but, for the reason above, each is used with its complement.

The use of one and a half clock periods as one half-cycle of the perturbation denoting the line pulse represents the minimum duration and thus the least perturbation possible to signify the pulses. Such signification of the pulses is not necessarily limited to these minimum durations, however.

By using the rising edge of the clock waveform as a reference for regeneration of the clock at the receiver, it is a relatively simple matter to encode such line and field signals by means of an encoder, as shown in Figure 2, which would be located, for example, at a camera control unit. In order to cope with the switching speeds involved in this circuit, '100 K' emitter-coupied logic components are used although it is envisaged that the same technique could be implemented using slower components, such as transistortransistor logic, in less demanding situations than HDTV.

Assuming the circuit to be encoding timing information signals for an interlaced standard System 1 television format, LIP 1 represents a pulse, one clock period long, at the start of each line and LP2 is a pulse, similar to LP1 but delayed by one half of a line period. LP1 is delayed by two clock periods in flipflops 22 and 24 and applied to OR gate 26 to produce the perturbation 12 in the clock waveform B and by two further flip flops 28 and 30 and applied to OR gate 32 to produce the perturbation 13 of the waveform C.

FP1 represents a one line period length pulse at the start of a first field of an interlaced raster associated with the video signal and FP2 a similar pulse to FP1 related to the start of the second field of the raster, e.g. line 313 in system I.

Perturbations 19 and 20, representing the field modulation of the clock waveform D are produced thus: FP1 is a one line period pulse during line 1 which enables LP1 in OR gate 34. This is delayed by flipflops 36 and 38 to produce the perturbation 19 in OR gate 26 and by flipflops 40, 42 and 44 to produce the perturbation 20 in OR gate 32. In the case of 2:1 interlaced scanning, FP2 is a one line period low pulse at the start of field 2 which enables LP2 half the way along a line in OR gate 46 and produces a field modulation as before.

Sequential 1:1 scanning would omit FP2 and LP2 and thus OR gate 46. Higher orders of interlace e.g. 4:1 require only additional line and field pulses suitably OR gated together to make the appropriate field modulation.

C in Figure 1 is LP1; LP2 is the stimulus for the field pulse on field 2. LP1 will be a one clock period negative going pulse representing the line timing reference suitably advanced in time to allow for encoding and decoding delays.

At a receiving end for the synchronising signals the encoded clock signal, after equalisation and buffering, is applied to one input of a phase frequency comparator whose other input is used as a reference being fed with a continuous clock signal locally generated by a voltage controlled oscillator (VCO). The phase and frequency of the VCO is stablised by a feedback signal from a phase-frequency detector (pfd) output. This clock has the same frequency as, and a fixed phase relationship with respect to the unperturbed transmitted clock waveform A of Figure 1.

Because of the above mentioned symmetry of the encoding line and field waveforms, there are only very small line and field frequency components in the pfd output. Phase and frequency perturbations in the recovered clock waveform due to these components can be further minimised by careful choice of the pfd output filter bandwidth.

Line and field pulses are decoded by sampling the incoming encoded clock waveform, after appropriate phase adjustment of the locally generated clock waveform to synchronise the two.

Differentiating between line and field pulses is straightforward enough using conventional pulse duration detection equipment. However, at the receiving end, it is usually necessary to generate locally a line pulse at the start of the first field of the raster as this would otherwise be masked by the field pulse occurring at the same point in time.

Regeneration of the obscured line signal may be carried out using the circuit of Figure 3 at the receiving end. A counter 48, clocked at the digital sample rate, counts the number of sampling points, or pixels, in a line from a first pixel (0) to a last pixel (N-1). The normally decoded line pulse is used both to clear the counter 48, and by means of a sampling register 49, sample a terminal count immediately prior to clearing the counter. By 'terminal count' is meant the pixel count immediately prior to clearing the counter 48 either from start-up or subsequent to the previous clear, i.e. N-1. After the final line of the second field (field 2) of a System I format the line pulse is masked by the field pulse generated to syncronise the fresh field which is about to start.

In this temporary absence of a decoded line pulse, i.e. the line pulse occurring at the start of field 1, a comparator 50 generates the additional line pulse by comparing the counter output (N- 1) with the previously sampled terminal count from the previous line, also N-1.

All components are again preferably of the '100 K' emitter coupled logic type for HDTV applications.

The counter 48 is reset either by a decoded line pulse or, in its absence (i.e. on field 1 line 1), by the recognition of a line pulse generated by the comparator 50. This compensates for the absence of a decoded line pulse of field 1. The field pulse only enables the decision to reset the counter on field 1. Start-up may require the first decoded field-pulse to initiate the counter thereafter it will always be in synchronisation with the line pulses.

An important factor is to ensure that the appropriate edges of the line and field perturbations are coincident in time on field 1.

In an interlaced scanning system the second field pulse is not co-timed with a line pulse; it is thus necessary to isolate the field 1 field pulse before using it to generate the missing line pulse. The counter is thus necessary in an interlaced scanning system but would be unnecessary for a sequential system where the field pulse is always co-timed with line pulse.

As a sample counter will often be required in such a digital television signal system, the sample counter information could be derived from this decoding thus reducing the complexity of the circuitry in Figure 3.

An advantage of the circuit in Figure 3 is that it operates in 'open-loop' and requires no previous knowledge of the number of sample periods between line pulses or between field pulses. This makes the present invention inherently adaptable to variations in the intervals between successive pulses as may be found, for example between different lines standards.

Claims (18)

1. A method of encoding timing signals associated with a digital video signal for transmission along a common channel, the method comprising the steps of: generating a basic clock video timing waveform; suspending the clock waveform for a duration greater than one clock period by means of at least a first characteristic perturbation, which perturbation is related to the occurrence of at least a first additional video timing signal; and transmitting the thus perturbed clock waveform as a composite timing signal portion of the video signal.

2. A method according to claim 1, wherein the clock video timing waveform is the sampling waveform and suspension of the waveform occurs after sampling of the signal.

3. A method as claimed in claim 1 or 2, wherein each perturbation corresponding to the additional video timing signal is characterised by its duration.

4. A method as claimed in claim 1, 2 or 3, wherein the perturbations of the clock waveform coincide with a rising or falling edge of the clock waveform.

5. A method as claimed in claim 1, 2, 3 or 4, wherein each perturbation is followed by a complementary perturbation which restores the overall level of the perturbed clock waveform to that of the clock video timing waveform.

6. A method as claimed in any of claims 1 to 5, wherein the first additional video timing signal is related to a line syncronisation pulse of the video signal.

7. A method as claimed in claim 6, wherein a second additional video timing signal is related to a field syncronisation pulse of the video signal, the second additional video timing signal being of a greater duration than the first additional video timing signal.

8. Apparatus for use in the method of claim 1, the apparatus comprising clock waveform generating means, means for suspending the clock waveform to thus encode at least a first characteristic perturbation therein which perturbation is related to the occurence of at least a first additional video timing signal and means for transmitting the thus perturbed clock waveform as a composite timing signal portion of the video signal.

9. A method of decoding video timing signals encoded into a video signal and transmitted along a common channel, the timing signals being encoded as characteristic perturbations of the basic clock video timing waveform, the perturbations being of a dura tion greater than one clock period, the decoding method comprising the steps of isolating the perturbed clock waveform, and substantially reconstituting the additional timing signal in response to the perturbations.

10. A method of decoding video timing signals according to claim 9 comprising the step of substantially reconstituting the basic clock video timing waveform.

11. A method as claimed in claim 9 or 10, wherein the perturbations in the perturbed clock waveform are detected by comparing the perturbed clock waveform with a locally generated clock waveform.

12. Apparatus for use on the method of claim 9 or 10, the apparatus comprising means for isolating the perturbed clock waveform and means for substantially reconstituting the additional timing signal in response to the perturbations.

13. Apparatus as claimed in claim 12, wherein generator means produces a locally generated clock waveform and comparator means compare the perturbed clock waveform with the locally generated clock waveform in order to detect the perturbations.

14. Apparatus according to claim 12 or 13 for use on the method of claim 10, comprising means for substantially reconstituting the basic clock video timing waveform.

15. An encoder for encoding timing signals associated with a digital video signal substantially as described herein with reference to Figures 1 and 2 of the drawings.

16. A decoder for decoding digital video timing signals substantially as described herein with reference to Figures 1 and 3 of the drawings.

17. A method of encoding timing signals associated with a digital video signal substantially as described herein with reference to Figures 1 and 2 of the drawings.

18. A method of decoding digital video timing signals substantially as described herein with reference to Figures 1 and 3 of the drawings.