GB2188517A - Spread-spectrum receivers - Google Patents

Spread-spectrum receivers Download PDF

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Publication number
GB2188517A
GB2188517A GB08607712A GB8607712A GB2188517A GB 2188517 A GB2188517 A GB 2188517A GB 08607712 A GB08607712 A GB 08607712A GB 8607712 A GB8607712 A GB 8607712A GB 2188517 A GB2188517 A GB 2188517A
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Prior art keywords
spread
signal
data
quadrature
phase
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Granted
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GB08607712A
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GB8607712D0 (en
GB2188517B (en
Inventor
Julian Richard Trinder
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Multitone Electronics PLC
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Multitone Electronics PLC
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Priority to GB8607712A priority Critical patent/GB2188517B/en
Publication of GB8607712D0 publication Critical patent/GB8607712D0/en
Publication of GB2188517A publication Critical patent/GB2188517A/en
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Publication of GB2188517B publication Critical patent/GB2188517B/en
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04BTRANSMISSION
    • H04B1/00Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/69Spread spectrum techniques
    • H04B1/707Spread spectrum techniques using direct sequence modulation

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

A spread-spectrum receiver is arranged to receive quadrature-phase shift-key (QPSK) signals for phase quadrature demodulation using mixers 32,33, a local oscillator 34 and by way of example a quarter wave 3dB coupler 35 to provide the phase quadrature relationship. The resulting in-phase and quadrature channels are then split and data demodulated by linear multipliers 38-43 also receiving code sequences CODE 0-CODE 2 for each channel and sigma-delta modulators 44-49 whose outputs provide weighted representations I0'-I2 and Q0'-Q2' of the data signals. As long as one in-phase data channel is carrying an unbalanced data signal I0 and its corresponding quadrature data channel is carrying a balanced data signal Q0, the digital output of the sigma-delta modulator 47 processing the balanced data signal can be used to control the local oscillator 34 via a loop integrator 56. Since the output of the sigma-delta modulator 47 is digital, this facilitates construction of the local oscillator control loop in integrated circuit form. <IMAGE>

Description

SPECIFICATION Spread-spectrum receivers The present invention relates to spread-spectrum receivers, and in particular to spread-spectrum receivers for receiving quadrature phase shift key (QPSK) signals.
There has been significant recent interest in the development of spread spectrum transmission/reception systems. A direct sequence spread spectrum system may be viewed as an overlay to a conventional radio communication system. The original narrowband radio signal is multiplied (modulated) by a deterministic digital code sequence to produce a wideband radio signal. The increase in bandwidth (spreading) results from the high-code-bit rate of the spreading sequence. The wideband signal may be simply de-spread at the receiver by multiplication with an identical code sequence to restore the narrowband radio signal for subsequent demodulation.
An alternative approach is to spread the narrowband baseband data signal prior to modulation by the radio carrier to produce a wideband baseband signal which is subsequently modulated onto a radio carrier. This is a radio overlay to a baseband spread spectrum system.
A significant advantage of spread systems is that multiple reception of a number of signals can be achieved by the use in a receiver of sets of codes having a low cross-correlation. Such sets of codes are termed orthogonal codes. Thus it is possible to achieve minimum interference between separate transmissions on the same carrier frequency and spread over the same frequency be selecting different codes from such an orthogonal set.
Further details of spread spectrum systems, their use and their implementation can be obtained from the appropriate literature, for example "Spread Spectrum Systems", R.C. Dixon, John Wiley & Sons, 1976.
In spread-spectrum QPSK transmission/reception systems, the same code sequence can be used to spread two different data signals to form respective wideband baseband signals. These wideband baseband signals are then modulated onto two corresponding radio carriers which are in phase quadrature. Upon reception, radio demodulation is effected through two carriers in phase quadrature and thus both widespread baseband signals can be separately recovered prior to data demodulation using the same code sequence. In a typical system, 2n data channels can be divided into n first channels and n second channels. The n first data channels are spread by n code sequences, and the n second data channels are spread by the same n code sequences.
The first channels are combined and modulated onto a first radio carrier and the second channels are combined and modulated onto a second radio carrier in quadrature to the first radio carrier. Upon reception, the first and second channels are recovered by phase quadrature demodulation, and the data signals are obtained by de-spreading using the n code sequences in each of the channels. Thus for a given number of code sequences, twice as many data channels may be transmitted and received.
It is important in a spread-spectrum QPSK receiver to control the local oscillator for demodulation precisely, in order to ensure accurate recovery of the data signals.
According to the invention there is provided a spread-spectrum receiver for receiving a QPSK signal, the receiver comprising: means for demodulating the OPSK signal synchronously to first and second baseband quadrature channels by respective multiplication with first and second carriers in quadrature which carriers are generated by a local oscillator; a first plurality of data demodulator circuits connected to the first baseband channel; and a second plurality of data demodulator circuits connected to the second baseband channel; wherein each of the data demodulator circuits includes means for despreading the signal on the respective baseband channel by multiplication with a respective code sequence to provide a de-spread analogue signal, and a sigma-delta modulator operable to convert the de-spread analogue signal to a digital signal; and wherein the local oscillator is controlled by the digital signal from the sigma-delta modulator in one of the data demodulator circuits.
An advantage of using the digital output of the sigma-delta modulator to control the local oscillator is that the control loop path, being digital, is readily implementable in integrated circuit form.
The invention will now be described, by way of illustrative and non-limiting example, with reference to the accompanying drawings, in which: Figure 1 is a circuit diagram of a spread-spectrum QPSK transmitter; Figure 2 is a circuit diagram of a spread-spectrum QPSK receiver according to an embodiment of the invention; Figure 3 is a circuit diagram showing parts of the Fig. 2 circuit in more detail; and Figures 4A and 4B are QPSK data-vector phasor diagrams showing the operation of the Fig. 2 circuit under conditions of zero phase-error and negative phase-error respectively.
Referring to Fig. 1, a spread-spectrum QPSK transmitter is shown in order to explain the nature of the signals to be received by the receiver according to the preferred embodiment of the invention. Data channels for transmission are divided into two groups, six data channels being shown by way of example and being divided into a first group 10 to 12 and a second group QO to 02. The data channels in each group are respectively spread by a three orthogonal fast code sequences CODE 0 to CODE 2. In other words the data channels Q0 and 10 are each spread by the code sequence CODE 0, the data channels Q1 and 11 are spread by the code sequence CODE 1, and the data channels Q2 and 12 are spread by the code sequence CODE 2.
The spreading is achieved by respective exclusive -OR gates 10 to 15, each gate receiving a data channel input and a code sequence input. The wideband signals appearing as outputs of the gates 10 to 15 are then summed in the two groups.
The outputs of the first group gates 10 to 12 are applied to a first summing circuit 16, and those of the second group gates 13 to 15 are applied to a second summing circuit 17. The summed output signals from the summing circuits 16, 17 are then filtered by respective lowpass filters 18, 19 which conveniently provide frequency shaping for the radio channel. The filtered signals are then quadriphase modulated by respective linear mixers 20, 21 which are also fed with quadriphase radio carriers from a carrier generator 22 and by way of example a quarter-wave 3dB coupler 23 giving 90" carrier phasing. The outputs of the mixers 20, 21 are summed in a summing circuit 24, amplified by an amplifier 25 and fed to an antenna 26 for radio transmission.The gains of both sides of the signal path (namely the summing circuit 16, the filter 18 and the mixer 20 on one side and the summing circuit 17, the filter 19 and the mixer 21 on the other side) should be carefully matched.
It will therefore be seen that the radio transmission comprises two groups of data channels, each group being spread by the same set of code sequences, and the two groups being modulated onto two corresponding radio carriers in phase quadrature.
Fig. 2 shows a spread-spectrum QPSK receiver according to an embodiment of the invention.
The transmitted radio signal (for example, as transmitted by the Fig. 1 circuit) is received and amplified by an antenna 30 and an amplifier 31. The amplified wideband radio signal is synchronously demodulated to a baseband pair of wideband quadrature channels by linear multiplication in mixers 32, 33 with local oscillator signals provided by a voltage controlled local oscillator 34 and by way of example a quarter wave 3dB coupler 35. The local oscillator 34 is tuned to the radio carrier frequency and is maintained in correct phase by a feedback signal which will be described below.
The quadrature baseband signals from the mixers 32, 33 are then low-pass filtered by respective low-pass filters 36, 37. It is convenient for channel equalisation to be applied at this stage. Each of the filtered baseband signal channels is than split into a number of paths, three being shown, for code injection resulting in de-spreading of the baseband signals. The code injection is accomplished by six linear multipliers 38 to 43, the three multipliers 38 to 40 forming one group and the three multipliers 41 to 43 forming another group. Code sequences CODE 0 to CODE 2 are applied respectively to the multipliers 38 to 40, and to the multipliers 41 to 43.
The narrowband (de-spread) signals appearing at the outputs of the multipliers 38 to 43 are converted into one-bit over-sampled digital streams by sigma-delta modulators 44 to 49, to be described in greater detail below.
The output of the sigma-delta modulator 47 is also fed back to a loop integrator 56 whose output controls the phase of the local oscillator 34.
Fig. 3 shows one of the stigma-delta modulators in greater detail. Specifically, the modulator 47 has been selected to show the feedback path to the loop integrator 56 and the oscillator 34.
The narrowband analogue signal from the multiplier 41 is applied to an input 60 of the sigmadelta modulator 47. The modulator 47 includes a comparator 61 having its inverting input connected to the input 60 via a resistor R3 and also to reference ground via a capacitor C2.
The non-inverting input is also connected to reference ground. The output of the comparator 61 is connected to a D-input of a latch 62 which receives a clock signal at its clock input from a sigma-delta clock 63. The Output of the latch 62 is fed back via a resistor R4 to the inverting input of the comparator 61. The Output of the latch 62 also provides the digital feedback signal on a line 64 to the loop integrator 56 and the oscillator 34 shown in Fig. 2.
The over-sampled one bit output of the latch 62 comprises a digitally-represented data-vector component Q0' of the original data signal (20, which may then be subject to further digital signal processing enhancement.
The other sigma-delta modulators will be similar to those shown in Fig. 3 except that there will be no feedback line 64; also the output of the latch circuit will be representative of the corresponding data signal.
In operation, the de-spread narrowband analogue signal is applied at the terminal 60 and the modulator 47 acts to convert the signal to a one-bit over-sampled digital stream. The over sampling ratio is determined by the rate of the sigma-delta clock 63 and the baud rate (and hence bandwidth) of the narrowband signal. The gain of the sigma-delta modulator 47 is determined by the ratio of the resistances R4/R3, and the time constant determined by the product of R4 and C2 effectively integrates the fast digital stream from the Q-output of the latch 62 to match the input analogue current via the resistor R3.
Referring back to Fig. 2, the receiver local oscillator 34 is controlled via the quadrature (Q) channel under CODE 0. Since the code sequences are mutually orthogonal, the local oscillator control system is unaffected by data transmission under CODE 1 and CODE 2. There are however constraints on the CODE 0 data channels. Data Q0 must be balanced, in other words exhibit no long-term bias, and data 10 must be unbalanced, in other words exhibit a definite long-term bias.
The result of these constraints on data under CODE O is illustrated in Figs. 4A and 4B. Here 10+ (the positive component of the data signal 10) is shown to be dominant over 10-- (the negative component of the data signal 10) by solid phase-vectors for 10+, and dotted phasevectors for 10-. Fig. 4A shows the condition of zero local-oscillator phase-error. Since 10+ is dominant, the feedback from the Q0 data channel is largely determined by the solid vectors in the righthand half of the phasor diagram. Fig. 4A shows that the components 00+ and 00cancel along the O-axis and therefore result in zero long-term feedback.Fig. 4B shows that when the local oscillator 34 has a phase error, the resultant component along the Q-axis does not cancel and causes a net current flow into the loop integrator 56 to restore the local oscillator 34 to zero phase error.
The dynamics of the control system may be analysed as those of a second-order phaselocked-loop.
loop bandwidth, damping factor,
where: Kv is the voltage controlled oscillator gain constant, and Ks0' is the effective phase detector constant.
K is the product of the phase-detector constant (K) for the Q-channel multiplier 33, the channel gain through the channel equalisation (g,), the de-spreading multiplier (g,) and the sigmadelta modulator (R4/R3) and a factor (g,) which represents the degree of imbalance in the data 10: 9d = 2p-1 where p is the probability of 10+.
Hence
If the data 10 becomes balanced (p=0.5) then K goes to zero and (t)n goes to zero, and the local oscillator 34 would free-run at a constant frequency.
The data 10 and 00 necessarily represent a disturbing influence in the loop, which could be modelled and compensated in subsequent DSP enhancement of the data-vector components. To minimise these effects, the loop bandwidth should be kept low in relation to channel data rates.
In a digital radio system that does not conveniently have an unbalanced data channel, an unbalanced 10 data channel could be artificially created by interleaving the true data with fixed level 'mark' symbols. This technique necessarily results in a reduction in true data-rate for the 10 channel. A one-to-one interleaving of balanced data and 'mark' would result in a probability p=0.75 and 9d=+0.5.
The technique of 'mark' interleaving can be taken to the limiting case where 10 is continuous 'mark', in other words p= 1.0 and 9d= + 1.0. Additionally the data 00 could be similarly interleaved with sections of dummy balanced reversals: 'mark-space', to improve the 00 statistics; alternatively, the QO X CODE 0 modulator could be omitted altogether in the transmitter. In this latter alternative case the configuration would reduce to a four data-channel system (11, 12, Q1, 02) having a reference carrier transmitted under the CODE 0. The data-rate/loop-bandwidth constraint is then removed.

Claims (5)

1. A spread-spectrum receiver for receiving a QPSK signal, the receiver comprising: means for demodulating the OPSK signal synchronously to first and second baseband quadrature channels by respective multiplication with first and second carriers in quadrature which carriers are generated by a local oscillator; a first plurality of data demodulator circuits connected to the first baseband channel; and a second plurality of data demodulator circuits connected to the second baseband channel; wherein each of the data demodulator circuits includes means for de-spreading the signal on the respective baseband channel by multiplication with a respective code sequence to provide a de-spread analogue signal, and a sigma-delta modulator operable to convert the de-spread analogue signal to a digital signal; and wherein the local oscillator is controlled by the digital signal from the sigma-delta modulator in one of the data demodulator circuits.
2. A spread-spectrum receiver according to claim 1, wherein the digital signal from the sigma-delta modulator is converted by a loop integrator to an analogue signal for controlling the local oscillator.
3. A spread-spectrum receiver according to claim 1 or claim 2, wherein the QPSK signal includes an unbalanced data signal spread by a particular code sequence and modulated by an in-phase radio carrier and a balanced data signal spread by the same particular code sequence and modulated by a phase-quadrature radio carrier, and wherein control for the local oscillator is derived from the sigma-delta modulator in the data demodulator circuit for the balanced data signal in the phase-quadrature channel.
4. A spread-spectrum receiver according to claim 1 or claim 2, wherein the QPSK signal includes a reference 'mark' signal spead by a particular code sequence and modulated by an inphase radio carrier, and wherein control the for local oscillator is derived from a sigma-delta modulator receiving a de-spread analogue signal from multiplication of the phase-quadrature channel by the particular code sequence.
5. A spread-spectrum receiver for receiving a OPSK signal, the receiver being substantially as hereinbefore described with reference to Figs. 2 and 3 of the accompanying drawings.
GB8607712A 1986-03-27 1986-03-27 Spread-spectrum receivers Expired GB2188517B (en)

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GB2188517A true GB2188517A (en) 1987-09-30
GB2188517B GB2188517B (en) 1989-11-22

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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2232022A (en) * 1989-05-26 1990-11-28 Marconi Gec Ltd Analogue-to-digital converter
EP0398981A1 (en) * 1988-01-28 1990-11-28 Motorola Inc Arrangement for a sigma delta converter for bandpass signals.
US5027120A (en) * 1989-05-26 1991-06-25 Gec-Marconi Limited Delta-sigma converter with bandpass filter for noise reduction in receivers
GB2240242A (en) * 1990-01-19 1991-07-24 Philips Electronic Associated Exponential multiplier
US5204875A (en) * 1991-07-09 1993-04-20 The United States Of America As Represented By The Secretary Of The Air Force 4-ary correlator, matched filter, and decoder for coherent, direct sequence, spread spectrum applications
US5305362A (en) * 1992-12-10 1994-04-19 Hewlett-Packard Company Spur reduction for multiple modulator based synthesis
GB2285561A (en) * 1994-01-05 1995-07-12 Samsung Electronics Co Ltd Receiver with sigma-delta analog-to-digital conversion for digital signals buried in TV signals
GB2314999A (en) * 1996-06-30 1998-01-14 Samsung Electronics Co Ltd Transceiver operating in time division full duplex spread spectrum communication
WO1999065154A1 (en) * 1998-06-12 1999-12-16 Telefonaktiebolaget Lm Ericsson (Publ) One-bit correlator rake receiver

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0398981A1 (en) * 1988-01-28 1990-11-28 Motorola Inc Arrangement for a sigma delta converter for bandpass signals.
EP0398981A4 (en) * 1988-01-28 1991-05-15 Motorola, Inc. Method and arrangement for a sigma delta converter for bandpass signals
GB2232022A (en) * 1989-05-26 1990-11-28 Marconi Gec Ltd Analogue-to-digital converter
US5027120A (en) * 1989-05-26 1991-06-25 Gec-Marconi Limited Delta-sigma converter with bandpass filter for noise reduction in receivers
GB2240242A (en) * 1990-01-19 1991-07-24 Philips Electronic Associated Exponential multiplier
US5204875A (en) * 1991-07-09 1993-04-20 The United States Of America As Represented By The Secretary Of The Air Force 4-ary correlator, matched filter, and decoder for coherent, direct sequence, spread spectrum applications
US5305362A (en) * 1992-12-10 1994-04-19 Hewlett-Packard Company Spur reduction for multiple modulator based synthesis
GB2285561A (en) * 1994-01-05 1995-07-12 Samsung Electronics Co Ltd Receiver with sigma-delta analog-to-digital conversion for digital signals buried in TV signals
GB2285561B (en) * 1994-01-05 1998-04-29 Samsung Electronics Co Ltd Receiver with sigma-delta analog-to-digital conversion for digital signals buried in tv signals
GB2314999A (en) * 1996-06-30 1998-01-14 Samsung Electronics Co Ltd Transceiver operating in time division full duplex spread spectrum communication
GB2314999B (en) * 1996-06-30 1998-08-19 Samsung Electronics Co Ltd Transceiver operating in time division full duplex spread spectrum communication
WO1999065154A1 (en) * 1998-06-12 1999-12-16 Telefonaktiebolaget Lm Ericsson (Publ) One-bit correlator rake receiver
US6370184B1 (en) 1998-06-12 2002-04-09 Telefonaktiebolaget Lm Ericsson (Publ) Correlator receiver

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Publication number Publication date
GB8607712D0 (en) 1986-10-01
GB2188517B (en) 1989-11-22

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Effective date: 20010327