GB2232022A - Analogue-to-digital converter - Google Patents

Abstract

Analogue signals at input i/p are converted to digital data at output o/p by means of a Sigma-Delta modulator comprising a pair of bandpass filters consisting of an inductor L and a capacitor C in parallel and a feedback loop by means of which pulses generated by current generator I1 are dependent on the output of comparator Q. A correction feedback loop is provided by means of which correction pulses from current generator I2 are fed to the intermediate filter in response to the comparator output. The tendency of the analogue-to-digital converter to instability and the crosstalk between quadrature components of the input i/p are reduced or eliminated by the correction feedback loop. Further corrections may be provided via the correction feedback loop (fig 3). <IMAGE>

Description

ANALOGUE TO DIGITAL CONVERTER This invention relates to analogue-to-digital converters.

The invention is particularly but not exclusively concerned with digital implementation of some of the stages of a radio receiver, and an aim is to achieve a high resolution output.

It is desirable to have the analogue-to-digital converter as near the front end of the receiver as possible to obtain the benefits of subsequent digital processing but as a practical matter the earliest this can be done is at an intermediate frequency (i.f.) stage. Typically this would be a frequency of 2.5MHz with a bandwidth of 100kHz.

The applicants have proposed to use a Sigma-Delta noise shaping analogue-to-digital converter (Figure 1) for this purpose. The converter includes a bandpass analogue filter H(s) which feeds a quantiser Q for converting the analogue signal X (s) to one of a discrete number of levels which are sampled by a sample C A digital-to-analogue converter is included in a feedback loop to an adder in which the analogue output strives to follow the input signal to the coder within the passband of the filter. Y(z) is the digital output.

The converter has a null in the quantisation noise at the i.f. of 2.5MHz (Figure 2). Also, the quantiser could be a single bit quantiser, i.e. a positive level or a negative level, since this is inherently linear in operation: if a quantiser with more than one bit was used, any deviation from nominal (linearly related) values would cause non-linearity in its operation.

The applicants considered implementing the above noise shaping circuit in sampled data form involving a sampling of the input signal before processing in the noise shaping circuit. Firstly, a digital noise shaping circuit was considered i.e. digital filter, quantiser and adder, and omitting the digital-to-analogue converter from the feedback path. However, while the advantages of a null in the quantisation noise and linearity are maintained, the i.f. signal must be digitised to be fed to the noise shaping coder, and the necessary analogue-to-digital converter would be multi-bit and therefore potentially non-linear.

Secondly, an analogue sampled data circuit was considered utilising a sampled data analogue filter, quantiser, digital-to-analogue converter and analogue adder. While this reduced the size and power consumption of the converter and avoided the need for a multi-bit A-D converter as in the digital implementation, distortions could still arise from the jitter on the input sample and hold circuit and distortions in the sampled data filter.

For this reason, the applicants decided to implement the coder in the analogue form described,which avoids sampling the signal until the point of the quantiser/ analogue to digital converter. However, i.f.

signals are complex and consist of I(in phase) and Q(quadrature) components, and it was discovered that cross-talk was inherent in the system in that it did not modulate the internal (i.f.) I and Q components entirely independently of each other, resulting in undesirable phase changes in the converted i.,f. signal. In the closed loop system described, this can result in degraded signal to noise performance and possible instability.

The invention provides an analogue-to-digital converter comprising bandpass filter means for filtering a signal derived from an analogue input signal, digitising means for producing samples at one of a discrete number of values corresponding to a signal derived from the output of the bandpass filter means, a feedback loop for feeding a signal derived from the output of the digitising means to the bandpass filter means, the circuit being arranged to produce in operation a minimum in the quantisation noise in the passband of the filter means, and a corrective feedback loop for feeding a signal derived from the output of the digitising means to the bandpass filter means to increase the extent to which the converter behaves in use at the sampling instants as if the in-phase and quadrature components of an analogue input signal are modulated independently of each other.

The corrective loop reduces or eliminates the instability problems referred to; it is possible to produce the impulse response of the digital converter which the applicants had considered implementing, i.e.

with no cross-talk between the components of a complex analogue input signal, but without the disadvantages that would have attended the use of the preliminary multi-bit analogue-to-digital converter.

The bandpass filter means may be in two stages, each stage of which may comprise an inductor in parallel with a capacitor, which may be fed with current and produce an output voltage signal.

The digitising means may include a comparator arranged to produce a positive or negative voltage output.

The corrective feedback loop may produce a correction pulse delayed by one sample period compared to the feedback pulse produced by the main feedback loop. The main feedback pulse and the correction feedback pulse may be produced by current generators controlled by the output of the digitising means.

Analdue-to-digital converters constructed in accordance with the invention will now be described by way of example with reference to the accompanying drawings, in which: Figure 3 is a diagram of the architecture of a first converter; Figure 4 is a diagram of a second converter with simplified architecture; Figure 5 is a circuit diagram of a practical realisation of the architecture shown in Figure 4; Figure 6 is a timing diagram for the circuit of Figure 5; and Figure 7 is the open loop impulse response of the bandpass filter means of the converter of Figure 5.

Throughout the drawings, like reference numerals have been given to like parts.

Referring to Figure 3, the first analogue-to-digital converter has an input i/p for analogue signals such as the i.f. of a HF communications receiver and the output o/p producing data in digitised form. The converter has analogue bandpass filter means in two stages Hl(s) and H2(s).

These are followed by a quantiser Q which converts the analogue signal into one of a number of discrete levels, the output of the quantiser being sampled at a sampling frequency of 10MHz, i.e. a sampling period of 100ns.

In accordance with the known Sigma-Delta design, the digitised data pulses are fed back to the input of the bandpass filter means by a main feedback loop, by a delay 1, a digital-to-analogue converter 2 and an adder 3. This produced a null in the quantisation noise of the form shown in Figure 2, at the i.f. of 2.5MHz.

However, when the applicants investigated such a circuit, they discovered that undesirable phase changes took place in the open loop condition and that instability was possible in a closed loop condition.

The i.f. signal consists of an I(in phase) and Q(quadrature) component. It was found that the digital output corresponding to the Q component was influenced by variations in the I component (and vice versa).

Naturally, the coder should modulate the sine and cosine components in the analogue signal entirely independently.

Referring to Figure 7, the open loop impulse response of the bandpass filter means is of the general form shown in the Figure. A necessary condition for independence in the modulation of the I and Q components is that the impulse response must be zero at the times t = T, 3T, 5T, etc., where T is the sampling period. This could be looked at in another way by appreciating that the original impulse centred on t=O contains only cosine components, and that the response of the filter must therefore contain only cosine terms and no sine terms.

This would indeed be the case for a digitally implemented filter.

The instability referred to arises because the response of the bandpass filter means does not exactly pass through 0 at times t=T, 3T, 5T. This is not because of limitations inherent in the components. At the first bandpass filter Hl(s), the impulse is centred on t=O, and is balanced about t=O. However, the second bandpass filter H2(s) receives a signal consisting basically of a combination of a rectangular pulse, and a cosine pulse commencing at t=O. This time, the pulse received by the bandpass filter H2(s) is unbalanced about time t=0, and sine components are therefore generated by H2(s).

In accordance with the invention, a correction feedback loop is provided to restore as far as possible the independence of the I and Q channels in the filter, i.e. to make the impulse response of the filter as far as possible the same as if the filters were digital.

Thus, the feedback loop contains a delay 4 and digital-to-analogue converters 5 to 7 feeding Adders 8 to 10. The main feedback data pulses travelling via the delay 1 are delayed one and a half periods relative to the data pulses at the output, and the correction data pulses are delayed by a further sample period.

Referring to Figure 4, it has been determined that performance very nearly the same as would be given by the architecture of Figure 3 would be given by the architecture shown in Figure 4. Here the corrective feedback loop is applied at the input of the second stage of the bandpass filter means only, although the level of the correction pulse may require to be different from that applied to the input of the second stage in the Figure 3 architecture.

The bandpass filter means in either architecture may comprise an inductor and a capacitor in parallel.

The quantiser may be a multi-bit quantiser, for example, two bits, i.e. two positive values and two negative values. Preferably, however, a one-bit quantiser is employed, i.e. a positive or a negative value. The use of a one-bit quantiser has the advantage that the digital-to-analogue converter will then be linear.

Referring now to Figures 5 and 6, a practical circuit for realising the architecture of Figure 4 will now be described.

The sampling period remains 100ns, the null in the quantisation noise remains at 2.5MHz (sampling frequency 10MHz). The correction pulse again appears after one sample period. One-bit quantisation is employed. The circuit is designed for i.f. signals at 2.5MHz with 100kHz bandwidth.

The input of the loop filters is a current signal and the output is a voltage signal. The main feedback pulse and the correction pulses are provided by current generators controlled by the data output of the converter. Consequently, current adders may be employed. Also, the input is split into two paths, an inverted path and a non-inverted path: this balances the system to enable the same current source to be used for positive and negative main and correction pulses.

In more detail, the converter is a second order Sigma-Delta modulator with one-bit output. It achieves high resolution within the passband of the loop filters by the use of over-sampling and feedback. The sampling rate is four times the centre frequency of the passband.

The loop filters are tuned at or close to the centre frequency.

The input signal is fed to an input buffer 11 having a non-inverting output and an inverting output.

The output impedance is very high, and the output signals are current rather than voltage signals to allow addition in the current adders 3a, 3b.

The loop filters Hl(s) and H2(s) each have an inductor (L) in parallel with a capacitor (C). The inductors are tapped and fed with current via pairs of resistors r1, r2, respectively. The output of the first stage is a voltage fed to a mid-stage buffer amplifier 12 with a high input and output impedance which serves to isolate the two loop filters from each other. The output of the buffer amplifier forms a current drive to adders 9a, 9b at the input of the second loop filter.

The output of the second loop filter is connected to a quantiser formed by a comparator with a low delay and low hysteris, which acts as a one-bit analogue-to-digital converter, i.e. two voltage levels.

The comparator output changes to the appropriate positive or negative voltage every rising clock pulse edge. D-type flip-flops 13, 14, 15, one of which is controlled by via inverter 16, control switches 17, 18 so that the main feedback date pulse for the current generator I1 is delayed by one and a half periods (C)and the correction data pulse from current generator I2 is delayed by two and a half periods (D), relative to an output pulse (A) from the comparator. The flip-flops 13, 15 transfer the input voltage from the D to the Q terminal on each rising clock edge, providing a one pulse period delay or, in the case of flip-flop 14, a half period delay because the first falling edge now becomes a rising edge.

The relation between a data output pulse at the output of the comparator and the corresponding main and correction feedback data pulses can be seen in Figure 6.

Because the current generators I1, I2 are fed by a delayed clock, the current pulses (E) and (F) are half the sampling period long i.e.50 nanoseconds and fall well within the period for which the data pulses are valid. Alternate sampling instants have been indicated as I and Q since the i.f. signal is complex and has in-phase and quadrature components.

The object of the correction pulses is for the open-loop impulse response of the bandpass filter means to be of the form shown in Figure 7, which it would be for an ideal digital filter, but at the sampling instants only. This means that if the circuit was notionally broken before the comparator Q, the combination of the main pulse and the correction pulse corresponding to an output data pulse at the output of the comparator should produce the signal shown in Figure 7 at the input of the comparator. To be more accurate, it is only necessary for the impulse response to correspond to the characteristics shown in Figure 7 at the sampling instants. Thus, at the sampling instant corresponding to the main pulse in Figure 6 and at the first sampling instant shown in Figure 7, the output should be 2V.At the next sampling instant, corresponding to the correction pulse, the output should be OV. At the next sampling instant, the output should be approximately -3V, at the next 0, at the next approximately 4V, and so on. The purpose of the correction pulse is to make the alternate outputs 0, thus making the converter independent between the I and Q channels passing through the bandpass filter means in the closed loop condition.

Suitable values for the components can be selected by trial and error to get the values of the impulse response at the sampling instants as in Figure 7, i.e.

the case for an ideal filter. However, it has been found that good results can be obtained by the following values; rl = 1830hums, r2 = 27.60has, C = 154pF, L = 34.2uH (with tappings quarter way, half way and three quarter way along), I1 = 2.7mA, 12 = l.OmA, and the differential voltage across the mid-stage buffer amplifier 12 being 731 x the current in the inverting and non-inverting outputs, which are equal in value and opposite in sign.

Of course, various modifications may be made without departing from the scope of the invention.

Thus, the main feedback pulses could be delayed by another even number of periods instead of 2, e.g. 4, 6 and the correction pulses could be delayed by another odd number of periods instead of 3. Equally, other high-Q filters could be used.

Claims (13)

1. An analogue-to-digital converter comprising bandpass filter means for filtering a signal derived from an analogue input signal, digitising means for producing samples at one of a discrete number of values corresponding to a signal derived from the output of the bandpass filter means, a feedback loop feeding a signal derived from the output of the digitising means to bandpass filter means, the circuit being arranged to produce a minimum in quantisation noise in the passband of the filter means, and a corrective feedback loop for feeding a signal derived from the output of the digitising means to the bandpass filter means to increase the extent to which the converter behaves in use at the sampling instants as if in-phase and quadrature components of an analogue input signal are modulated independently of each other.

2. Analogue-to-digital converter as claimed in claim 1, in which the bandpass filter means comprises -a first stage bandpass filter and a second stage bandpass filter.

3. Analogue-to-djgital converter as claimed in claim 2, in which the corrective loop feeds a signal derived from the output of the digitising means to the input of the second stage bandpass filter.

4. Analogue-to-digital converter as claimed in any one of claims 1 to 3, in which the bandpass filter means includes an inductor and capacitor in parallel.

5. Analogue-to-digital converter as claimed in claim 4, in which the input is formed by tapping on the inductor.

6. Analogue-to-digital converter as claimed in any one of claims 1 to 5, in which the input to the bandpass filter means is a current source and the output is the voltage.

7. Analogue-to-digital converter as claimed in any one of claims 1 to 6, including an input buffer for converting input analogue signals to a pair of signals, one of which is inverted compared to the other.

8. Analogue-to-digital converter as claimed in claim 7, in which the feedback loop includes a signal generator for generating a signal corresponding to a signal at the output of the digitising means, and the signal can be combined with either the non-inverting or inverting signal from the buffer.

9. Analogue-to-digital converter as claimed in any one of claims 1 to 8, in which the digitising means is a comparator, the output of which is either a positive signal or a negative signal depending on whether the input is above or below a threshold.

10. Analogue-to-digital converter as claimed in any one of claims 1 to 9, in which the converter forms a Sigma-Delta modulator.

11. Analogue-to-digital converter as claimed in any one of claims 1 to 10, in which the corrective feedback pulse signal is delayed compared to the feedback pulse signal by one sample period.

12. Analogue-to-digital converter as claimed in claim 11, in which the feedback pulse signal is delayed by an even number of pulse periods compared to the output of the digitising means.

13. Analogue-to-digital converter substantially as herein described with reference to the accompanying drawings.