GB2187595A - Protective device for integrated circuits - Google Patents

Protective device for integrated circuits Download PDF

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Publication number
GB2187595A
GB2187595A GB08621773A GB8621773A GB2187595A GB 2187595 A GB2187595 A GB 2187595A GB 08621773 A GB08621773 A GB 08621773A GB 8621773 A GB8621773 A GB 8621773A GB 2187595 A GB2187595 A GB 2187595A
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United Kingdom
Prior art keywords
diodes
protective device
diode
integrated circuit
terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB08621773A
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GB8621773D0 (en
GB2187595B (en
Inventor
Huw David Rees
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UK Secretary of State for Defence
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UK Secretary of State for Defence
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Publication date
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Publication of GB8621773D0 publication Critical patent/GB8621773D0/en
Publication of GB2187595A publication Critical patent/GB2187595A/en
Application granted granted Critical
Publication of GB2187595B publication Critical patent/GB2187595B/en
Expired legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861Diodes
    • H01L29/872Schottky diodes

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

A protective device 30 for an integrated circuit 32 comprises respective Schottky barrier diodes 10a to 10d connecting the integrated circuit bond pads 42 and 44 to each of its power rails 34 and 36. The diodes 10 are arranged to be reverse biased in normal operation. They have a total junction area of 3 x 10 <6>cm<2> together with an active semiconductor region doping level of 3 x 10<16>cm<-3>. A low impedance capacitor 38 is connected across the power rails 34 and 36. An overload voltage appearing at either bond pad 42 or 44 forward biases one or other of the diodes 10a to 10d. This creates a low impedance circuit via capacitor 38 capable of sinking large currents and limiting the overload voltage to below a damaging level. The diodes 10 have higher current capacity and voltage tolerance than comparable prior art diodes, and are characterised by lower forward and high reverse impedance combined with fast switching speed. <IMAGE>

Description

SPECIFICATION Protective device for integrated circuits This invention relates to a protective device for integrated circuits.
A semiconductor integrated circuit is susceptible to damage by excessive voltages applied between its terminals. The damage may be permanent; for example, a semiconductor junction may be physically damaged, an insulating oxide may fail or a metal line may be vaporised. The damage may alternatively be temporary, resulting in alteration of information held in the circuit.
The latter is particularly serious when information corruption is unrecognised, or when recovery from the corrupted condition is unlikely or slow. An important source of excessive voltage arises from collection of strong electromagnetic radiation by wires connected to terminals of the integrated circuit. These wires may act as antennas capturing the radiation, or they may be electrically coupled to other metal structures that so act. Coupling to radiation falls off at low frequencies where wavelengths are long compared to dimensions of relevant conductors. It also falls off at high frequencies where an antenna cross-section tends to vary as (frequency)-2. The degree of damage depends on the proximity of powerful radiation sources such as radio or radar transmitters. For practical purposes, the frequency range 1MHz to 1GHz is that most likely to cause integrated circuit damage.
It is known to employ diodes for the purposes of protecting scientific electronic devices. High gain amplifiers have been protected by antiparallel pairs of conventional bipolar diodes across their inputs. The input signal must be less than that necessary to switch on either diode, below which neither diode conducts appreciably. Diodes have also been employed to limit signals fed to microwave receivers. This protects the first semiconductor stage (mixer or amplifier) of a receiver.
It is desirable to provide a similar form of protection for integrated circuits. However, the problem is considerably more complex than that of protecting a simple electronic component because the overloading signal can appear between any of the input or output connections.
Furthermore, a protective circuit should present as low an admittance as possible under normal (non-overload) conditions to minimise interference with integrated circuit operation.
It is an object of the invention to provide a protective device for an integrated circuit, the device having high overload suppression capacity combined with insignificant effect on integrated circuit operation.
The present invention provides a protective device for an integrated circuit, the device including: (1) two DC power rails connected together via a low impedance, (2) a terminal, and (3) at least one respective majority carrier diode structure connected between each power rail and the terminal for reverse bias in normal operation, the diode structure having a total active junction area in the range 10 6cm2 to 10 5cm2 and an active semiconducting region average doping level less than 10'7cm 3.
For the purposes of this specification, the expression "diode structure shall be interpreted to mean a single diode or a number of diodes in parallel.
In use the terminal of the protective device of the invention is connected to an integrated circuit bond pad to be protected. Overload voltages of either polarity appearing at the terminal and potentially harmful to the integrated circuit forward bias one or other diode structure and are prevented from reaching damaging levels. Majority carrier diodes exhibit some of the features desirable for protection purposes, these being fast switching between non-conducting and conducting states, high reverse bias impedance, low capacitance and low series resistance when forward biased. Diodes of this type are conventionally used as microwave mixers. A typical mixer diode has a series resistance of about 10 ohms, and would be damaged by a current exceeding 100mA.These values are inadequate for practical overload protection purposes, which require a series resistance below 1 ohm and tolerance to currents above 1 Amp. By increasing the total junction area of the diode to between 10-6 to 10-5 cm2, ie 10 to 100 times that of a typical mixer diode, the necessary low series resistance and forward current tolerance can be obtained. A practically useful degree of circuit protection can accordingly be provided by diodes of this kind arranged in an appropriate circuit configuration with the relevant integrated circuit.
In a preferred embodiment, the invention includes a plurality of terminals each with two associated diode structures arranged to be reverse biased by the power rails under normal circumstances. Each terminal is arranged for connection to a respective integrated circuit bond pad. The diode structures may be a Schottky barrier diodes integrated on a common substrate, each diode having interdigitated electrical contacts. The diodes may be of silicon or gallium arsenide.
The diode structures may be integrated on a substrate common to the integrated circuit they protect, and may share with it common power rails; the diode structures and associated terminals may alternatively be formed separately for subsequent use with an otherwise unprotected integrated circuit.
To provide protection against power rail voltage increase or polarity reversal, the power rails may be connected together via a single reverse-biased diode structure in parallel with a series arrangement of forward-biased diode structures arranged in combination to carry low forward current from the rails.
In order that the invention might be more fully understood, embodiments thereof will now be described, by way of example only, with reference to the accompanying drawings, in which: Figures 1 and 2 show respectively schematic sectional and plan views (not to scale) of a diode structure for use in a protective device of the invention; and Figures 3, 4 and 5 are schematic circuit diagrams of protective devices of the invention.
Referring to Figs. 1 and 2, there are shown a sectional side view and a plan view respectively of a diode structure 10 suitable for protecting an integrated circuit. The diode structure 10 is designed to operate in the frequency range 1MHz to 1GHz. It comprises a p-type silicon substrate 12 having an n+ region 14 formed therein. The region 14 is produced by ion implantation of a donor impurity such as As or Sb with subsequent heat treatment. An n-type layer 16 of epitaxial silicon is grown over parts of the region 14 and substrate 12. The layer 16 is one micron thick and has an average donor density of 3x10l6cm-3. An n+ region 18 is arranged over part of the n+ region 14, and is formed by ion implantation and heat treatment of part of the layer 16. Regions 20 of insulating oxide (SiO2) define therebetween areas for application of metal contacts 22 and 24.Contact 22 to n region 18 is ohmic, whereas contact 24 forms a Schottky barrier diode at its interface 26 which n-type layer 16. For forward conduction through the diode 10, contact 24 is biased positive. The interface or Schottky barrier 26 has an area of 3x 10 6cm2.
The contacts 22 and 24 are interdigitated as shown in Fig. 2 in order to achieve the required Schottky barrier junction area and produce a low diode series resistance. Moreover, the diode 10 has a low capacitance and a rapid switching speed between conducting and non-conducting states. In normal operation, the pn' junction between the substrate 12 and ion-implanted region 14 is reverse-biased and therefore has high resistance. This enables the substrate 12 to bear a number of different diodes of the same construction which are electrically isolated from one another.
Referring now to Fig. 3, there is shown a protective device or circuit 30 of the invention. The circuit 30 includes diodes 10 of Fig. 1 arranged for the purposes of protecting an integrated circuit 32. The integrated circuit 32 may conveniently be formed on the substrate 12. The circuit 30 comprises four diodes 10a to 10d connected in two series pairs 10a/10b and 10c/10d between positive and negative DC power supply rails 34 and 36. The diodes 10a to 10d are formed on a common substrate (not shown). A low impedance capacitor 38 is connected across the rails 34 and 36. The diode pairs 10a/10b, 10c/10d are connected in series at 40 and 42, to which bond pads 44 and 46 provide input connections to integrated circuit 32 requiring protection.The power rails 34 and 36 may conveniently but not necessarily be those of the circuit 32 as indicated by dotted connections 48. Lines 50 and 52 from the points 40 and 42 connect the bond pads 44 and 46 to the integrated circuit 32.
The arrangement of Figs. 1 to 3 operates as follows. When the integrated circuit 32 is operating normally, the signals at the bond pads 44 and 46 are at levels between those of the power rails 34 and 36. The diodes 10a to 10d are accordingly reverse biased and have high impedances. Their effect on normal circuit operation is thus insignificant. Under overload conditions, the voltage on bond pad 44 or 46 becomes greater than that of a power rail 34 or 36.
This may occur from the collection of electromagnetic radiation by wires (not shown) connected via bond pads 44 and 46 to the integrated circuit 32 and acting as antennas. Alternatively, such wires may electrically coupled to other metal structures which act as antennas. When such an overload occurs, the voltage at 40 or 42 becomes more positive or more negative than power rail 34 or 36 respectively, in which case one or other of the diodes 10a to 10d becomes forward biased. A low impedance circuit is then created via the capacitor 38, which may either be a discrete device or represent the capacitance of a power supply connected to the rails 34 and 36. This circuit is capable of sinking large currents because of the construction and form of each of the diodes 10a to 10d. The overload voltage at the lines 50 and 52 is accordingly inhibited from reaching a level which will damage the integrated circuit 32.
The Schottky barrier diode 10 is a member of a class of devices referred to as majority carrier diodes. Conduction is by majority carriers, ie by electrons or holes, but not by both as in bipolar diodes. Majority carrier diodes include the planar doped (triangular) barrier diode and the socalled camel diode. These are all characterised by fast switching speed, very high reverse bias impedance, low capacitance and low series resistance. Schottky barrier diodes are known for use in high frequency mixer applications, but these have a junction area is typically in the range 1 to 3 x 1 0-7cm2. For the purposes of the invention, a total junction area of at least 10-6cm2 is required to achieve a sufficiently low series resistance of less than 1 ohm.This may be achieved by interdigitated diode contacts as previously described or by the use of a number of diodes in parallel. The maximum junction area required is 10-5cm2.
The diode 10 is similar to a Schottky barrier microwave mixer diode, although of larger total junction area as has been said. Moreover, it has lower doping of the active semiconducting layer 16 to ensure that the reverse breakdown voltage of the diode exceeds the normal voltage between the rails 34 and 36, ie the power supply voltage.
The donor density will accordingly be less than 1017cm3, and will typically lie in the range 1016 to 1017cm3 This range is also appropriate for the acceptor concentration of a diode operating by transport of holes. Such low doping levels have been found to enable the diode 10 to withstand reverse voltages at least equal to that between power rails 34 and 36, typically 10 volts. This reverse voltage is higher than that which conventional microwave diodes will tolerate.
The construction of the diode 10 has been described in terms of silicon bipolar technology, the diode being suitable for integration on the same substrate as the integrated circuit it and others protect. Other silicon and gallium arsenide technologies may also be employed, the foregoing parameters of junction area and doping level of the active semiconductor region (layer 16) being appropriate for both. The other technologies are: (1) MOS silicon on a silicon substrate; (2) MOS silicon on a sapphire substrate; (3) GaAs FET on a semi-insulating substrate; and (4) GaAs bipolar on a semi-insulating substrate.
It may be necessary or desirable in some circumstances to employ protective diodes with reverse breakdown voltages less that that on a power rail. Single diodes such as 10a to 10d may then each be replaced by two or more diodes in series.
For mass production purposes it is necessary to standardise integrated circuit design. Some IC applications may require all terminals protected, others only selected terminals or even none.
Under these circumstances, ICs may be designed with protective diodes connected to all terminals and in series with fusible links. Fusing one or more links then selectively disconnects any unwanted diode. The fusible links are designed to break at currents exceeding the maximum under overload conditions, and their cross-sections are chosen accordingly.
Referring now to Fig. 4, an integrated circuit (not shown) may be provided with additional overload protection as shown. Positive and negative integrated circuit power rails 62 and 64 have connected across them a forward-biased series chain of diodes 66 and a reverse-biased single diode 68. The diode 68 conducts strongly if the power supply rail voltages become reversed in polarity. The diode chain 66 is arranged to be insufficiently forward biased to conduct a significant current in normal IC operation, but conducts strongly under power surge conditions increasing the rail voltages.
In normal circumstances, each diode in the chain 66 should conduct about 0.1 my. A voltage increase will produce an exponential increase in accordance with the diode current/voltage characteristic: J=J0(eCV!kT 1) where J is current density, J0 is a constant, V is diode voltage, and e, k and T are the electronic charge, Boltzman's constant and absolute temperature respectively. To obtain a sharp increase of current with voltage, the number of diodes in the chain 66 should be low. This favours the use of diodes with a large barrier height, which can be obtained by appropriate choice of Schottky barrier contact metal. Alternatively, in an n-type majority carrier diode, acceptor impurities may be incorporated in the depletion region.
Referring now to Fig. 5, there is schematically shown an integrated circuit 70 for protecting another integrated circuit 72. The circuit 70 comprises a pair of bond pads 74a and 76a connected both together and via protective diodes 78a and 80a to power rails 82 and 84. This arrangement is connected in parallel with a similar arrangement of pads 74b/76b and diodes 78b/80b. A low impedance capacitor 86 is connected across the power rails 82 and 84. The diodes 78 and 80 are formed on a common substrate (not shown).
Signals to be processed by the IC 72 are fed to it via bond pads 74a/76a and 74b/76b and leads 88a and 88b. The leads 88a and 88b are arranged so that they do not collect electromagnetic radiation to any potentially undesirable degree. They are short and are located in an environment where electromagnetic radiation is weak. The protective IC 70 operates as described earlier with reference to Fig. 3. Overload signals appearing at bond pads 74a/74b result in diode conduction, which protects the IC 72. In this way protection is provided for an IC which lacks its own protective diodes.
The protective device of the invention is particularly suitable for IC protection because of its very high switching speed. A typical time constant for a majority carrier diode is in the order of 10-" sec. This compares with 10-7 to 10-9 sec for a PIN diode, and conventional bipolar diodes have still longer time constants. Furthermore, as has been described, majority carrier diodes may be implemented in planar technologies compatible with IC construction. PIN diodes are not available in planar form and are consequently not compatible with IC planar technology.

Claims (7)

1. A protective device for an integrated circuit, the device including: (1) two DC power rails connected together via a low impedance, (2) a terminal, and (3) at least one respective majority carrier diode structure connected between each power rail and the terminal for reverse bias in normal operation, the diode structure having a total active junction area in the range 10-6cm2 to 10-5cm2 and an active semiconducting region average doping level less than 10'7cm-3.
2. A protective device according to Claim 1 including at least one additional terminal with equivalent diode structures and like connections.
3. A protective device according to Claim 1 or 2 in which the diode structures are Schottky barrier diodes with interdigital electrical contracts.
4. A protective device according to Claim 1, 2 or 3 wherein the diode structures are formed on a single substrate in common with an integrated circuit having a bond pad connected to the terminal.
5. A protective device according to any preceding claim wherein the power rails are connected together via a single reverse biased diode structure in parallel with a series arrangement of forward biassed diode structures arranged in combination to carry low forward current from the rails.
6. A protective device substantially as herein described with reference to the accompanying Figs. 1, 2 and 3 or 5.
7. A protective device substantially as herein described with reference to the accompanying Figs. 1, 2, 4 and 3 or 5.
GB08621773A 1985-09-17 1986-09-10 Protective device for integrated circuits Expired GB2187595B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB858522971A GB8522971D0 (en) 1985-09-17 1985-09-17 Protective device for integrated circuits

Publications (3)

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GB8621773D0 GB8621773D0 (en) 1986-10-15
GB2187595A true GB2187595A (en) 1987-09-09
GB2187595B GB2187595B (en) 1988-11-09

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GB08621773A Expired GB2187595B (en) 1985-09-17 1986-09-10 Protective device for integrated circuits

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5341114A (en) * 1990-11-02 1994-08-23 Ail Systems, Inc. Integrated limiter and amplifying devices
GB2388259A (en) * 2002-04-30 2003-11-05 Zarlink Semiconductor Inc Compact high voltage ESD protection device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5341114A (en) * 1990-11-02 1994-08-23 Ail Systems, Inc. Integrated limiter and amplifying devices
GB2284503A (en) * 1990-11-02 1995-06-07 Ail Systems Inc Integrated limiter and amplifying devices
US5445985A (en) * 1990-11-02 1995-08-29 Ail Systems, Inc. Method of forming integrated limiter and amplifying devices
GB2284503B (en) * 1990-11-02 1995-10-25 Ail Systems Inc Integrated limiter and amplifying devices
GB2388259A (en) * 2002-04-30 2003-11-05 Zarlink Semiconductor Inc Compact high voltage ESD protection device
GB2388259B (en) * 2002-04-30 2006-03-29 Zarlink Semiconductor Inc Compact high voltage ESD protection diode

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Publication number Publication date
GB8522971D0 (en) 1985-10-23
GB8621773D0 (en) 1986-10-15
GB2187595B (en) 1988-11-09

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PCNP Patent ceased through non-payment of renewal fee