GB2183420A - Television waveform monitoring arrangement - Google Patents

Abstract

A television waveform monitoring system processes a video signal being applied to a CRT display to derive video and/or vector waveform signals, which are combined with the video signal before application to the CRT so that the video and/or vector waveforms are displayed on the same screen as the picture itself. The video and vector waveforms may be displayed at the same time at different positions of the screen (Figure 6). A video waveform generated by DC restorer 1 and a vector display from colour demodulator 2 are addressed into memory 17 and superimposed on the video image signals at 6. <IMAGE>

Description

SPECIFICATION Television waveform monitoring arrangement This invention relates to a system for displaying video and/orvectorwaveforms.

Television waveform monitors are widely used withinthetelevision industryto provide more information aboutthe video signal than is available by observing the picture displayed on the screen. Such waveform monitors also allow technical appraisal and adjustment of the performance of the video system by analysing test signals applied to thesys- tems. However hitherto the waveform monitors have been separatefromthe picture monitor,thus requiring separate C.R.T.'s and requiring the observerto move his eyes between the different screens in order to compare and appraise the picture and waveforms.

In accordance with the present invention, there is provided a television waveform monitoring system, serving to displayvideo and/orvectorwaveforms on the same C.R.T. asthe picture itself.

Conveniently, the system may comprise a televi sion field store with meansforwriting video and vec- torwaveformsintothisstoreinthesame manneras a conventional C.R.T. display is scanned. Means are also provided for reading the waveforms out from the store atan appropriatetiming to produce sep arate video and vector displays which are then applied to the television signal, which then serves to dis playona single monitorscreen both the pictureand the corresponding waveforms. Preferably the video and vector waveforms are "burnt" into the television signal (i.e. the picture itself is blacked out at the locations of the waveform displays). Preferably the system serves to display graticules to enable meas urements on the waveforms to be made.

The video and vector waveforms may be displayed at the same time, preferably at different positions and for example adjacentthe bottom of the screen and adjacent opposite sides. Preferably the waveform displays and the graticules are coloured differently. Facility may be incorporated into the system for varying the size of the waveform displays.

In a further development, the system may be used in conjunction with a portable television camera and serve to display either the video orvectorwaveform (upon selection) in the viewfinder of the camera.

An embodimentofthe present invention will now be described by way of examples only and with reference to the accompanying drawings, in which: Figure 1 is an overall block diagram of a television waveform monitoring system in accordance with this invention; Figures2to 5togetherform a more detailed circuit diagram ofthesystem; and Figure 6 is a front view of a picture monitor showing the video and vectorwaveforms displayed together with the picture itself.

Referring to Figure 1, a conventional 75 ohm input video signal VIDEO IN is applied to a DC restorer 1 for providingthevideowaveform andtoacolourdemo- dulator2fordecoding into the U andVvectors.

These signals are sampled sequentially by an analog-to-digital converter (ADC) 3 via a switch 4: the sequence is shifted line-by-line to mask missing samples. The A.D.C. sampling clock is phase-shifted to interleave samples line-by-line, to reduce the effective sample spacing from 200 nS to 1 nS when in horizontal modes. The system further comprises a memory M,the memory address being U andVfor the vector display and video and timebase counter for video display. The memory has alternate read and write fields, with each field split into fourS mS bands,to showthe relative brightness ofline rate signals.The memory is readouttoproducetwodis- plays VIDEO and VECTOR as shown in Figure 6, adjacent the bottom and opposite sides ofthe monitor screen: the data read out from the memory M is converted to analog at 5, and combined with data defining the graticulefrom an EPROM store MG and gated into the inputvideo at 6to providethe signal VIDEO OUTto be applied to the monitor.

Referring to Figure 2 to showthe system in more detail, the input video is amplified x2 at7 before being fed to the various circuits. A CMOS switch SW1 switches the output between input video and the display signal superimposed on video black level at 9. A sampler8 serves to sample and hold on thevideo back porch. A conventional sync separator 10 feeds outdo the logic section and also to a burst gate former 11 which forms the clamp pulse forthe sam pler and D.C. restorer 1 and is also the burstgatefor the colour demodulator 2.

The video signal is split into two paths,thevideo path is applied to a switchable 1MHz low pass filter 12 before going to the D.C. restorer 1. This is of the feedback type, there the black level of the output is compared with a shift pot and the resulting error signal used to offset the input voltage. This has the advantage of not corrupting the back porch ofthe waveform and allows any hum or L.F. tiltto be shown on the display.

The chroma path is applied to a 2-pole chroma bandpassfilter 13 and then to a conventional colour demodulator 2 comprising a TBA540 reference chip and TBA990 demodulator, modified to disable the P.A.L. switch so that a true vector display is produced. The reference signal is applied via a 4-pole L.C.

delay line 14wherethe C elements arevaricap dio- des. By varying the D.C. to these diodes the delay of the line varies, hence providing phase rotation of the vector display. The U and V outputsfrom the demo- dulator2passthrough 1 .3MHz low pass filters 1 5 to remove subcarrierfrom them. The V waveform passes additionally through a 200nS delay line 16 because the A.D.C. samples U first and this allows the waveforms to be sampled together.

A CMOS switch SW2 selects the signal fed out and applies itto the A.D.C.3. The switch SW2 is driven in such a way as to give 6 samples of video, then chroma U, then chroma V. Each sample has a duration of 200nS so a fast switch is needed, such as a CD4066.

Figure 3 shows circuits for the generation of the various addressed needed by the memory. Video from Figure 2 is applied to a Ferranti ZN441 6 Bit Flash A.D.C.3. The necessary reference is derived from a 1.26 volt bandgap reference circuit 17. The A.D.C. output forms the vertical video, chroma V and chroma U write addresses via a latch 18 which allowstheA.D.C. outputto be stored, asthefollow- ing 3 state inverters have no storage. The horizontal write address is derived from a 20MHz crystal oscilla tor 19, which is subject to a variable phaseshiftand divided by 2 at 20 before being fed to thetimebase divider.This is needed as in horizontal display modes the video is only sampled every200nS and hence will not completely samplethewaveform. By phase shifting the sampling by + 50nS and alternating the A.D.C. phase by + 1800 on a line-by-line basis, over a whole field the video will be sampled every 1/2nS in effect.

Afront panel timebase switch 21 controlswhich divider-output clocks the horizontal write counter 23.

These are 10MHzforHMAG,2MHzforH, lMHzfor 2H, 1 60KHzforVMAG and 6.4KHzforV (to display 1/5thofaline,1 line,2lines,1/25thofafield,ora whole field respectively).

On the read address side, a 15MHz oscillator 24 is locked by comparison of incoming line syncswith 15MHz t 960 from the read counter 25, which also phases up the counter output. The vertical read counter 26 is clocked at line rate but reset on line 64 from a line delay counter 27.This allows the read counter 26to derive gating signals forthe output box positions, giving output on lines 192 to 256 and erasure on lines 256to320. Line 320 is possible in a 3121/2 line frame by delaying the frame start by 8 lines, see 8 line delay counter28. This also allows the wholefield syncgroupto be displayed in VMAG.To synchronise the field 1/field 2 selector, line sync is gatedwithfieldsyncto presetthedivider29.

The video/chroma timing counter 30 is clocked at 5MHz and is organised to provide six video samples, then chroma U,then chroma V (repeating). The control is provided by enabling the appropriate addre ssestothe memory.

In orderto mask holes left were samples are missed, the above sequence is advanced line-byline, by loading the counterwith the 8 line delay counter on each linesync.

To provide horizontal shift of the video waveform, the horizontal write counter 23 is loaded with a word proportional to a shift pot voltage over an A.D.C. 23a.

By adding a 25HZ squarewave ontothe VIDEO IN inputtotheA.D.C.3 at 1/2 L.S. bit peak-to-peak,the6 bit converterwill yield 7-bit resolution as it is offset by 1/2 its L.S. bit on the interlaced field. Similarly with chroma U where 7 bits are needed from the 6 bit converter, the L.S. bit is derived from 1/4 line rate, making surethatthe chroma dots have a 1:1 aspect ratio.

Referring to Figure 4, the memory M consists of 8 identical 16Kx 1 static RAMs MIA-MID and M2A M2D, operating with 200nS cycle time in write, 133.1/ 3nS cycle times in read. The memory is split into alternate read and write fields to allow simultaneous reading and writing without slowing down the memory speed. Each field is split intofour, each memory being equally addressed. In horizontal modesandforthechroma,thefieldissplitintofour 5ms bands, one written to each memory. This allows thefrequencyofoccurenceofline rate signals two be displayed as a variation in brightness, as with a C.R.T. display.The data inputtothe memoryistied high on the write planeto enter data, and tied lowon the read plane to allow erasure after readout. The memory outputs are latched and the appropriate planefed out.

Referring to Figure 5, memory data from DATA OUT of Figure 4 enters at DATA iN and is fed to a 128 x4static RAM 31. This is used as a speed doubler, where data is read in at7.5MHz and out at 15 MHz.

This is achieved by having the read address at twice the frequency of the write address. The RAM output is converted to analog by an equally weighted D.A.C.33.

The graticule is generated in an 8Kx 8 EPROM shown at MG, each graticule occupying 2Kx4of memory,the remaining 4K being sparefor possible use as NTSC graticules. The EPROM output is in 8 bit blocks and is fed to a register32 to produce 15MHz of serial data, which is added to the video waveform at 33. The combined signal passesthrougha7.5MHz low pass filter 34 before being added to the video signal.

An 8to 4 MPX at35 is used to control which memory isfed with a write enable signal, and alsoto provide memory enables for readout and erasure areas. A 3 to 8 decoder 36 controls which memory is written into to provide brightness information. A front panel switch overrides the operation of the memory controller. In the STORE position writing in the read field is inhibited, stopping erasure and effectively giving infinite persistence. In the HOLD position, all writing is disabled, freezing the display.

The system which has been described thus serves to apply the video and vector displays to the video signal such that the same monitorwill display the picture and the corresponding video and vector waveforms: in the example described the waveform displays are "burnt" into the video signal and a graticule is also displayed at the locations ofthewaveform displays. The system can include a facility for switching betweel P.A.L. and N.T.S.C. television systems.

Claims (11)

1. Atelevision waveform monitoring system, comprising an inputfor receiving a video signal, an output for applying said video signal to a CRT display, means for processing said video signal and deriving therefrom video and/orvectorwaveform signals, and meansforapplying said video and/or vector waveform signals to said outputfordisplay ing saidvideo and/orvectorwaveforms on the CRT display.

2. Atelevision waveform monitoring system as claimed in claim 1, in which said processing means comprises a television field store, means for writing video and/orvectorwaveform signals into said television field store and means for reading said waveform signal(s) out of said store for application to said output.

3. Atelevision waveform monitoring system as claimed in claim 2, in which said processing means is arranged to read said video and vector waveform signals of said store atappropriatetiming to produce separate video and vector displays.

4. A television waveform monitoring system as claimed in any preceding claim, arranged for displaying both the video and/or vector waveforms and the picture atthe same time on the CRT display.

5. Atelevision waveform monitoring system as claimed in claim 4, in which the video and/orvector waveforms are burnt into the picture signal being applied to the CRT.

6. A television waveform monitoring system as claimed in claim 5, in which the video and vector waveforms are displayed atthe sametime atdifferent positions ofthe CRTdisplay.

7. Atelevisionwaveform monitoring system as claimed in any preceding claim, including means for generating and applying to said output signals providing the display of graticules against the displayed waveforms.

8. A television waveform monitoring system as claimed in claim 7, arranged for said displayed graticules and waveforms to be differently coloured.

9. Atelevision waveform monitoring system as claimed in any preceding claim, including means for varying the size of the waveform displays.

10. Atelevision waveform monitoring system substantially as herein described with reference to the accompanying drawings.

11. A television waveform monitoring system as claimed in any preceding claim, used in conjunction with a television camera and serving to display either the video or vector waveform in a viewfinder of the camera.