GB2178912A - Low voltage supply converter - Google Patents
Low voltage supply converter Download PDFInfo
- Publication number
- GB2178912A GB2178912A GB08515740A GB8515740A GB2178912A GB 2178912 A GB2178912 A GB 2178912A GB 08515740 A GB08515740 A GB 08515740A GB 8515740 A GB8515740 A GB 8515740A GB 2178912 A GB2178912 A GB 2178912A
- Authority
- GB
- United Kingdom
- Prior art keywords
- transistors
- transformer
- bridge
- auto
- converter according
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
Abstract
A bridge of transistors Q1 to Q4 has the junction 1 of the collectors of the transistors Q1 and Q3 connected to one input terminal A of a centre tapped auto-transformer T and the junction 2 of the collectors of the transistors Q2 and Q4 connected to the other input terminal B of the transformer T. The centre tap C of the transformer T is connected to the positive output terminal 3 and a negative output terminal 4 is connected to a negative input terminal 5 and to the emitters of the transistors Q3 and Q4 while a positive input terminal 6 is connected to the emitters of the transistors Q1 and Q2. The centre tap C of the transformer T is at a potential of approximately half the input voltage whenever either of the transistors Q1 and Q4 or Q2 and Q3 are conducting. <IMAGE>
Description
SPECIFICATION DC-DC Converter
The invention relates to a DC-DC converter.
In the operation of digital equipment, such as computers, process controllers and telecommunication exchanges, it is sometimes necessary to convert a 5-volts DC supply to approximately 2.3 volts DC for the purpose of providing power for low-voltage logic, or memories.
Various apparatus has been proposed, such as linear regulators and switching regulators, usually operated in what is known as the 'buck' mode. A linear regulator has the disadvantage of low efficiency and consequent high heat dissipation, which in the example cited gives an efficiency of no more than 46%, and which dissipates more heat than does the load. This can be a serious problem in a tightly packed printed-circuit board as used in modern computers. A switching regulator is more efficient, and in the example cited it might by careful design approach 90% efficiency. However, by its nature it creates substantial electrical noise, which has to be attenuated by electrical filters, which add to the cost and size of the basic converter.
According to the invention there is provided a DC-DC converter comprising a bridge of semiconductor switching devices and a centre-tapped auto-transformer, with the output from the semiconductor bridge fed to the centre-tapped autotransformer in a manner such that when there is n volts across the whole winding of the transformer an output taken across one or the other half winding of the transformer has a voltage less than n volts.
Such a converter can have a high efficiency but a lower noise generation than a switching regulator.
Preferably the bridge comprises four transistors, particularly field-effect transistors, with the voltages applied to the bases or gates of the transistors being that required to cause conduction of the transistors when required, and the base or gate voltage being that required to cause non-conduction when that is required.
Alternatively so long as a minimum load greater than the magnetising current of the autotransformer is always flowing, only two transistors need be provided the other arms of the bridge comprising two rectifier diodes, one or other of such is maintained in conduction.
A DC-DC converter giving an output voltage of about half the input voltage can be provided by using a half-bridge circuit with one diagonal half of the bridge comprising switching transistors and the other diagonal half of the bridge comprising rectifier diodes, the auto-transformer preferably then having a non-magnetic gap in its core to aid the re-setting of the magnetic flux of the core.
The invention is diagrammatically illustrated by way of example in the accompanying drawings, in which:
Figure 1 shows a circuit diagram of one embodiment of a DC-DC converter according to the invention;
Figure 2 shows the active part of the circuit of
Figure 1 during one half cycle;
Figure 3 shows a circuit diagram of another embodiment of DODC converter according to the invention utilizing only two transistors;
Figure 4 shows a circuit diagram of a further embodiment of a DC-DC converter according to the invention using a centre trap transformer incorporating an air gap; and
Figure 5 shows a still further embodiment of a DC-DC converter according to the invention from which a voltage greater than half the applied voltage can be obtained.
Referring to Figure 1, four transistors are shown, the transistors Q1 and Q2 being PNP types, and the transistors Q3 and Q4 being NPN types. The junction of the collectors of the transistors Q1 and
Q3 is connected to one input terminal A of a centre tapped auto-transformer T, while the junction 2 of the collectors of the transistors Q2 and Q4 is connected to the other input terminal B of the transformer T. The centre tap C of the transformer T is connected to one output terminal 3, as shown the positive terminal, a negative output terminal 4 is connected to a negative input terminal 5 and to the emitters of the transistors Q3 and Q4, and a positive input terminal 6 is connected to the emitters of the transistors Q1 and Q2.One half winding 7 of the transformer T connected to the junction of the collectors of the transistors Q1 and Q3 has a small over-winding 8, whose free end D is connected to the cathode of a rectifier diode D1 and the other half winding 9 of the transformer has an over-winding 10 with its free end E connected to the cathode of a rectifier diode D2.
In operation of the circuit the transistors Q1 and
Q4 are driven by drive circuitry 11 with sufficient base signal to make them conduct with a low voltage drop for a short time, typically ten microseconds, while the transistors Q2 and Q3 have no base signal and do not conduct. This places almost all of the 5-volts input supplied to the terminals 5,6 across the auto-transformer terminals A and B. The centre-tap C of the transformer will be at a potential of about 2.5 volts less any voltage drop in the transistor Q1 and a small voltage drop due to the transformer winding resistance with respect to the common negative line 4, 5. At the end of the period when the transistors Q1 and Q4 are conducting, their base signal is reduced to zero.After a short period to enable the transistors Q1 and Q4 to become substantially non-conducting, a base signal is supplied by the drive circuitry 11 to the previously non-conducting transistors Q2 and Q3 to render them conducting with a low voltage drop. This again places the 5 volts input across the transformer terminals A and B, but this time with the opposite polarity to the previous period. Once again the centre-tap C will be at a potential of 2.5 volts or thereabouts with respect to the common negative line 4, 5. The base signal to the transistors Q2 and
Q3 is maintained for a period of the same duration as that for the base signal to the transistors Q1 and
Q4, after which it is reduced to zero.After another similar short off time the base signal to the transistors Q1 and Q4 is switched on again, and the cycle repeated as often as required. It will be seen that the centre-tap C of the auto-transformer T is at a potential of approximately half the input voltage whenever either the transistors Q1 and Q4 or the transistors Q2 and Q3 are conducting, which is almost all of the time that the circuit is working.
During the transition of conduction from Q1 and Q4 to Q2 and Q3, or vice versa, the potential of the centre-tap C is maintained by a small reservoir capacitor C1 connected between the centre tap C and the common negative line 4, 5.
When a load is connected between the terminals 3,4 and across the capacitor C1, a current will flow out of the centre-tap C to the load. During the period when the transistors Q1 and Q4 are conducting, it can be seen by reference to Figure 2 that if the load current is It/ then by transformer action to maintain an ampere-turn balance on the transformer core, an input current of 1,12 will flow from the junction 1 to terminal A, through the half-winding 7 and out to the load. A balancing current of IL/2 will also flow through the half-winding 9, which must come from terminal 2 i.e. the collector of the transistor Q4.This current is in the opposite direction to the preferred direction of current flow through a transistor, and this is known in the art as the inverted mode of operation. This can be done with some transistors, but it is preferable to provide an easier current path forthis current, which is the purpose of the overwinding 10 and the rectifier diode D2. The overwinding 10 is proportioned to provide a voltage at terminal E of just sufficient magnitude to make the diode D2 conducting when the transistor Q4 is supplied with base current.The load current will now divide in a slightly different proportion, with the winding 7 carrying slightly more than half the load current, and the winding 9, 10 carrying slightly less than half the load current, but with the ampereturns on the transformer core due to the current in the winding 7 very nearly balancing those due to the current in the winding 9, 10, the small difference being that required to provide the magnetising current of the transformer. A similar action is provided by the over-winding 8 and the rectifier diode D when the transistors Q2 and Q3 are in a conducting state. The provision of the overwindings 8 and 10 and the rectifier diodes D1 and D2 isto ensurethatthecentre-tapC remains at its intended potential for any value of load current within the designed capability of the converter.
The drive circuitry 11 required to derive the base switching signals of appropriate duration, polarity and timing for the transistors Q1, Q2, Q3, and Q4 is conventional and well known to those versed in the art.
In Figure 3 like references are used to those used in Figures 1 and 2 to denote like parts, and it will be seen that the transistors Q3 and Q4 have been omitted. This can be done so long as a minimum load greater than the magnetising current of the auto-transformer T always flows to maintain either the rectifier diode D1 orthe rectifier diode D2 in conduction.
In the embodiment of Figure 4, a half bridge circuit is used with one diagonal half of the bridge comprising the switching transistors Q1 and Q4 and the other diagonal half of the bridge being formed by the rectifier diode D1 and a diode D3. The autotransformer T should then include a non-magnetic gap in its core to aid resetting of the magnetic flux of the core. Drive circuitry 11 as in Figure 1 is required in the embodiments of Figures 2 and 4 but is not shown in the drawings.
In the embodiment of Figure 5, instead of the collectors of the transistors Q1 and Q2 being connected respectively to the terminals 1 and 2 and thus to the terminals A and B of the autotransformer Tri, they are connected to additional tapping points F and G respectively. This arrangement can give an output voltage of the terminals 3,4 which is greater than half the input voltage of the terminals 5,6 since the terminals F and G are respectively inboard of the terminals A and B. In an alternative arrangement it is possible to extend the over windings 8 and 10 still further beyond the terminals D and E and to place the terminals F and G outside the terminals D and E to give a lower voltage.
An output voltage of a quarter to three quarters the input voltage is considered most desirable.
Claims (7)
1. A DC-DC converter comprising a bridge of semi-conductor switching devices and a centretapped auto-transformer, with the output from the semi-conductor bridge fed to the centre-tapped auto-transformer in a manner such that when there is n volts across the whole winding of the transformer an output taken across one or the other half winding of the transformer has a voltage less than n volts.
2. A DC-DC converter according to claim 1, in which the bridge comprises four transistors with the voltages applied to the bases or gates of the transistors being that required to cause conduction of the transistors when required, and the base or
gate voltage being that required to cause non
conduction when that is required.
3. A DC-DC converter according to claim 2, in which the transistors are field-effect transistors.
4. A DC-DC converter according to claim 1, in
which with a minimum load greater than the
magnetising current of the auto-transformer always
flowing, only two transistors are provided, the other
arms of the bridge comprise two rectifier diodes and
one or other of such is maintained in conduction.
5. A DC-DC converter according to claim 1,
giving an output voltage of about half the input
voltage, and comprising a half-bridge circuit with
one diagonal half of the bridge comprising
switching transistors and the other diagonal half of
the bridge comprising rectifier diodes.
6. A DC-DC converter according to claim 5, in which the auto-transformer has a non-magnetic gap in its core to aid the re-setting of the magnetic flux of the core.
7. A DC-DC converter substantially as hereinbefore described and illustrated with reference to the accompanying drawings.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB08515740A GB2178912A (en) | 1985-06-21 | 1985-06-21 | Low voltage supply converter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB08515740A GB2178912A (en) | 1985-06-21 | 1985-06-21 | Low voltage supply converter |
Publications (2)
Publication Number | Publication Date |
---|---|
GB8515740D0 GB8515740D0 (en) | 1985-07-24 |
GB2178912A true GB2178912A (en) | 1987-02-18 |
Family
ID=10581116
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08515740A Withdrawn GB2178912A (en) | 1985-06-21 | 1985-06-21 | Low voltage supply converter |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2178912A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AT515852A1 (en) * | 2014-06-04 | 2015-12-15 | Fachhochschule Technikum Wien | Highly dynamic power source for pulsed load current generation |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1053643A (en) * | 1962-09-04 | 1900-01-01 | ||
GB1123183A (en) * | 1964-09-14 | 1968-08-14 | Gen Electric | Electric power control circuits |
GB1448493A (en) * | 1972-09-21 | 1976-09-08 | Bbc Brown Boveri & Cie | Circuit arrangement for a singlephase or polyphase inverter |
GB1533331A (en) * | 1975-02-11 | 1978-11-22 | Gould Inc | Power controllers |
-
1985
- 1985-06-21 GB GB08515740A patent/GB2178912A/en not_active Withdrawn
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1053643A (en) * | 1962-09-04 | 1900-01-01 | ||
GB1123183A (en) * | 1964-09-14 | 1968-08-14 | Gen Electric | Electric power control circuits |
GB1448493A (en) * | 1972-09-21 | 1976-09-08 | Bbc Brown Boveri & Cie | Circuit arrangement for a singlephase or polyphase inverter |
GB1533331A (en) * | 1975-02-11 | 1978-11-22 | Gould Inc | Power controllers |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AT515852A1 (en) * | 2014-06-04 | 2015-12-15 | Fachhochschule Technikum Wien | Highly dynamic power source for pulsed load current generation |
AT515852B1 (en) * | 2014-06-04 | 2018-03-15 | Fachhochschule Technikum Wien | Highly dynamic power source for pulsed load current generation |
Also Published As
Publication number | Publication date |
---|---|
GB8515740D0 (en) | 1985-07-24 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |