GB2176970A - Testing telephone lines - Google Patents

Abstract

An automatic remote line testing device at subscribers premises enables a telephone line to be tested from the exchange when the subscriber has equipment connected to the other end, even when the equipment is providing a short or open circuit. The device comprises a command tone validating circuit (3), command tone and test signal interface circuits (2) and line transformer and power extractor circuits (1). <IMAGE>

Description

SPECIFICATION Testing telephone lines This invention relates to testing telephone lines, and to a device responsive automatically to a test tone received from the remote line end for validating the tone and responding thereto.

It is useful to be able to test a telephone line remote it from a telephone exchange in response to e.g. a subscriber complaint, before despatching an engineerto check the line orthe subscriber equipment.

With the increase in the amount of equipment being connected to a telephone line at the subscriber's premises, there is clearly going to be an increase in the numberoffaults reported, and many of these maybe due to the subscriber's equipment. Ifthis is not purchased or leased from the telephone operating company such as British Telecom in the UK, then the operating company will only need to ensure the leased telephone line isfunctioning normally and to distinguish between a faulty line on the one hand, and faulty equipment on the other hand for which the operating company may not be responsible.

Our co-pending application 8330055 describes an automatic line tester which is highly immune to misoperation.

It is an object of the present invention to enable such a remote line testing device to operate on a 2-wire system such as generally used in the Public Switched Telephone Network in the United Kingdom, and provides means for powering such a device.

According to the present invention there is provided a transponderfor connection to a 2-wire telephone line at a subscriber's premises and which can be interrogated remotely from e.g. the exchange to test the line, by returning atestsignal in responseto the interrogation signal, the transponder comprising a line transformer having a splitwinding from which power is picked offfor powering the transponder from the line whilst remaining transparentto the subscriber connection, a receive circuit for selecting the interrogation signal, and protocol logicfor determin ing the validity of the interrogation signal and send- ing thetestsignal in response to a valid finding.

Preferably the transponder comprising a tone filter forshaping the test signal and meansforgenerating the test signal.

Preferably the transponder comprising a line relay operable by the protocol logic to disconnectthesub- scriberfrom the line during sending of the test signal.

Preferably the transformer has a split primary winding providing power pick off, and a secondary winding having a transmit portion forfeeding the test signal to the line in response to interrogation and a receive portion for receiving the interrogation signal.

In orderthatthe invention can be clearly understood reference will now be made to the accompanying drawing in which Figure 1 is a block diagram of a remote line tester transponderaccording to an embodimentofthein- vention, and Figure2 shows detail of the line transformer of Figure 1.

The remote line tester responds to a command, presently a signal tone, sent from the exchange having a preset frequency and a preset minimum dura tion andthetester recognisesthissignal andonlythis signal to provide a confirmation tone e.g. 800Hz back on the pair of telephone wires. It must not of course interfere with the normal usage of the line.

Referring to Figure 1 of the drawings, the tester comprises three sections, namely the linetransfor- mer and power extraction circuits 1, the command tone and test signal interface circuits 2 and the command tone processor 3 which in this embodiment is realised in integrated circuit form.

The line transformer and thereby the power extraction circuits 1 are connected to the 2-wire line (2W Line) from the Exchange. Part of the line transformer TRANS-A comprises primary winding, L, and L2 and coupling capacitor C1 for providing DC separation and AC coupling between the primarywindings L1, L2.

DC from the exchange is applied to a series regulator SR which provides regulated DC to the various circuit components of the transponder.

In series with the line are automatic disconnect relay contacts 11 a, and the second part ofthetrans former TRANS-B incorporating series windings L3, L4 and a centre-tapped hybrid winding L5. The series windings L3, L4 permit d.c. to be fed to the subscriber's equipment with normal line signals, and are also used to couplethe interrogation signal to the hybrid winding L5 and thencetothe sum/limiteram- plifier 13 where the line will have either a termination our a short circuit (e.g. malfunction).

The balanced detector 12, connected transversely across windings L3 and L4 will "see" a deg ree of voltage dependent upon the level of termination, its output also being fed tothe sum/limiteramplifier 13, to complement the "current" induced signal obtained from L3 and L4.

Under any of these conditions the interrogation from the exchange will cause the test tone to be returned to the exchange while the subscriber's equipment is automatically disconnected for the period ofthetest (in one option of this embodiment 60 secs.).

Figure 2 shows in furtherdetailsthe linetransfor merwith power pick offand connections for the loop back relay contacts. In particular it shows the phasing ofthewindings, L1, L2, L3, L4, L5. Further there is shown the relay contact sets 11 a which, during normal use of the subscriber's telephone circuit provide a direct connection for the 2-wire pair. Also in this condition,the shunt inductance ofthewhole of windings L1 and L2 in series is maintained, thus presenting a high impedance transversely to the subscriber's circuit.

When the relaywinding 11 b is energisedthecon- tact sets change over to parallel L3 with a portion of L1, and similarly L4with L2 to now present the correct source/terminating impedance to the circuit. The sub scribe is disconnected for the duration of the test.

The hybrid windings are effectively divided into a transmit portion Tx, for transmitting the test tone, and a receive portion Rxfor receiving the interrogation signal, by a centre tap CTto earth via a resistor R, in this embodiment300 ohms. Whenthe line is being interrogated, the system is timed, requiring only one command to initiate looping through relay 1 1,the transponder restoring to the u nlooped condition after afinitetime has elapsed. During this time an 800 Hz tone is emitted via thetransmitTx hybrid winding L5.

The automatic loop circuit is provided by reed relay contacts 11 a driven from the decoded command tone of 2700 Hz transmitted from the serving exchange via the line.

In a further option of this embodiment the relay circuit is latched. A subsequent interrogating tone is thus used to release the relay. During the latched state the test tone is maintained, and it is a feature of the hybrid winding Ls as coupled to the transmit/ receivewindings L1 and L2, inthiscase, paralleled by L3 and 4 respectively to distinguish between the interrogative and test tones and therey release the relay during the transmission oftesttone.

The interface circuits 2 in conjunction with the balanced line transformer TRANS together with a balanced inputvoltage amplifier 12 (input buffer) and summing/limiter amplifier 13 are arranged that irrespectively ofwhetherthe customer's apparatus presents: (i) its correctterminating impedance, (ii) an open circuit, (iii) ashortcircuit, then a substantially constant voltage is obtained in the summing amplifier 13. Hence linetestoperation is ensured under all customer conditions inclusive of a fault.

The interface circuits 2 operate in dependence upon the principles employed in the line transformer.

For an understanding of the circuitry considerthe voltages/currents in the transformer windings, with reference to Figure 2, during the three customer operation states mentioned above.

(i) For a correct termination a given current flows in the series line windings L3, L4which therefore in duces a known voltage Vser in the suitably phased hybrid winding . Also a known voltage Vsh appears across the customertermination which is sensed by the differential input buffer 12. The results of these two signal paths are dealt with in the summing amplifier 13 in a fixed ratio. This ratio is so chosen to preserve a given summed voltage.

(ii) For the open circuit case no current flows in the series windings L3, L4 and hence no voltage (Vser) is induced in the hybrid winding of the transformer but the load voltage (Vsh) ofthefirst case (i) is dou bled.

(iii) In the closed circuit case the current in the series windings L3, 4 and hence the voltage (Vser) induced in the transformer hybrid winding iS dou bled w.r.t. the first case (i) but here there is no voltage (Vsh) input in the differential amplifier.

The overall mechanism is such that in the three cases,andequallyforall partial terminations, a reasonably constant voltage is derived at the inputto the summing amplifier 13, and thereby, independ ance ofanytermination.

The summing amplifier 13 is also configured as a limited to provide approximately constant drive to the processor.

Noise immunity is enhanced bythe inclusion of an active bandpass filter 14 centred at 2700 Hz. The signal from the interface circuit 2 is fed to a command tone processor 3. This circuit is realised as a semicustom integrated device using low powertechnology. The principle is that of a sampling frequency counter with programmed bounds. The whole pro- cess is controlled by a highly stable crystal oscillator 21 with a master frequency of 4096 KHz.

The input frequency of 2700 Hz is applied to a Schmitttrigger22. The output ofthe trigger 22 is fed to a data control 27. An external signal, logic low, is preset atthe select pin 24a to set up the mode of operation in which both an 800 Hz gate circuit37 and a 60 second timer circuit 25 are operative.

The input signal is fed via the data control circuit 27 to a decadic counter 28. The gate input 28A to this counter receives a timing signal from a sync circuit SYNC which synchronizes a mastertime base divider 29. This gates the counter on for a period of 240 msec.

and offfora period of 80msec. During the "on" counting phase the input frequency, if correct, will cause the counterto accumulate 648 counts. The decoder 30 which operates in three bit mode is arranged to "look" for predetermined counts above and below 648 representative of a band of frequencies. In this wayfinelytoleranced frequency limits can be set. An external logic signal preset bythe userto selectthe bandwidth (BW-SEL) allows the decoder to operate at any of two pre-fixed bandwidths. Counts representative of + 25 Hz are selected by logic low and + 50 Hz by logic high. An "in range" frequency causes the decoder 30 to provide a pulseevery320msec.viathe frequency low/normal circuit 31 to both a continuity store 32 and a resettable timer 33, which "looks" for missing pulses.

The continuity store 32 is looking for seven successive pulses within the period 2 to 3 seconds, and in response to that will set the relay latch 26 and send an instruction to the mode control 24 (see connection A).

This institutes the 60sec tone back sequence sub jectto the appropriate mode select (24a) input being selected. Alternatively the sequence does not employ the 60sectiming but remains latched whilst returning test tone. In this case a subsequent interrogation command is required to release the latch. This inturn requires the removal of the initial interrogation signal, if still present. Its removal initiates the 2 second data lockout sequence, described later.

Out of range frequencies are discriminated against in the following ways: (i) Where the frequency is too high then the decoder 30 gives an output via the frequency high circuit 34 to a reset gate 35 which is effective to reset the continuity store 32. Thus thins store will not cou nt morethan one pulse and the relay latch 26 will not be set.

(ii) Where the frequency is too low, or indeed absent, then the decoder 30 will not provide pulses to thefrequency low/normal circuit 31. This in turn will not provide pulses for the timer 33. This circuit, the missing pulse detector, acts as a re-triggerable monostablewith a period in excess of 320ms (in this embodiment 420ms). If the timer 33 is not reset it changes state to create, via reset gate 35, a reset of continuity store 32. Thus the absence of a single count or more is accommodated, thereby ensuring the detection of breaks in transmission of short duration. This provides a high degree of immunity to misoperation.

Afurther circuit, a two second data lock-out 36 also makes useofthe monostabletimer31 properties.

When the condition arises that:- (a) The relay latch 26 has operated and (b) Interrogation tone has ceased (determined as detection of absence oftone by change of state ofthe timer33), then the two second data lock-out comes into play.

When initiated it acts on the data control 27 via connection Cto accept an alternative data source provided by the mastertime-base 29 via connection B. This is fed to the decadic counter 28 to be decoded by a subsection of the decoder 30. The count, representative ofthetime span 2 seconds, uses a number smallerthan those adopted for bandwidth checking in order not to create any unwanted states in the continuity store 32 or reset activities from the reset gate 35.

The termination of the count sequence reestablishes the data input via the data control 27 and resets the continuity store 32 via the reset gate 35. The cycle of command interrogation may now be repeated to either repeatthe latch setting or releasing sequence depending upon selected mode.

The reset circuitry is carefully arranged such that in addition to out of range frequencies not operating the latch 26, the loss of a single count (or more) in the sequence of seven counts gives an invalid total count.

For example, a short break or interruption intrans- mission of the frequency might occur, and this iso be rejected as invalid. This provides a high degree of immunity to misoperation.

Inthetimed mode from the point of recognition, previously described as the setting of the relay latch and an instruction is passed to the mode control 24, this activates the circuits 25 and 37. The 60 second timertakes input from the time base 29. On reaching count maturity it provides a signal to reset the relay latch 26 thereby releasing the relay coil 11 band the contact set 11 a.

From the time that the 60 second counter is started, until termination, the 800 Hz select circuit 37 takes an output from the time-base, as a square wave, and passes it as the test tone from the processor to an 800 Hz tuned amplifier 38 which shapes the test toneto give a reasonably pure sinusoidal tone suited to line transmission. The level ofthis tone is further set by a potentiometer 39.

The processor is designed so that data guarding occurs i.e. 800 Hz is prevented from reaching the counter.

In the latched mode the instruction to the mode control 24is inhibited andthus circuit25 isinopera- tive. Circuit 37 remains enabled and taken an 800Hz outputfrom the time base forfeeding to line as in the timed mode.

The processor can be used not onlyto operate an auto return signal facility such as loop-back or Hz signal in responseto an input frequency of predetermined parameter. The processorcould be used to remotely operate some other device where a high degree of immunity to misoperation is important.

The processor 3 can be realised in integrated circuit form as a custom uncommitted logicarray.

Claims (5)

1. Atransponderfor connection to a 2-wiretelephone line at a subscriber's premises and which can be interrogated remotely from e.g. the exchange to test the line, by returning a test signal in response to the interrogation signal, the transponder comprising a line transformer having a split winding from which power is picked offfor powering the transponder from the line whilst remaining transparent to the subscriber connection, a receive circuit for selecting the interrogation signal, and protocol logicfor determin ingthevalidityofthe interrogation signal and send ingthetestsignal in responsetoavalidfinding.

2. Atransponder as claimed in claim 1 and comprising a line relay operable by the protocol logicto disconnectthe subscriberfrom the line during sending of the test signal.

3. Atransponder as claimed in claim 1 or2, wherein the transformer comprises a split shunt primarywindings, having high impedance properties and providing power pick off, and a secondarywind ing having a transmit portion for feeding the test signal to the line in response to interrogation and a receive portion for receiving the interrogation signal.

4. Atransponder as claimed in claim 3, comprising line relay contacts disposed between the series winding and the customer connection and arranged to connect the suitably phased series winding across a portion of the split shunt winding to create the required linetransmitting/terminating impedance when the customer connection is disconnected and either or both the interrogating and test signals are being received and transmitted respectively.

5. Atransponder substantially as hereinbefore described with reference to the accompanying drawings.