GB2176053A - Device for protection against electrostatic discharges for bipolar integrated circuits - Google Patents

Abstract

The device comprises at least one bipolar transistor (10), the base region (29) of which has an elongate configuration extending from the base contact (31) to underneath the emitter region (28) with a portion of reduced cross-section defining an integrated resistor. The device is connected in parallel with the circuit to be protected and affords protection against both positive and negative voltage surges. <IMAGE>

Description

SPECIFICATION Device for protection against electrostatic discharges, in particular for bipolar integrated circuits This invention relates to a device for protection against electrostatic discharges, in particular for bipolar integrated circuits.

As is known, bipolar integrated circuits require increasingly higher protection against electrostatic discharges. More specifically, bipolar circuits require to be protected during their manufacturing operations, and they may become damaged at any stages of the workpiece processing; however, the most critical stage occurs when handling closed workpieces.

The problem of how to protect bipolar integrated circuits against electrostatic discharges may be approached under two different angles: either the provision of measures of the antistatic kind, or the design of integrated protection structures whereby it becomes possible to ensure for the integrated circuit to be protected prevalence over certain regulating standards.

In respect of the latter, several solutions have been proposed among which those utilizing the principle of clamping the discharge voltage spike to ground or to the power source will be considered hereinafter.

Usually, protection devices operating on that principle are required to meet such demands as: 1. low resistive values to ground, 2. full transparency, so as to alter the normal operation of the circuit to be protected in no ways, 3. least area requirements, 4. good protection level and, therefore, adequate strength, 5. sufficient speed to be suitably activated before the circuit to be protected 6. applicability to all bipolar processes.

Among known solutions, some will be listed herein below which show interesting aspects in connection with some of the above-listed requisites.

One known solution consists, for example, of using a suitably sized double SCR, operating as a protective structure. That solution, while having favorable aspects, is not devoid of disadvantages. In fact, if the SCR is made in the classic way, it requires a large area, thus no longer meeting the demand for compact size dimensions. Another solution, for SCR forming, consists of utilizing existing parasitic structures in the device. However, that solution is resisted by designers on account of the not very high controllability of the phenomena that take place during their normal operation when parasitic structures are utilized.

Another solution consists of utilizing the so-called phantom emitter. In this case, the weak transistor within the circuit to be protected is replaced with a phantom emitter transistor which differs from a conventional transistor by that it has a second emitter diffusion shorted to the base and separation of the base contact from the normal emitter diffusion. That structure is very positive as regards area consumption, it being obtainable right in the area of the integrated device to protect, except for the slight additional cost of the spacing between the base and the emitter. However, that structure can only be implemented with NPN transistors and cannot be applied to PNP transistors, thereby its use is restricted to but a few instances.

Another solution consists of providing a clamp transistor disposed on amplifier inputs (refer to the device manufactured by National Semiconductor Co and identified as LM101). That device finds a limitation in that it has been specifically developed for use on the inputs of amplifiers, and its utilization with different type devices may give rise to problems or troubles.

Other solutions consist, for example, of using Zener or Schottky diodes, such as the Zener MCE AD 20 B 518 C (L731), the Schottky MCE 20 A 579 B (L730) or the Schottky diode manufactured by Motorola. Such solutions represent different alternatives, which utilize a clamp transistor clamping the voltage spikes. These devices too have preferential applications and may be unsuitable in some particular cases.

In view of the above-outlined situation, the aim underlying this invention consists of providing a novel device for protection against electrostatic charges, particular for bipolar integrated circuits, which can fill the requisites imposed on such devices, to provide an adaptable solution even in case of non-applicability of conventional devices.

A particular object of this invention is to provide a novel protection device which operates in a particularly reliable way and which can be used by the designer wherever known devices fail to perform satisfactorily.

Another object of this invention is to provide a protection device which can provide protection both against positive and negative spikes.

A not least object of this invention consists of providing a protection device which can be integrated without any high consumption of area.

The indicated objects and more to become apparent hereinafter are achieved by a device for protection against electrostatic discharges, in particular for bipolar integrated circuits, for connection in parallel with a circuit to be protected, characterized in that it comprises at least one stage including a bipolar transistor and an integrated resistive element formed between the base and the emitter of said transistor.

Further features and advantages will be more clearly understood from the following description of a preferred but not exclusive embodiment, illustrated by way of example and not of limitation in the accompanying drawings, where: Figure l is a circuit diagram of the protection device of this invention; Figure 2 is a top view showing the layout of half of the device of Figure 1; Figure 3 shows a cross-section taken through the device shown in Figure 2; and Figure 4 shows the collector-emitter voltage in some conditions of the connection of a bipolar transistor versus the logarithm of the collector current.

Figure 1 shows the full equivalent circuit diagram for the device of this invention. As may be seen from that figure, the device is composed of two like stages, of which the upper one has been designated with the reference numeral 10' and the lower one with 10". In detail the upper stage 10' is disposed between a first reference potential line forming the power source V and a line 13 which connects the inputterminal 20 to the inputterminal 18 of the device to be protected, schematically indicated by block Sin dash lines, whilst the lower stage 10" is connected between the line 13 and a second reference potential line defining the ground. In detail every stage 10' and 10" is made up of a transistor 15' or 15" the base and emitter whereof are connected to each other through a resistive element 16' or 16".

in particular the collector of the transistor 15' is connected to the power source Vcc, whilst the emitter of the transistor 15', and hence one terminal of the resistor 16', are connected to the line 13, to which the collector of the transistor 15" is also connected; whilst the emitter of the transistor 15" and accordingly one terminal of the resistor 16" are grounded. Lastly, the base of each transistor is connected to the second terminal of the respective resistor 16' or 16".

Every stage of the device of Figure 1 is made asshown in Figures 2 and 3. As may be seen from such Figures, each stage, indicated at 10 and representing either stage 10' or 10" of-Figure 1, is made in a silicon chip comprising substrate 35, a buried layer 33 with polarity of the n+ type, a collector region 27 with polarity of the n type, accommodating a more doped region 25 with polarity of the no type connected to the collector contact 26, and a base region 29 with polarity of the p type. Within the base region 29 there is formed an emitter region 28 with polarity of the n+ type. The base and emitter regions are connected respectively to a base contact31 and an emitter contact 30 shorted together by a metal layer 32. The circuit is completed by insulating regions 34 with polarity of the p+ type.

As may be seen from Figures 2 and 3, the base region has an elongate shape extending from the base contact 31 to underneath the emitter region 28 and the respective contact 30. Furthermore, that base region (seU Figure 2) has centrally a reduced cross-section zone forming, so to speak, a pinched zone. That reduced cross-section structure forming a double Tin plan view, forms the resistive element indicated with the reference numeral 16' or 16" in Figure 1. The width of the reduced cross-section may be changed to provide optimum resistance values, however, advantageous results have been obtained with a resistance of about f kOhms, with a value which can vary between 800 Ohms and 1200 Ohms.

In practice one obtains a resistance spread longitu dinallytothe base region, with a diode atthe junction between the base region 29 and the emitter region 28.

The operation of the protection device according to the invention is as follows, assuming that the stage 10 of Figure 3 represents the lower stage 10" of Figure 1. In this case, in the presence of negative voltage spikes the diode formed on the base-emitter junction is reverse biased. Consequently, the current flows through the integrated resistor formed by the restricted base region, whereas the base-collector junction is forward biased. Therefore, the transistor will operate in exactly the opposite way from the conventional one, with the collector operating as the emitter and the emitter operating as the# collector.

Thus, the transistor gain is small and there occurs clipping of the negative spikes.

In the instance of positive spikes, instead, the base-collector junction is reverse biased; in that case the voltage drop between the transistor collector and emitter has the pattern shown in Figure 4for the curve VCER Figure 4 also shows the coliector-emittervoltage versus the collector current with different configurations of the transistor. In particular as may be seen the collector to emitter voltage with the device according to the invention (VCER) is included be tween the open-base collector-emitter voltage VCEO and the open-emitter collector-base voltage Vceo.

Making the resistor in the base region 29 as shown in figures 2 and 3 is therefore particularly suitable because the behaviour of the stage is more favorable also with respect to the open-base collector-emitter voltage. In fact the presence of a resistive element allows dissipation of some of the power fed on the terminal 20 externally of the circuit to be protected.

The upper stage 10' is only provided when the standards require application of a positive discharge between the pin of the integrated circuit to be protected and the power and a negative discharg#e toward ground.

In these test conditions, the upper stage is switch ed on when a positive discharge is present at the tested pin (terminal 20). The current flows through resistor 16', switching on transistor 15' which is biased as to work with mutually inverted collector and emitter terminals (that is the collector operates as an emitter and the emitter works as a collector), thus reducing the transistor gain.

Thus, the positive discharge, through the power supply, reaches the ground flowing through the path with lower resistance in the tested circuit.

As can be taken from the foregoing description, the invention fully achieves the objects set forth. In fact a protection device has been provided which fulfils the requisites set forth and in particular enables protection of the downstream arranged device against both positive and negative voltage spikes, differently from other protection types.

Thefactshould be emphasized that the device according to the invention may be used both for achieving only a downward protection, and for achieving protection also toward the power source, where in the former case it will be only necessary to make the lower stage indicated at 10", whereas in the latter case it will be necessary to make a complete structure as shown in Figure 1.

Furthermore, it is extremely advantageous that the device of this invention requires a much reduced integration area. For example, including thetoler ances with a particular low voltage process an area consumption of about 65.02 mils2 was obtained in the instance of protection both toward the power source and ground.

Proper operation of the device in the presence of voltage spikes is also due to the provision of an additional path for dissipation of energy through the resistive element.

In particular, irrespective of the manufacture process, with the device according to the invention it has been possible to protect any types of structures subjected to electrostatic discharges and to ensure protection above 4000 Volts.

The invention herein is susceptible to many modifications and changes within the scope of the inventive concept. In particular the structure, as already explained, may be made with just one stage or with both stages, the upper and lower ones, as required. Furthermore, the resistance value of resistor 16', 16" may be changed to suit design specifications.

Claims (10)

1. A device for protection against electrostatic discharges, in particular for bipolar integrated circuits, for connection in parallel with a circuit to be protected, characterized in that it comprises at least one stage including a bipolartechnologytransistor means having emitter, base and collector electrodes, and an integrated resistive means integrated between said base and emitter electrodes of said transistor means.

2. A device according to Claim 1, characterized in that the base region of said transistor means has an elongate configuration extending from the base electrode to the emitter region of said transistor and forms said resistive means.

3. A device according to Claim 2, characterized in that said base region has an intermediate portion of reduced cross-section.

4. A device according to Claim 3, characterized in that said reduced cross-section intermediate portion comprises a reduced width portion.

5. A device according to Claim 2, characterized in that said base region has a configuration as a double T.

6. A device according to one or more of the preceding claims, characterized in that said base electrode is shorted to said emitter electrode through a metal layer.

7. A device according to one or more of the preceding claims, characterized in that said resistive means has a resistance varying approximately from 800 Ohms to 1200 Ohms.

8. A protection device according to one or more of the preceding claims, characterized in that said at least one stage is disposed between the input of the circuit to be protected and ground, said collector electrode of said transistor being connected to the input of the circuit to be protected and said emitter electrode of said transistor being grounded.

9. A protection device according to one or more of the preceding claims, characterized in that said at least one stage is disposed between the input of the circuit to be protected and the power source, the collector electrode of said transistor being connected to the power source and the emitter electrode of said transistor being connected to the input of the circuit to be protected.

10. A device for protection against electrostatic discharges, substantially as described herein with reference to the accompanying drawings.