GB2173946A - Method of locating an integrated circuit on a substrate member - Google Patents

Method of locating an integrated circuit on a substrate member Download PDF

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Publication number
GB2173946A
GB2173946A GB08505191A GB8505191A GB2173946A GB 2173946 A GB2173946 A GB 2173946A GB 08505191 A GB08505191 A GB 08505191A GB 8505191 A GB8505191 A GB 8505191A GB 2173946 A GB2173946 A GB 2173946A
Authority
GB
United Kingdom
Prior art keywords
integrated circuit
substrate member
locating
holder
set position
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB08505191A
Other versions
GB2173946B (en
GB8505191D0 (en
Inventor
John Malcolm Wilkinson
David Michael Murphy
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sinclair Research Ltd
Original Assignee
Sinclair Research Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sinclair Research Ltd filed Critical Sinclair Research Ltd
Priority to GB8505191A priority Critical patent/GB2173946B/en
Publication of GB8505191D0 publication Critical patent/GB8505191D0/en
Publication of GB2173946A publication Critical patent/GB2173946A/en
Application granted granted Critical
Publication of GB2173946B publication Critical patent/GB2173946B/en
Expired legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/27—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67132—Apparatus for placing on an insulating substrate, e.g. tape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
    • H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54426—Marks applied to semiconductor devices or parts for alignment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01039—Yttrium [Y]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01057—Lanthanum [La]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)

Abstract

A wafer-scale integrated circuit is located on a substrate member by manoeuvring the components into vertical alignment with a set relationship and bringing them together to be held together by a disc of double-sided-adhesive tape located between them.

Description

SPECIFICATION Method of locating an integrated circuit on a substrate member The present invention relates to a method of locating an integrated circuit on a substrate member.
The present invention is particularly suitable for the location of a wafer scale integrated circuit on a substrate member.
In accordance with the present invention, a method of locating an integrated circuit on a substrate member includes the steps of manoeuvring the integrated circuit and the substrate member to positions in vertical alignment with a set relationship, bringing together the integrated circuit and the substrate member, and attaching the integrated circuit to the substrate member by double-sided adhesive tape means.
The manoeuvring of the integrated circuit and the substrate to positions in vertical alignment with a set relationship, may include, locating the integrated circuit at a first position with a set orientation and transferring the integrated circuit to a second set position at a different level from the first without alteration of orientation, and locating the substrate member at a third set position with a set orientation and transferring the substrate member to a fourth set position without alteration of orientation, where the second and fourth set positions are in vertical alignment.
The manoeuvring of the integrated circuit may include locating it on a first holder at the first set position with set orientation, moving the first holder and the integrated circuit, without change in level, by a predetermined amount to the fourth set position, transferring the integrated circuit to a second holder movable vertically between the second and the fourth set positions, moving the second holder with the integrated circuit to the second set position, and returning the first holder to its start position.
The step of bringing together the integrated circuit and the substrate member is effected by moving the second holder and the integrated circuit vertically towards the fourth set position to meet the substrate member at the fourth set position.
The steps for locating the integrated circuit on the substrate member will be followed by the vertical movement of the second holder back to its start position to provide access to the assembly of the integrated circuit and the substrate member, and the removal of the assembly of the integrated circuit and the substrate member.
The integrated circuit may be held by the first and second holders by being vacuumclamped to the holders and located at the first set position with a set orientation by controlled movement of the first holder in a horizontal plane to bring datum lines on the integrated circuit into alignment with graticule markings of a microscope defining the first set position and orientation. Where the integrated circuit is a wafer, its datum lines will be the lines of separation between the circuit regions of the wafer.
The substrate member may be located on its holder by being provided with apertures which are engaged by members projecting from the holder.
The double-sided adhesive tape means may be carried between two backing strips in a roll, one backing strip being peeled off to expose one adhesive face of an adhesive tape means which is applied to a set region of the substrate member by the use of apertures, on the remaining backing strip, which apertures are engaged by the members projecting from the holder.
The method of locating an integrated circuit on a substrate member provides an integrated circuit, advantageously a wafer-scale integrated circuit, attached to a substrate member by means of a piece of double-sided-adhesive tape.
The substrate member may include printed conductors for attachment to terminal pads on the integrated circuit, or, the substrate member may be a plate without printed conductors, the terminal pads of the integrated circuit then being clamped to conductors on a flexible carrier at the top surface of the integrated circuit.
Apparatus for performing the method of locating an integrated circuit on a substrate member includes means for manoeuvring the integrated circuit and the substrate member to positions in vertical alignment with a set relationship, means for positioning double-sidedadhesive tape means beteen the integrated circuit and the substrate member, and means for moving the integrated circuit and the substrate member together with the double-sided-adhesive tape means between them.
The means for manoeuvring the integrated circuit and the substrate member to positions in vertical alignment with a set relationship may include integrated circuit receiving and transfer means arranged to set the integrated circuit at a first set position and angular disposition and to transfer the integrated circuit to a second set position without change of angular disposition, and substrate member receiving and transfer means arranged to set the substrate member at a third set position and angular disposition and to transfer the substrate member to a fourth set position without change of angular position, the second and fourth positions being in vertical alignment.
A method of locating an integrated circuit on a substrate member, in accordance with the present invention, by means of apparatus for performing the method, will now be described by way of example only and with ref erence to the accompanying drawings, in which: Fig. 1 is a diagrammatic representation of apparatus for locating a wafer-scale integrated circuit on a substrate member with printed conductors by means of double-sided-adhesive tape, Fig. 2 is a diagrammatic representation of circular pieces of double-sided-adhesive tape on a carrier strip, Fig. 3 is a diagrammatic representation of double-sided-adhesive tape arranged with rollers for supplying the tape with one side exposed and on a carrier strip, Fig. 4 is a diagrammatic representation of a substrate member with locating holes for setting its position and orientation, and, Fig. 5 is a diagrammatic representation of a wafer-scale integrated circuit attached to a substrate member by double-sided-adhesive tape.
The method of locating the wafer on the substrate member begins with the transfer of the wafer from a carrier box to a face up position on a horizontally movable carriage and clamping the wafer on the carriage by means of a vacuum arrangement. The carriage is movable horizontally and rotatable. The wafer is moved on the carrier to a position set by a microscope fixed above the carriage, the microscope including a graticule corresponding to the lines marking the boundaries between the circuit patterns on the wafer, the wafer being moved and rotated as required to achieve the alignment of the graticule and wafer lines. The carrier is then moved a fixed distance along a beam to a position below a vertically movable carrier which is moved downwards into contact with the wafer, and the wafer is held by the vertically movable carrier by means of that carrier's vacuum clamp.The vacuum clamp of the horizontally movable carriage is released, the vertically movable carriage moved upwards with the wafer, and the horizontally movable carriage is returned to its start position.
The method of locating the wafer on the substrate member continues with the positioning of the substrate member on a second horizontally movable carriage which is equipped with locating lugs for engagement with corresponding apertures in the substrate member. Above the substrate member, a spool carrying double-sided-adhesive tape discs between upper and lower backing strips is made to release a unit of tape carrying one adhesive disc, the lower backing strip being peeled off as the length of tape is released, the length of the upper backing strip now carrying the adhesive disc is cut off, and the length of the upper backing strip is placed over the substrate member.Apertures in the length of the upper backing strip correspond with the lugs on the second horizontally movable carriage and the adhesive disc is located on the substrate member by means of its upper backing strip and pressed on to the substrate member by a roller providing a set pressure. The upper backing strip is peeled away from the adhesive disc and the second horizontally movable carriage is moved along the beam used by the other horizontally movable carriage, by a set amount, to a position vertically below the vertically movable carriage which is then lowered to bring the lower surface of the wafer into contact with the upper surface of the adhesive disc. Controlled downward pressure is applied to stick the wafer to the tape, the vacuum clamp of the vertically movable carriage is released, and the carriage moved upwards to its start position.The assembly of the wafer and substrate is removed and the second horizontally movable carriage is returned to its start position.
Referring to Fig. 1, apparatus for carrying out the method, described above, for locating the wafer on the substrate member includes a first horizontally movable carriage 1 a beam 2 along which the carriage 1 is movable, a fixed microscope 3 mounted above the first horizontally movable carriage 1, a second horizontally movable carriage 4 movable along the beam 2, a spool and roller system 5 for holding and dispensing adhesive discs on backing strips, and a vertically movable carriage 6 located mid-way between the horizontally movable carriages 1 and 4. The carriages 1 and 6 are equipped with vacuum clamps, and the carriage 4 has four lugs 9.
Referring still to Fig. 1, the apparatus is operated by placing a wafer 7 on the carriage 1, clamping the wafer 7 by means of the carriage vacuum clamp, using X,Y and 0 adjustment micrometers (not shown) to align surface patterns, referred to above, on the wafer 7 with graticule markings on the microscope 3,moving the carriage 1 with the wafer 7 by a fixed amount along the beam 2 to the position la (7a for the wafer), moving the carriage 6 downwards to the position 6a, activating the clamp of the carriage 6 and releasing that of the carriage 1, and moving the carriage 6 upwards with the wafer (position 7b). Operation of the apparatus continues with the placing of a substrate member 20 (Fig.4) on the carriage 4 and the location of the substrate member 20 by means of its apertures 21 (Fig. 4) and the lugs 9 of the carriage 4, the removal of a length of backing strip 31 (Fig. 2) with an adhesive disc 30 (Fig. 2) from the spool and roller system 5, the placing of the length of backing strip 31 over the carriage 4 to cause the lugs 9 to engage apertures 32 (Fig. 2) in the length of backing strip 31, the pressing of the adhesive disc 30 on to the substrate member 20, removal of the backing strip 31, the movement of the carriage 4 along the beam 2 to the position la below the carriage 6, the lowering of the carriage 6 to stick the wafer in the position 76 to the upper surface of the substrate member 20, and the return of the carriages 4 and 6 to their start positions.
Referring to Fig. 3, the spool and roller system includes a tape-carrying spool 40 from which the tape is unwound to pass over a roller 41 around which separation of the tape occurs, the lower backing tape 33 being drawn backwards around the roller 41 while the upper backing tape 31 with the adhesive pads 30 is drawn forwards.
Fig. 5 illustrates the assembly of a wafer 7, an adhesive disc 30 and a substrate member 20. The substrate member 20 may have printed conductors on its upper surface for connection to the terminal pads of the wafer 7, or a cover portion and means providing connection to the wafer 7 may be required.

Claims (13)

1. A method of locating an integrated circuit on a substrate member, including the steps of manoeuvring the integrated circuit and the substrate member to positions in vertical alignment with a set relationship, bringing together the integrated circuit and the substrate member, and attaching the integrated circuit to the substrate member by double-sided-adhesive tape means.
2. A method of locating an integrated circuit on a substrate member, as claimed in claim 1, including the locating of the integrated circuit at a first set position with a set orientation, the transferring of the integrated circuit to a second set position at a different level from the first without alteration of orientation, the locating of the substrate member at a third set position with a set orientation, and the transferring of the substrate member to a fourth set position without alteration of orientation, the second and fourth set positions being in vertical alignment.
3. A method of locating an integrated circuit on a substrate member, as claimed in claim 2, including the locating of the integrated circuit on a first holder at the first set position with set orientation, moving the first holder and the integrated circuit, without change in level, by a predetermined amount to the fourth set position, transferring the integrated circuit to a second holder movable vertically between the second and the fourth set positions, moving the second holder with the integrated circuit to the second set position, and returning the first holder to its start position.
4. A method of locating an integrated circuit on a substrate member, as claimed in claim 3, including the clamping of the integrated circuit to the holder by means of a vaccum.
5. A method of locating an integrated circuit on a substrate member, as claimed in any one of claims 2 to 4, including the moving of the integrated circuit, by controlled movement of the first holder, to a position and an orientation defined by a fixed optical instrument.
6. A method of locating an integrated circuit on a substrate member, as claimed in any one of claims 2 to 5, including the locating of the substrate member on a third holder by the engaging of apertures in the substrate member with projections on the third holder.
7. A method of locating an integrated circuit on a substrate member, as claimed in claim 6, including the applying of adhesive tape means to a set region of the substrate member by engaging apertures of a backing strip carrying the adhesive tape means with the projections on the third holder.
8. A wafer-scale integrated circuit attached to a substrate member by double-sided-adhesive tape means, produced by a method of locating an integrated circuit on a substrate member as claimed in any one of the preceding claims.
9. Apparatus for locating an integrated circuit on a substrate member, including means for manoeuvring the integrated circuit and the substrate member to positions in vertical alignment with a set relationship, means for positioning double-sided-adhesive tape means between the integrated circuit and the substrate member, and means for moving the integrated circuit and the substrate member together with the double-sided-adhesive tape means between them.
10. Apparatus for locating an integrating circuit on a substrate member as claimed in claim 9, including integrated circuit receiving and transfer means arranged to set the integrated circuit at a first set position and angular disposition and to transfer the integrated circuit to a second set position without change of angular disposition and substrate member receiving and transfer means arranged to set the substrate member at a third set position and angular disposition and to transfer the substrate member to a fourth set position without change of angular disposition, the second and fourth positions being in vertical alignment.
11. A method of locating an integrated circuit on a substrate member, substantially as herein described with reference to the accompanying drawings.
12. A wafer-scale integrated circuit attached to a substrate member by double-sided-adhesive tape means, substantially as herein described with reference to the accompanying drawings, and as illustrated by Fig. 5 of the accompanying drawing.
13. Apparatus for locating an integrated circuit on a substrate member, substantially as herein described with reference to, and as illustrated by, Fig. 1 or Figs. 1 and 3, of the accompanying drawings.
GB8505191A 1985-02-28 1985-02-28 Method of locating an integrated circuit on a substrate member Expired GB2173946B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
GB8505191A GB2173946B (en) 1985-02-28 1985-02-28 Method of locating an integrated circuit on a substrate member

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB8505191A GB2173946B (en) 1985-02-28 1985-02-28 Method of locating an integrated circuit on a substrate member

Publications (3)

Publication Number Publication Date
GB8505191D0 GB8505191D0 (en) 1985-04-03
GB2173946A true GB2173946A (en) 1986-10-22
GB2173946B GB2173946B (en) 1989-04-05

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GB8505191A Expired GB2173946B (en) 1985-02-28 1985-02-28 Method of locating an integrated circuit on a substrate member

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1073098A1 (en) * 1999-07-28 2001-01-31 Infineon Technologies AG Low stress wafer mounting assembly and method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1073098A1 (en) * 1999-07-28 2001-01-31 Infineon Technologies AG Low stress wafer mounting assembly and method
WO2001008202A1 (en) * 1999-07-28 2001-02-01 Infineon Technologies Ag Low stress wafer mounting assembly and method

Also Published As

Publication number Publication date
GB2173946B (en) 1989-04-05
GB8505191D0 (en) 1985-04-03

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Legal Events

Date Code Title Description
732 Registration of transactions, instruments or events in the register (sect. 32/1977)
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19930228