GB2162710A - Circuit arrangement for an apparatus with a picture and/or a sound signal channel - Google Patents

Circuit arrangement for an apparatus with a picture and/or a sound signal channel Download PDF

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Publication number
GB2162710A
GB2162710A GB08519229A GB8519229A GB2162710A GB 2162710 A GB2162710 A GB 2162710A GB 08519229 A GB08519229 A GB 08519229A GB 8519229 A GB8519229 A GB 8519229A GB 2162710 A GB2162710 A GB 2162710A
Authority
GB
United Kingdom
Prior art keywords
memory
timer
date
circuit arrangement
programmed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB08519229A
Other versions
GB8519229D0 (en
GB2162710B (en
Inventor
Manfred Halbe
Hans Jurgen Grambow
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE19843428698 external-priority patent/DE3428698A1/en
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of GB8519229D0 publication Critical patent/GB8519229D0/en
Publication of GB2162710A publication Critical patent/GB2162710A/en
Application granted granted Critical
Publication of GB2162710B publication Critical patent/GB2162710B/en
Expired legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G07CHECKING-DEVICES
    • G07CTIME OR ATTENDANCE REGISTERS; REGISTERING OR INDICATING THE WORKING OF MACHINES; GENERATING RANDOM NUMBERS; VOTING OR LOTTERY APPARATUS; ARRANGEMENTS, SYSTEMS OR APPARATUS FOR CHECKING NOT PROVIDED FOR ELSEWHERE
    • G07C3/00Registering or indicating the condition or the working of machines or other apparatus, other than vehicles
    • G07C3/02Registering or indicating working or idle time only
    • G07C3/04Registering or indicating working or idle time only using counting means or digital clocks
    • GPHYSICS
    • G04HOROLOGY
    • G04FTIME-INTERVAL MEASURING
    • G04F1/00Apparatus which can be set and started to measure-off predetermined or adjustably-fixed time intervals without driving mechanisms, e.g. egg timers
    • G04F1/005Apparatus which can be set and started to measure-off predetermined or adjustably-fixed time intervals without driving mechanisms, e.g. egg timers using electronic timing, e.g. counting means
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03GCONTROL OF AMPLIFICATION
    • H03G3/00Gain control in amplifiers or frequency changers
    • H03G3/20Automatic control
    • H03G3/30Automatic control in amplifiers having semiconductor devices
    • H03G3/34Muting amplifier when no signal is present or when only weak signals are present, or caused by the presence of noise signals, e.g. squelch systems
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/60Receiver circuitry for the reception of television signals according to analogue transmission standards for the sound signals

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Circuits Of Receivers In General (AREA)

Abstract

A circuit arrangement for use in a home-entertainment apparatus, has a memory 11 and a timer 10 so as to ensure that the apparatus can operate correctly only if a date has been entered in the memory. If a date is not entered, the timer will disable the apparatus after a specific time interval. After such a time interval the timer 10 turns on transistor 101 so as to mute a muting stage 5. If however the date has been programmed into memory 11, such as by interrupting appropriate electrical connections (15, 16, 17, Figures 2a, 2b) of the memory, the timer does not receive any power supply via 13 and the muting stages is set to low attenuation. As an alternative to the radio described in Figure 1 an audio channel of a record player, a recorder or a television receiver or the video channel of a television receiver may be controlled in a similar way. The memory 11 may be a microcomputer (2, Figure 3) using a EAROM memory with a keyboard (23) and display (22) for setting the date. <IMAGE>

Description

SPECIFICATION Circuit arrangement for an apparatus with a picture and/or a sound signal channel The invention relates to a circuit arrangement for an apparatus with a picture and/or a sound signal channel, which comprises a muting stage for increasing the signal attenuation in that signal channel.
When home-entertainment apparatus, such as a radio, a TV receiver, a record placer or a recorder, is sold, this is generally done with the guarantee that within a specific period after the sale, defective apparatus will be repaired free of charge. The bill or a separate guarantee certificate then serves as proof for this guarantee. However, these documents may be mislaid or altered.
It is the object of the invention to provide a possibility of ascertaining the date of the first use of the apparatus.
Starting from a circuit arrangement of the type specified in the opening paragraph, this object is achieved in that there is provided a non-volatile date memory which can be programmed by a user of the apparatus and, coupled thereto, a timer which can be activated by switching on the supply voltage of the apparatus, and the date memory and the timer cause the muting stage to increase the signal attenuation after predetermined time interval defined by the timer if the memory has not been programmed, whilst the muting stage is not influenced by the time if the memory has been programmed.
If the date of first use of the apparatus has been entered or programmed into the date memory, the apparatus will operate normally, However, if the date memory has not been so programmed, the timer is activated when the apparatus is switched on and begins to time out. After a fixed time determined by the timer - generally a few minutes -the timer activates the muting stage so that the sound and/or picture practically disappear(s). Temporary normal operation may then be restored by switching off and subsequently switching on the apparatus, but this renders the apparatus practically useless.Therefore, a user has to record the date on which the apparatus is put into proper normal operation for the first time by programming the date memory. By means of this date memory, which forms part of the apparatus, it can then be ascertained whether the guarantee period has already expired.
Since the timer allows a short period of operation, final inspection during manufacture or presale testing at the dealer remains possible.
Such a circuit arrangement is not expensive because the only additional parts are a date memory and a timer, which can be manufactured comparatively cheaply; a muting stage for increasing the signal attenuation is already present in some form or other in most apparatuses.
A date memory can be constructed in various ways. In a first embodiment, the date memory comprises an input terminal and an output terminal which are interconnected via at least one conductor arranged on a board and constituting an energising connection for the timer. For severing the conductor, the board is formed with a plurality of holes at the location of the conductor, which holes correspond to various dates. The date is then stored mechanically in that the conductor or the conductors is/are severed at the location of the hole(s) corresponding to the date of first use of the apparatus, to break the energising connection for the timer.
In another embodiment the date memory is an electrical non-volatile digital memory, which can be programmed by means of an input unit via a digital control device, and the control device is constructed so that if the memory has not been programmed the timer is activated when the power supply is switched on and causes the attenuation of the muting stage to increase when a predetermined time interval has elapsed. In this case a digital electronic memory is employed, for example a PROM, or the like.
Embodiments of the invention will now be described in more detail, by way of example, with reference to the drawings. In the drawings: Figure 1 shows a first embodimept of the invention, Figure 2a shows the associated memory, Figure 2b shows the same memory with the cover removed, Figure 3 shows an embodiment comprising a micro-computer, and Figure 4 is a flow chart of a part of the program for this micro-computer.
Figure 1 shows schernatically the block diagram of a radio receiver comprising an aerial 1, a mixer stage 2, which mixes the aerial signal with the signal from a tunable oscillator 3, an IF and demodulator stage 4, a muting stage 5, by means of which the attenuation for the demodulated signal can be changed, an audio amplifier 6 and a loudspeaker 7.
When the apparatus is switched on by closing a switch 8, the parts 2 to 6 are connected to a supply voltage source 9 via a supply line 19. The radio receiver is so far known.
It accordance with the invention a control input of the muting stage 5 is connected to the collector of a transistor 101, which is also connected to the supply line 19 via a collector resistor 102. A resistor 103 connects the base of the transistor to the output of a timer 10, whose supply line 13 is connected to the output of a date memory 11, whose input is also connected to the supply line 19. The timer 10 is constructed so that it starts to time out as soon as an energising voltage is applied to it. In its initial reset condition it generates a low direct voltage on its output, which voltage turns off the transistor 101. The stage 5 consequently has a low attenuation.When a specific time interval, for example a few minutes determined by the timer 10, has elapsed, the timer 10 is set, causing a high direct voltage to appear on its output, by means of which high direct voltage the transistor 101 is turned on so that the attenuation of the stage 5 is switched over to a high value via the transistor 101.
The timer 10 may be constructed in a simple manner, preferably by means of an integrated cir cuit, for example of the type NE555, and may also comprise a suitable matching stage, which generates the voltages required for the correct operation of the muting stage The date memory 11 is shown in Figures 2a and 2b. It comprises a board 14 of plastics material to which input and output lines 12 and 13 are connected.These two lines are conductively connected to each other via three printed copper tracks 15, 16 and 17. The copper tracks extend across a plurality of holes 18 in the board, in such a way that only one of the three tracks extends across each hole.
As can be seen in Figure 2a, the board is provided with a cover with a legend, which cover exposes the holes and is divided into three areas 150, 160 and 170. The area 150 which corresponds to the days of a month, contains the holes across which the copper track 15 extends, the area 160, which corresponds to the months, contains those across which the copper track 16 extends, and the area 170, which corresponds to the years, contains those across which the copper track 17 extends.
When in each of the three areas a hole is pierced by means of a suitable object, for example a screwdriver, a specific date is stored (for example 05.03.1983 in Figure 2a) and the electrical connection between the lines 12 and 13 is interrupted.
When this memory is used, the receiver shown in Figure 1 operates as follows: If the data memory has not been programmed as described above, the supply voltage is applied to the timer 10 via the input line 12 and the output line 13 when the receiver is switched on, and the timer starts to time out, with transistor 101 turned off. This causes a comparatively high voltage to appear on the collector of this transistor, so that the muting stage is rendered inoperative, i.e. has a low attenuation. After the timer has timed out, it is set, causing transistor 101 to be turned on and the muting stage 5 to become operative, so that the loudspeaker 7 produces no sound. However, if the memory 11 has been programmed by severing the copper tracks at the location of the relevant hole in each of the areas 150, 160 and 170, the connection between the lines 12 and 13 is interrupted.The timer 10 then receives no energising voltage and thus remains reset and transistor 101 remains cut off, so that a high voltage is applied to the control input of the muting stage and this stage is set to a low attenuation.
It is alternatively possible to connect the supply voltage input of the timer 10 directly to the switch 8 and to connect the output of the timer 10 to the control input of the muting stage via the memory 11, in which case the matching circuit 101 ... 103 may be dispensed with.
Instead of being coupled to the muting stage the timer may alternatively be coupled to a stand-by circuit by means of which sound reproduction can be discontinued. Also, it is possible to disconnect the supply voltage from the audio channel via the timer 10 or the memory 11. In all these cases it is essential only that there is a stage whose attenuation or gain can be set from a low to a high value by means of a control voltage.
Figure 1 shows the invention applied to a radio receiver. In a similar way it may be employed in other equipment comprising an audio channel, for example a record player, a recorder or a television receiver. In a television receiver it is also (or alternatively) possibly to control the video channel in a similar way.
Figure 3 shows the block diagram of a radio receiver in accordance with the invention in which the receiver is controlled by a control device in the form of a micro-computer 21. The muting stage 5, or a stage whose attenuation can be controlled by means of a direct voltage, is connected to the output of the timer 10 over a line 25 and to an output of the micro-computer 21 over a line 26. The micro-computer is connected to a non-volatile digital memory, for example of the EAROM-type, in which the date of putting into operation can be stored with the aid of a keyboard 23 via the micro-computer. The micro-computer also controls a display 22 by means of which inter alia the contents of memory 20 can be displayed.
How the micro-computer co-operates with the devices 5, 10, 20, 21, 22 and 23 follows from the flow-chart of a part of the program shown in Figure 4, which program is performed each time that the supply voltage is switched on and each time that an entry destined for the memory 20 is keyed in.ln interrogation block 30 it is ascertained whether the memory 20 has been programmed or not, i.e. whether its contents differs from zero. If this is not the case, the program branches to block 31, causing the timer 10 to be activated, so that after a predetermined time interval has elapsed the sound reproduction is muted by means of a control signal over the line 25. Moreover, the user is instructed to enter the date into the memory (block 32) in a suitable manner, for example by blinking of the display 22 or by a beep tone.
However, if the contents of the memory 20 is not zero, i.e. if the memory has been programmed, the program proceeds to block 33, in which the muting circuit 5 is rendered inoperative (low attenuation) by means of a control signal over the line 26 and the micro-computer 21 enters no further dates into the memory 20. This is in order to prevent a date which has already been entered from being altered, which in principle is possible in the case of memories of the EAROM-type. This step is not necessary if instead a memory of the PROM type is used, but this demands the use of a suitable interface for programming such a memory.
If it is taken into account that in a receiver controlled by a micro-computer the devices 21, 22 and 23, and generally also the memory 20, are needed anyway for other control purposes, it will be evident that the additional cost for the invention mainly resides in the timer 10 and in the change of the micro-computer program as shown in Figure 4.
If desired, the timer function may also be carried out by the micro-computer.

Claims (6)

1. A circuit arrangement for an apparatus with a picture and/or a sound signal channel, which comprises a muting stage for increasing the signal attenuation, characterised in that there is provided a non-volatile date memory which can be programmed by a user of the apparatus, and coupled thereto, a timer which can be activated by switching on a supply voltage of the apparatus, and the date memory and the timer cause the muting stage to increase the signal attenuation after a time interval defined by the timer has elapsed if the memory has not been programmed, whilst the muting stage is not influenced by the timer if the memory has been programmed.
2. A circuit arrangement as claimed in Claim 1, characterised in that the date memory comprises an input terminal and an output terminal which are interconnected via at least one conductor arranged on a board and, for severing the conductor, the board is formed with a plurality of holes at the location of the conductor, which holes correspond to various dates.
3. A circuit arrangement as claimed in Claim 2, characterised in that the timer controls the muting stage and is connected to the supply voltage via the date memory.
4. A circuit arrangement as claimed in Claim 2, characterised in that the timer is connected to the muting stage via the date memory.
5. A circuit arrangement as claimed in Claim 1, characterised in that the date memory is an electrical non-volatile digital memory, which can be programmed by means of an input unit via a digital control device, and the control device is constructed so that if the memory has not been programmed the timer is activated when the supply voltage is switched on and causes the attenuation of the muting stage to increase when a predetermined time interval has elapsed.
6. A circuit arrangement substantially as hereinbefore described with reference to Figures 1 and 2 or Figures 3 and 4 of the accompanying drawings.
GB08519229A 1984-08-03 1985-07-31 Circuit arrangement for an apparatus with a picture and/or a sound signal channel Expired GB2162710B (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE19843428698 DE3428698A1 (en) 1984-08-03 1984-08-03 CIRCUIT ARRANGEMENT FOR A DEVICE WITH AN IMAGE AND / OR SOUND SIGNAL CHANNEL
DE3428673 1984-08-03

Publications (3)

Publication Number Publication Date
GB8519229D0 GB8519229D0 (en) 1985-09-04
GB2162710A true GB2162710A (en) 1986-02-05
GB2162710B GB2162710B (en) 1988-06-08

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Family Applications (1)

Application Number Title Priority Date Filing Date
GB08519229A Expired GB2162710B (en) 1984-08-03 1985-07-31 Circuit arrangement for an apparatus with a picture and/or a sound signal channel

Country Status (1)

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GB (1) GB2162710B (en)

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Publication number Publication date
GB8519229D0 (en) 1985-09-04
GB2162710B (en) 1988-06-08

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Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19960731