GB2152220A - Compensating an electrical signal varying non-linearly with time - Google Patents

Abstract

For at least partially compensating an electrical signal varying non-linearly with time, for instance an interference signal US (Fig. 3) superimposed on a useful signal UN in a flowmeter 1-4, sampled values VA0, UA1, etc are taken at equal time intervals from the electrical signal or from a total signal containing the electrical signal. the values being stored in registers 10p, to 10o. Each time (p + 1) sequential sampled values are multiplied (11p to 11o) by weighting factors Gp to Go which are proportional to the binomial coefficient (<p>k), the sign of each second product being inverted. The products formed in this manner are summed (12) to form a sum signal. In the sum signal obtained in this manner, all the terms of the polynomial representing the non-linear signal in the time interval in which the sampled values were taken are eliminated up to the (p-1)th degree. Thus. if the non-linearly varying signal can be completely represented in the respective time interval by a polynomial of degree n</=p-1, said signal is completely elminated from the sum signal. If the degree of the polynomial is higher or if the polynomial representation in accordance with Taylor's theorem is possible only approximately with a remainder, a residual error can be diminished by increasing the number of sampled values processed. <IMAGE>

Description

SPECIFICATION Method and arrangement for compensating an electrical signal varying non-linearly with time The invention relates to a method for compensating an electrical signal varying non-linearly with and to an arrangement for carrying out the method.

German specifications as laind open to inspection Nos. 2,410,407; 2,744,845; and 3,132,471 disclose methods and arrangements for compensating an interference voltage which in magnetic-inductive flow measurement by means of a magnetic field periodically changed between at least two states is superimposed on the useful voltage obtained at the electrodes of the measuring circuit and proportional to the flow. For this purpose, the total voltage is periodically sampled at different states of the magnetic field and a plurality of consecutively obtained sampled values are combined additively or subtractively so that the interference voltage components cancel each other out whilst due to the periodically alternating states the useful voltage components are retained.With these known methods and arrangements, apart from a constant interference DC voltage which in magnetic inductive flow measurement can reach very high values, it is also possible to compensate a linear change of the interference DC voltage between successive sampling instants.

However, if the interference voltage varies non-linearly as a function of time the components of a higher order than the first degree cannot be compensated with these known methods and arrangements. These components of higher order, i.e. in particular the usually predominant quadratic component and the components of still higher order usually diminishing with increasing power, remain as residual error in the output signal.

It is an object of the invention to provide a method which permits the compensation of a nonlinearly varying electrical signal up to any order of the non-linear components.

According to the invention, this problem is solved in that (p + 1) sampled values taken at equal time intervals from the electical signal or from a total signal containing the electrical signal are multiplied by weighting factors Gk = . ce, ( 1 I)k With k=O, 1, . . p; c=const.

proportional to the binomial coefficients Q and summed to form the sum signal p E Gk. UAU k=O As will be proved in the following description the method according to the invention has the effect of eliminating all the terms of the polynomial representing the non-linear signal in the time interval in which the sampled values were taken up to the (p - 1 )th degree.

Thus, if the non-linearly varying signal can be completely represented in the respective time interval by a polynomial of degree n c p - 1 the signal is completely eliminated from the composite signal. If the degree n of the polynomial is higher or if the polynomial representation in accordance with Taylor's theorem is possible only approximately with a remainder, a residual error remains originating from the terms of higher order or from the remainder. By increasing the number of sampled values processed in the indicated manner this residual error can be diminished to any desired extent.

Particularly advantageous is the fact that the effect of the method is independent of the values of the coefficients of the polynomial representation. The dimensioning of the weighting factors is thus to be changed only in dependence upon the number of sampled values processed. The effect of the method is thus retained unchaged when the polynomial representation of the electrical signal changes or when it is applied to different signals.

When the electrical signal to be compensated is an interference signal superimposed on a useful signal which periodically alternately assumes at least two different states, as is the case in particular in magnetic-inductive flow measurement, the sampled values are preferably taken periodically alternately for different states of the useful signal. In this manner the useful signal is retained in the sum signal.

If however the sampled total signal varies non-linearly with time in accordance with a polynomial representation in the sum signal only the remainder originating from terms of higher order than (p - 1) remains. The method is then suitable for determining a change with time exceeding the (p - 1 )th degree. The method according to the invention always acts on the signal subjected to the sampling in the manner indicated irrespective of the origin of said signal and the manner in which it has been pretreated. It is thus possible to pretreat the signal before the sampling provided that the non-linear time variation to be compensated is retained.For example, in the magnetic-inductive flow measurement a precompensation known per se of the elctrode voltage may be effected for suppressing an interference DC voltage, or the electrode voltage can be integrated in each sampling period over a predetermined time interval so that the sampled values are taken from the itegrated voltage.

An arrangement for carrying out the method includes according to the invention a periodically actuable sampling circuit to the input of which the electrical signal to be compensated or the total signal is applied, a storage means for storing (p + 1) sampled values, a weighting means which multiplies each of these sampled values stored in the storage means by an associated weighting factor, and a summation circuit for summing the weighted sampled values furnished by the weighting means.

The storage means, the weighting means and the summation circuit may be constructed as analog circuits or with a preceding analog/digital converter, as digital circuits. The digital circuits can also be realized in the form of a correspondingly programmed microcomputer in accordance with modern thechnology.

Further features and advantages of the invention will be apparent from the following description of the embodiments thereof with the aid of the drawings; in which: Figure 1 is a block circuit diagram of a magnetic-inductive flow measurement arrangement for carrying out the method according to the invention and constructed with analog circuits, Figure 2 is the circuit diagram of an example of embodiment of a stage of the analog shift register in the arrangement of Fig. 1, Figure 3 shows diagrams of signals which occur at various circuit points of the arrangements of Figs. 1 and 5, Figure 4 is a schematic diagram of a specific embodiment of the sampling and storage circuit and the weighting arrangement of Fig. 1, Figure 5 is a block circuit diagram of a modified embodiment of the arrangement of Fig. 1, Figure 6 is another modified embodiment of the arrangement of Fig. 1 and Figure 7 is an embodiment of the arrangement of Fig. 1 constructed with digital circuits.

Fig. 1 shows schematically an internally insulated tube 1 through which an electrically conductive fluid flows perpendicularly to the plane of the drawing. A magnetic field coil 2 divided for reasons of symmetry into two identical halves disposed on either side of the tube 1 generates in the tubes a magnetic filed H directed perpendicularly to the tube axis. In the interior of the tube 1 two electrodes 3 and 4 are disposed from which an induced voltage can be tapped off which is proportional to the mean flow rate of the electrically conductive fluid through the magnetic field. A coil control circuit 5 controls the current flowing through the magnetic field coil 2 in dependence upon a control signal furnished by the output 6a of a control circuit 6.

The electrodes 3 and 4 are connected to the two inputs of a differential amplifier 7 which thus furnishes at its output a voltage which is proportional to the voltage between the two electrodes 3 and 4. The differential amplifier 7 is followed by an amplifier 8.

Connected to the output of the amplifier 8 is a sampling and storage circuit 10 which in the example of embodiment of Fig. 1 is formed by an analog shift register having (p + 1) register stages 100, 10,, 102 . 10kZ 1 p-2 10pi. 1Op- Each of these register stages can for example be made up in the manner illustrated in Fig. 2 for the register stage 1 0k An input 1 Oa is connected to the output of the preceding register stage or, in the case of the register stage 10,, to the output of the amplifier 8. An output 1 Ob is connected to the input of the following register stage.Connected between the output 1 Oa and the output 1 Ob in series are two sample and hold circuits of known type. The first sample and hold circuit is represented symbolically by a switch S1, a capacitor C1 and a high-impedance isolating amplifier Al; the second sample and hold circuit comprises in corresponding manner a switch S2, a capacitor C2 and a highimpedance isolating amplifier A2. The mode of operation of such sample and hold circuits is known: when the switch S1 is closed for a short time the capacitor C1 is charged to the instantaneous value of the voltage at the input 10a. After opening of the switch S1 the sampled voltage value remains on the capacitor C1 because the high-impedance isolating amplifier Al prevents a dissipation of the charge.The stored voltage value is available at the output of the isolating amplifier Al. When the switch S2 is closed for a short time the capacitor C2 is charged to the output voltage of the isolating amplifier Al so that it therefore takes over the sampled value stored on the capacitor C1. This sampled value is available at the output of the isolating amplifier A2, i.e. at the output lOb of the register stage.

Each register stage has a stage output 1 Oc which is connected to the output of the isolating amplifier Al so that at said output the sampled value stored in the capacitor C1 is continuously available.

The switches S1 and S2 illustrated schematically as mechanical switches are in fact very highspeed electronic switches actuable by control signals. The switch S2 is actuated by a control signal which is applied to a control input 1 Od of the register stage. The switch S1 is actuated by a control signal which is applied to a control input 1 Oe of the register stage. The control inputs 1 Od of all the register stages are connected in parallel to each other to an output 6b of the control 6. The control inputs 10e of all the register stages are connected in parallel with each other to an output 6c of the control circuit 6.As will be explained below in further detail with the aid of the time diagrams D and E of Fig. 3 the control circuit 6 furnishes at the outputs 6b and 6c control pulses which are offset in time with respect to each other. By each control pulse emitted at the output 6b the switches S2 of all the register stages are closed for a short time so that each capacitor C2 is charged to the sampled value which was previously stored on the capacitor C1 of the same register stage.By each control pulse furnished at the output 6c all the switches S1 are simultaneously closed so that the capacitor C1 of each register stage is charged to the voltage value at the input 1 0a. In the case of the register stage 1 Op this is the instantaneous value of the output voltage of the amplifier 8 which is sampled in this manner and in the case of the other register stages this is the sampled value stored in the respective preceding register stage.In this manner, in response to each pulse pair furnished by the control circuit 6 at the outputs 6b and 6c the sampled values stored in shift register 10 are shifted by one stage and a new sampled value from the output voltage of the amplifier 8 is introduced into the register stage 1 Op. The sampled values stored in the register stages are available at the outputs 1 Oc.

The output 1 Oc of each register stage of the shift register 10 is connected to the input of an associated weighting circuit 110, 111, 112,... 1 1 11 p-2' p in a weighting arrangement 11. In each weighting circuit the sampled value supplied is multiplied by a weighting factor G,, G,, ..... Gk,. . . Gp 2. Q-i " G. Since the sampled values in the example illustrated are analog voltages the weighting circuits 1 1o to 1 1 p are preferably amplifiers with gains corresponding to the weighting factors.

The outputs of the weighting circuits 1 10 two 11 are connected to the inputs of a summation circuit 1 2 which forms the sum of the output signals of the weighting circuits. The output of the summation circuit 1 2 at which the sum signal appears is connected to the input of a controllable inverting circuit 1 3 which is brought by a control signal furnished by the output 6d of the control circuit 6 into the one or other of two positions, and which in the one position allows the sum signal furnished by the summation circuit 1 2 to pass with the original sign whilst in the other position it reverses the sign of the sum signal.

Connected to the output of the controllable inverting circuit 1 3 is s further sample and hold circuit 14 which is again represented symbolically by a switch S3, a storage capacitor C3 and a high-impedance isolating amplifier A3. The switch is actuated by control pulses furnished by an output 6e of the control circuit 6. In response to each control pulse the instantaneous value of the sum voltage furnished by the summation circuit 1 2 with the sign determined by the inverting circuit 1 3 is sampled and stored in the storage capacitor C3.

This sampled value is available at the output of the sample and hold circuit 14 as a measurement voltage UM representing the flow in the tube 1.

The diagrams A, B, C, D, E, F, G of Fig, 3 show the variation with time of signals which occur at the circuit points of Fig. 1 designated by the same letters. For simplification the signals themselves will also be denoted by the same letters.

The diagram A shows the control signal which is supplied by the output 6a of the control signal 6 to the coil control circuit 5 and periodically alternately assumes the signal value 1 or the signal value 0. The period duration TM of the control signal A defines the duration of a measuring cycle.

The coil control circuit 5 is so constructed that for the signal value 1 of the control signal A it sends through the magnetic field coil 2, a direct current of constant magnitude in the one direction and for the signal value 0 of the control signal A a direct current of the same magnitude but in the opposite direction. The coil control circuit 5 can contain a current regulator which requlates the current for each polarity to the same constant value + Im or Im. The variation of the current flowing in the magnetic field coil 2 is shown in diagram B. Due to the inductance of the magnetic field coil after each switch-over the current only reaches the constant value I, of the opposite polarity with a certain delay.

The magnetic field H varies in time in the same manner as the current I. As is known, inductive flow measurement is based on the fact that the electrically conductive fluid flowing through the tube 1 behaves like an electrical conductor which is moved through the magnetic field H and in which according to Farraday's Law of Induction a voltage is induced which is proportional firstly to the magnetic field H and secondly to the movement velocity. For a constant flow rate of the fluid this flow-proportional useFul voltage thus exhibits the same variation with time as the magnetic field H, i.e. the variation with time of the coil current I illustrated in diagram B. If only this useful voltage were present the voltage illustrated in the diagram C' would appear at the output of the amplifier 8, which voltage, apart from the transition states, would periodically aternately assume the constant value + UN and the constant value - UN. This voltage could for example be sampled at equal time intervals At = TM/2 in each half period after reaching the constant value and the successive sampled values with corresponding sign inversion of every other sampled value could be used as a measure for the flow.

However, in reality the ideal case of diagram C' is not fulfilled. On the contrary, the flow proportional useful voltage is superimposed on an interference voltage which is due in particular to various electrochemical DC voltages. The interference voltage is not constant with time but varies non-linearly with time and can reach very high values. Thus, at the output of the amplifier 8 a total voltage UG as shown as example in diagram C of Fig. 3 appears: The useful voltage UN of the diagram C' is superimposed on the interference voltage Us whose variation with time is represented by the dash-line curve. It is immediately apparent that a sampling of this total voltage UG for example at the equal time intervals At as in diagran C' would not give sampled values which could be used directly as a measure of the flow in the tube 1.The output voltage of the differential amplifier 7 also of course exhibits the variation with time of diagram C.

The circuits of Fig. 1 described above and connected to the output of the amplifier 8 make it possible to largely compensate the non-linearly varying control voltage Us contained in the total signal UG and thus obtain a measurement signal which is proportional to the flow in the tube with high accuracy.

The diagrams D, E, F, G of Fig. 3 show the control signals which appear at the outputs 6b, 6c, 6d and 6e respectively of the control circuit 6. Like the control signal A, these control signals are binary signals which assume either the value 1 or the value 0. In the case of the signals D, E and G which are applied to the switches S1, S2 and S3 respectively of the sample and hold circuits in the shift register 10 and in the storage circuit 1 4 the signal value 1 denotes the closing of the switch, i.e. the sampling phase, and the signal value 0 at the opening of the switch, i.e the holding phase.

As already explained the control signals E are short pulses each of which effects the shifting of the sampled values in the shift register 10 by one register stage and the introduction of a new sampled value from the total voltage UG (diagram C) at the output of the amplifier A into the register stage 1 or. The pulses of the diagram D which in each case precede the pulses E at a short time interval are only auxiliary pulses which effect the temporary storing of the sampled values in the capacitors C2 of the register stages for preparing the subsequent shifting to the next register stage.

The sampling and shift instants defined by the sampling pulses E follow each other at equal time intervals At = TM/2 and in each half period of the useful voltage UN lie in the time interval in which the current 1, the magnetic field H and the useful voltage UN have stabilized after the decay of the transient effect.

It is assumed in Fig. 3 that a sampling takes place at the instant to. At this instant a sampled value UAo = Uso + UN is thus taken from the total voltage UG at the circuit point C by the input stage lop of the shift register 10 and stored.

At the instant t, = to + At the sampled value UAo is shifted to the next register stage lop-I and at the same time a new sampled value UA1 = US1 UN is introduced into the register stage 1 Op. The operation is repeated regularly so that finally after (p + 1) samplings at the instant tp = to + p.At the sampled value UAo has reached the register stage 10, and the register stages 10, to 1 Op contain the following sampled values from the indicated sampling instants: Register Stage Sampled value Sampling instant 100 UA0 = US0 + UN t0 101 UA1 = US1 - UN t1 = t0 + #t 102 UA2 = US2 + UN t2 = t0 + 2#T 10k UAk = USk + UN . (-1)k tk = t0 + k#t 10p-2 UA(p-2) = US(p-2) + UN . (-1)p-2 tp-2 = t0 + (p-2)#t 10p-1 UA(p-1) = US(p-1) + UN . (-1)p-1 tp-1 = t0 + (p-1)#t 10p UAp = USp + UN (-1)p tp = t0 + p#t It is assumed for simplification that the flow has not changed in the total time interval from to to to + p#t so that the useful voltage at all sampling instants had the same magnitude UN but alternately opposite sign.

Each of these sampled values is multiplied by the weighting factor Go' Gl' ... Gk' .. Gp in the associated weighting circuit 11o' 11l' . 1 1k' . 1 p and in the summation circuit 12 the sum of the weighted sampled values is formed. As a result of the special dimensioning of the weighting factors, in the sum signal the non-linear interference voltage Us is largely eliminated but the useful voltage UN is retained.

For this purpose the weighting factors Go to Gp are proportional to the (p + 1) binomial coefficients (pk) with alternating sign. Thus, in any weighting circuit Gk the weighting factor Gk = C . (pk) . (- 1)k with K = 0, 1, .., n (1) is set, C being a constant factor which is the same for all weighting circuits and which for simplification will be assumed hereinafter to have the value 1.

Each binomial coefficient can of course be calculated by the following formula: p! (2) (p - k)! or also from Pascal's triangle in which each numerical value results from the sum of the two numbers above it the preceding line: 1 1 1 2 1 1 3 3 1 1 4 6 4 1 1 5 10 10 5 1 1 6 15 20 15 6 1 1 7 21 35 35 21 7 1 ect.

Fig. 4 shows as example the configuration of the shift register 10 and the weighting circuits 1 1 10 to 116 for the case p = 6, i.e. the storing and processing of p + 1 = 7 sampled values with indication of the weighting factors of the individual weighting circuits which according to the above formula (1) have the following values::

G6 G5 G4 G3 G2 G1 G0 +1 -6 +15 -20 +15 -6 +1 The summation of the (p + 1) sampled values which are multiplied by these weighting factors and which were taken at equal intervals of time At from the total signal has the result that in the sum signal the non-linearly varying interference voltage, depending on the variation thereof, is completely or at least largely eliminated. This effect can be explained as follows: Let a non-linear function F(t) be represented by a polynomial of degree n: n F(t) = a0 + a1t + a2t2 + . . + a1t1 + ... + ant0 = # a1t1.

i = 0 (p + 1) function values are calculated for values of the variable t lying at equal intervals t in accordance with the Table given at the end of the description.

If each function value Fk of the Table is multiplied by the associated binomial coefficient (1)k. (kP) of alternating sign and the sum S of the products formed: P n 8=(1)k.(kP). ai a(t+kAtY, (3) k=O i=O then S = 0 for p#n + 1. (4) It follows from this:: If the non-linear interference voltage Us contained in the total signal UG at the circuit point C can be represented by a polynomial of the nth degree in the time interval in which the (p + 1) sampled values stored in the shift register 10 were taken then the interference voltage components Uso to Usp contained in the (p + 1) stored sampled values UAO to UAp obviously correspond to the function values of the Table and the sum of the interference voltage components multiplied by the weighting factors Go to Gp is p Z Gk. Usk = 0 for n < p. (5) k=O Under this condition, therefore, the interference voltage components have been completely eliminated in the sum signal.

On the other hand, for the sum of the usful voltage components in the sampled values multiplied by the weighting factor Go to Gp:

If the condition of equation (5) is fulfilled so that the interference voltage components are completely eliminated the sum voltage consists solely of a useful voltage which for a constant magnitude UN of the useful voltage sampled values is equal to the product of this magnitude multiplied by the sum of the absolute values of the weighting factors Go to Gp.

In the numerical example of Fig. 4 in this case the sum signal contains the useful voltage 64 UN.

If however the flow and thus the useful voltage varies in the respective time interval the useful voltage contained in the sum signal corresponds to a weighted mean value of the useful voltage components contained in the sampled values.

The operation is repeated in every further sample period with the same effect if the above requirements remain fullfilled. However, after each sampling period At the sign of the usual voltage components in the sum signal is reversed. For this reason the summation circuit 12 is followed by the controllable inverting circuit 1 3 which is actuated by the control signal which is furnished by the output 6d of the control circuit 6 and the variation of which with time is shown in diagram F of Fig. 3. As a result, the sign of the sum signal is reversed from sampling period to sampling period so that the useful voltage component is always obtained with the same sign.

The sample and hold member 1 4 is actuated by the control pulses which are illustrated in diagram G of Fig. 3 and which follow in time the sampling and shifting pulses of the diagram E.

Thus, the sample and hold member 1 4 samples the sum signal with correct sign whenever all the switch-over operations, sampling operations and shifting operations are completed. The last sampled value of the sum signal obtained remains stored in the storage capacitor C3 and is continuously available as measurement voltage UM at the output of the sample and hold member 14.

It is apparent from the above explanation that the interference voltage components in the sum signal are only completely eliminated if the two following requirements are met: 1. It must be possible to represent the interference voltage in the time interval in which the sampled values processed are taken by a polynomial of the nth degree as a function of the time; 2. the number (p + 1) of the stored and processed sampled values must be by at least 2 greater than the degree n of the polynomial.

It remains to be investigated whether these requirements can be met and what effects an incomplete meeting of the requirements has.

According to Taylor's theorem any function which in an interval can be continuously differentiated (n + 1) times can be represented approximately by a polynomial of the nth degree, a remainder generally remaining. Since the interference voltages concerned vary in a continu ously differentiatable manner such an approximate polynomial representation is usually possible.

If the interference voltage function could be exactly represented by a polynomial of finite degree n it would theoretically always be possible to make the number (p + 1) of the stored and processed sampled values so large that the condition p = n + 1 would be fulfilled. However, in practice even in this case for several reasons it would not be expedient to make the number of stored and processed sampled values too large: -with discrete circuitry (as in Fig. 1) the expenditure on circuitry would be correspondingly large.

-Since the measurement signal obtained is a weighted mean of the useful signal values sampled in the entire time interval it follows changes of the useful signal (i.e. the measured quantity) only with a delay which is the greater the greater the number of stored and processed sampled values.

-When the condition pn + 1 is not fulfilled the polynomial terms whose degree is higher than (p - 1) and Taylor's remainder in the approximate polynomial representation give a remaining interference voltage component in the sum signal. This residual error is usually negligible as regards the necessary measuring accuracy even for relatively small values of p so that a further increasing of the number if stored and processed sampled values is not worthwhile because of the disadvantages involved (circuitry expenditure, response delay).

Thus, the following holds for the method of interference voltage compensation described: -by the indicated storing, weighting and summation of (p + 1) sampled values the interference voltage varying non-linearly with time contained in the toal signal is compensated to the (p - 1 )th degree of the polynomial representing (approximately) the interference voltage function; -the remaining residual error can be made as small as desired by correspondingly increasing the number of stored and processed sampled values but this involves a corresponding increase in the response delay and possibly in the circuitry expenditure.

The effects indicated occur for any voltage present at the sampling instant which varies nonlinearly with time in the time interval considered in a manner which can be represented by a polynomial. Of particular importance is that the compensation to the (p - 1 )th degree is completely independent of the values of the polynomial coefficients a", a1, . . a,l. The same compensation circuit is thus effective in the same manner for very different polynomial representations so that in particular it is not disadvantageous if the polynomial representation of the voltage to be compensated varies in the course of time.

The type of useful signal on which the voltage to be compensated is superimposed is also of no significance to the compensation. The nature of the useful signal is only of significane as regards which remaining measurement signal is obtained after the compensation of the interference voltage at the output. In particular, it is not necessary for the useful signal to have opposite signs at consecutive sampling instants as assumed in the example of embodiment described above. For example, the arrangememt of Fig. 1 even gives a useful measurement signal when the magnetic field H does not change its direction but is alternately switched on and off and even when the magnetic field is switched between two different values of the same polarity.In all these cases the useful voltage is proportional to the flow periodically alternately with different coefficients and the measurement signal obtained at the output results from the difference of the alternately obtained useful voltage values multiplied by half the sum of the weighting factors. The interference voltage compensation described above remains completely unaffected.

However, uses of the method described are conceivable in which the sampled total voltage UG can be represented by a polynomial and is thus compensated to the (p - l)th degree. It is thereby possible for example to detect changes with time of a signal which exceed the (p - 1 )th degree.

Furthermore, for the interference voltage compensation described it is of no consequence if the sampled total signal has been subjected to certain pretreatments. It should only be ensured that the signal component to be compensated can be represented at the sampling point in the time interval considered by a polynomial.

Fig. 5 shows as example a modification of flow meter apparatus of Fig. 1 in which the total voltage tapped from the electrodes 3 and 4 is subjected prior to the sampling to a pretreatment usual in inductive flow measuring. The purpose of this pretreatment is to prevent a saturation of the amplifier 8 when the interference DC voltage contained in the total signal assumes a very high value.For this purpose between the differential amplifier 7 and the amplifier 8 a summation circuit 1 5 is inserted and a compensation circuit 1 6 is provided whose output signal is supplied to the second input of the summation circuit 1 5. The compensation circuit 1 6 includes an operational amplifier 1 7 whose inverting input is conneted to the output of the amplifier 8 and whose non-inverting input, which serves as reference as reference input, is grounded. To the output of the operational amplifier 1 7 a further sample and hold circuit 1 8 is connected which is again represented by a switch 84, a storage capacitor C4 and a highimpedance isolating amplifier A4.The output of the isolating amplifier 4 forms the output of the compensation circuit 1 6 which is connected to the summation circuit 1 5.

The switch S4 is actuated by control signals which are furnished by the output 6f of the control circuit 6 and illustrated in diagram H of Fig. 3. These control signals are short pulses which in each half period of the coil current I defined by the control signal A follow the sample signal E so that the switch S4 is briefly closed after each taking of a sampled value from the total signal. When the switch S4 is closed there is a closed regulation loop from the output of the amplifier 8 via the operational amplifier 1 7, the sample and hold member 1 8 and the summation circuit 1 5 to the input of the amplifier 8.This regulation loop brings the voltage at the inverting input of the operational amplifier 1 7, i.e. the output voltage of the amplifier 8, to the reference potential at the non-inverting input, i.e. ground potential. Thus at each compensation instant defined by the closing of the switch S5 the output of the sample and hold circuit 18 assumes a compensation voltage which is equal but opposite to the signal voltage simultane ously at other input of the summation circuit 1 5 and furnished by the output of the differential amplifier 7 so that the output voltage of the amplifier 8 is made zero.After opening of the switch S4, i.e. in the hold phase of the sample and hold circuit 18, the compensation voltage remains at the output of the sample and hold circuit 1 8 and this stored compensation voltage is added in the summation circuit 1 5 to the then present output voltage of the differential amplifier 7.

As before, the variation with time of the output voltage of the differential amplifier 7 corresponds to diagram C of Fig. 3. In contrast, diagram J of Fig. 3 shows the variation with time obtained by the effect of the compensation circuit 1 6 of the output voltage of the amplifier 8 which is subjected to the sampling. It differs from the voltage variation of the diagram C in that it is brought to zero in each compensation time interval defined by the closing of the switch 4 and after opening of said switch exhibits a variation starting from this value zero. The interference DC voltage contained in the output voltage of the differential amplifier 7 is compensated by the interference DC voltage component contained in the compensation voltage.

The useful voltage component contained in the compensation voltage then adds itself to the useful voltage component of the next half period contained in the output signal of the differential amplifier 7 because of the opposite sign. Only the interference voltage change occurring in the half period is then still superimposed on this doubled value of the useful voltage component. The output signal of the amplifier 8 therefore differs from the value zero in both directions only by twice the value of the useful signal and the superimposed interference voltage change. The amplifier 8 can thus have a high gain without any danger of saturation. In contrast.

the gain of the differential amplifier 7 is made so small that it cannot become saturated even with a high interference DC voltage.

As apparent from diagram J of Fig. 3 the total voltage present at the output of the amplifier 8 and subjected to the sampling still contains the variation with time of the superimposed interference voltage which is compensated by the subsequent weighted summation of (p + 1) sampled values. However, the preliminary compensation gives two additional advantages: 1. Due to the preliminary compensation the degree of the polynomial representing the interference voltage at the point C is lowered for the evaluation at the point J. Thus, with respect to the interference voltage at the point C, i.e. at the output of the differential amplifier 7, with (p + 1) stored and processed values a compensation up to pth degree is obtained.

2. By the preliminary compensation the useful voltage component in each sampled value is doubled so that the measurement voltage UM obtained at the output of the storage circuit 14 has twice the value as in the case of Fig. 1 for identical values of the magnetic field.

Fig. 6 shows a further possible pretreatment of the total signal subjected to the sampling by a modification of the arrangement of Fig. 1. This modification resides in that between the output of the amplifier 8 and the input of the sample and hold circuit 10 an integrator 20 is inserted which is formed by an operational amplifier 21 in whose feedback circuit a capacitor C5 is provided. Between the output of the amplifier 8 and the inverting input of the operational amplifier 21 a switch S5 is inserted whose closure time defines the integration time interval. A further switch S6 parallel to the capacitor C5 serves to discharge said capacitor to set the initial condition of the integration.The switches S5 and S6 are actuated by control signals which are furnished by further outputs of the control circuit 6.

The integration time interval defined by closure of the switch S5 may extend for example in each sampling period from the start of the stationary state (after decay of the transient effect) to the sampling instant. The sampled total voltage is then no longer the output voltage of the amplifier 8 but a voltage value obtained by integration of this output voltage over a defined time interval. When there is a non-linear interference voltage change at the output of the amplifier 8 non-linear interference voltage changes are still contained in the integrated voltage values and are eliminated in the manner described by the weight summation of (p + 1) sampled values to the (p - 1 )th degree of the polynomial at the output of the amplifier 8.

The integration circuit 20 of Fig. 6 can of course also be used in conjunction with the preliminary compensation of Fig. 5.

The invention is of course not limited to the use of the circuit arrangements for the signal porcessing illustrated as example in Figs. 1, 5 and 6. On the contrary, any suitable circuit arrangement can be used which is able to store (p + 1) sampled values, multiply the sampled values by the indicated weighting factors and summat6 the weighted sampled values. In particular, for this purpose instead of the analog circuit described above digital circuits may also be used.

Fig. 7 shows as example an embodiment of the arrangement for carrying out the method described comprising digital circuits. It differs from the arrangement of Fig. 1 in that to the output of the amplifier 8 an analog sample and hold circuit 30 of the type already described is connected, comprising a switch S7, a torage capacitor C7 and a high-impedance isolating amplifier A7. The switch S7 is actuated by the control pulses E from the output 6c of the control circuit 6 so that the output singnal of the amplifier 8 is sampled in the same manner as in the arrangement of Fig. 1.

To the output of the sample and hold circuit 30 an analog/digital converter 31 is connected which converts every analog sampled value appearing at the output of the sample and hold circuit 30 to a digital sampled value represented by a binary code group. The binary code groups furnished by the analog/digital converter 31 are for example entered in parallel into a digital shift register 32 which comprises (p + 1) digital register stages 32o ..32k...32p, each of which is adapted to receive a binary code group representing a digital sampled value.

The digital sampled values are shifted through the shift register 32 at the sampling frequency determined by the control pulses E. The stage outputs of the digital shift register 32 are connected to a digital weighting means 33 which multiplies each digital sampled value in the digital shift register 32 by one of the previously defined weighting factors C0... Gk. . .Gp. The sampled values weighted in this manner are added in a digital summation circuit 34.

It is immediately apparent that the digital circuits of Fig. 7 operate in the same manner as the analog circuits of Fig. 1 so that a non-linear interference voltage at the putput of the amplifier 8 is eliminated to the (p - 1 )th degree in the sum signal obtained at the output of the digital summation circuit 34 whilst the useful signals are retained in the manner outlined.

As in the arrangement of Fig. 1 a controllable inverting circuit 35, also made digital in this case, can be connected to the output of the digital summation circuit 34.

The operation of the digital circuits is synchronized by control signals from the control circuit 6.

The construction of the digital circuits 32, 33, 34, 35 need not be described in detail because it is obvious to the expert. In particular, these circuits may be realized by modern technology in the form of a suitably programmed microcomputer. The microcomputer solution in particular has the advantage that the number of stored and processed sampled values can be increased to any desired extent without increasing the circuit expenditure.

Of course, other modifications obvious to the expert can be made to the circuits described.

For exemple, instead of the parallel weighting and summation illustrated in Figs. 1, 5 and 6 a serial processing may also take place in which the sampled values are integrated in succession with corresponding weighting.

Table binomial Function Values of the Function F (t) coefficient n P F0 = F(t0) = a0 + a1t + a2t2 + ... aiti + ... antn = # aiti + # # i=0 0 n P F1 = F(t0 + #t) = a0 + a1(t + #t) + a2(t + #t)2 + ... ai(t + #t)i + ... an(t + #t)n = # ai(t + #t)i - # # i=0 1 n P F2 = F(t0 + 2#t) = a0 + a1(t + 2#t) + a2(t + 2#t)2 + ... ai(t + 2#t)i + ... an(t + 2#t)n = # ai(t + 2#t)i + # # i=0 2 n P Fk = F(t0 + k#t) = a0 + a1(t + k#t) + a2(t + k#t)2 + ... ai(t + k#t)i + ... an(t + k#t)n = # ai(t + k#t)i (-1)k . # # i=0 k n P Fp = F(t0 + p#t) = a0 + a1(t + p#t) + a2(t + p#t)2 + ... a1(t + p#t)i + ... an(t + p#t)n = # ai(t + p#t)i (-1)p . # # i=0 P

Claims (12)

1. Method of at least partially compensating an electrical signal varying non-linearly with time, characterized in that (p + 1) sampled values, (UAo to UAp) taken at equal time intervals (At) from the electrical signal (Us) or from a total signal (UG) containing the electrical signal are multiplied by weighting factors Gk=C . (kP) . (- l)kwith k=0, 1, . . p; C = const.

proportional to the binomial coefficients (kip) and summed to form the sum signal p k = O Gk. UAk

2. Method according to claim 1 in which the electrical signal to be compensated is an interference signal which is superimposed on a useful signal which periodically alternately assumes at least two different states, characterized in that the sampled values are taken periodically alternately at different states of the useful signal (UN).

3. Method according to claim 2, characterized by its use in magnetic-inductive flow measurement with the aid of a magentic field changing periodically between at least two states for compensating the interference voltage which is superimposed on the flow-proportional useful voltage in the electrode voltage.

4. Method according to claim 3, characterized in that on the electrode voltage a compensation voltage is superimposed which at a preceding state of the magent field has been formed in such a manner that the electrode voltage at this preceding state has been compensated to zero, and that the sampled values are taken from the electrode voltage compensated in this manner.

5. Method according to claim 1, characterized in that the electrical signal to be compensated or the electrical total signal is integrated in each sampling period over a predetermined integration time interval and that the sampled values are taken from the integrated signal.

6. Arrangement for carrying out the method according to claim 1, characterized by a periodically actuable sampling circuit (10p; 30) to the input of which the electrical signal to be compensated or the total signal is applied, a storage means (10; 32) for storing (p + 1) sampled values, a weighting means (11; 33) which multiplies each of these sampled values stored in the storage means (10; 32) by an associated weighting factor (C0. ' Gp) and by a summation circuit (12; 34) for summing the weighted sampled values furnished by the weighting means (11; 33).

7. Arrangement according to claim 6, characterized in that the sampling circuit (10p), the storage means (10), the digital weighting means (11) and the summation circuit (12) are formed by analog circuits.

8. Arrangement according to claim 7, characterized in that the sampling circuit (10p) and the storage circuit (10) are formed by an analog shift register (10) whose input register stage (20p) forms the sampling circuit.

9. Arrangement according to claim 7 or 8, characterized in that the weighting means (11) includes for each stored analog sampled value an amplifier (11 . .11p) whose gain corresponds to the weighting factor (C0. . Gp).

1 0. Arrangement according to claim 6, characterized in that the sampling circuit (30) is followed by an analog/digital converter (31) and that the storage means (32), the weighting means (33) and the summation circuit (34) are formed by digital circuits.

11. Arrangement according to claim 10, characterized in that the storage means (32) is formed by a digital shift register.

12. Arrangement according to claim 10, characterized in that the storage means (32), the weighting means (33) and the summing circuit (34) are formed by a correspondingly programmed microcomputer.

1 3. A method ofv at least partially compensating ior a signal which varies non-linearly with time substantially as hereinbefore described with reference to Figs. 1 to 4, Fig. 5, Fig. 6 or Fig.

7, of the accompanying drawings.

1 4. Apparatus for at least partially compensating for a signal which varies non-linearly with time, substantially as hereinbefore described with reference to Figs. 1 to 4, Fig. 5, Fig. 6 or Fig.

7 of the accompanying drawings.

1 5. Apparatus for the elimination of an electrical signal varying non-linearly with time, comprising means for sampling the signal or a signal containing the signal at predetermined equal time intervals, means for multiplying each sampled value by a weighting factor Gk, where Gk = C . (kip) . ( l)k Nd C is a constant, k is the sample to be multiplied, and (kip) is the binomial coefficient, where (p + 1) is the number of samples, and means for summing the weighting sample signals.