GB2151823A - Polarization voltage regulating circuit for field-effect transistor integrated circuit substrate - Google Patents
Polarization voltage regulating circuit for field-effect transistor integrated circuit substrate Download PDFInfo
- Publication number
- GB2151823A GB2151823A GB08430148A GB8430148A GB2151823A GB 2151823 A GB2151823 A GB 2151823A GB 08430148 A GB08430148 A GB 08430148A GB 8430148 A GB8430148 A GB 8430148A GB 2151823 A GB2151823 A GB 2151823A
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- GB
- United Kingdom
- Prior art keywords
- substrate
- voltage
- oscillator
- circuit
- integrated circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 51
- 230000010287 polarization Effects 0.000 title claims description 13
- 230000005669 field effect Effects 0.000 title claims description 12
- 230000001105 regulatory effect Effects 0.000 title claims description 9
- 238000004519 manufacturing process Methods 0.000 description 6
- 230000000903 blocking effect Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
- G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
- G05F3/205—Substrate bias-voltage generators
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Radar, Positioning & Navigation (AREA)
- Electromagnetism (AREA)
- Automation & Control Theory (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Nonlinear Science (AREA)
- Computer Hardware Design (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Control Of Electrical Variables (AREA)
Abstract
The regulator comprises an inverter 4 made up of two depletion transistors T3, T4. The input 5 of the inverter, ie the gate electrode of the active transistor T3, is directly connected to the substrate 1 of the integrated circuit, and the inverter output 6 is connected to an on/off control terminal of an oscillator 2 which supplies a charge generator 3 connected to the substrate 1. Operation of the oscillator 2 is inhibited when the voltage of the substrate 1 exceeds a preset level. <IMAGE>
Description
SPECIFICATION
Improvements in or relating to polarization voltage regulating circuits for field-effect transistor integrated circuit substrates
The invention relates to voltage generators for polarizing the substrates of field-effect transistor integrated circuits, and relates more particularly to a regulator for such a generator.
As is known, in some field-effect transistor integrated circuits the substrate has to be maintained at a different potential from one or the other of the potentials of the circuit supply terminals. In the case of n-channel MOS (methal-oxide-semiconductor) transistor integrated circuits, the potential must be lower than the negative supply terminal.
Polarization of the substrate influences many operating parameters such as the response time of the circuit and the threshold voltage of the transistors, both depletion and enhancement transistors. During the design phase, therefore, the polarization is determined on the basis of the desired performance of the circuit.
Usually, the substrate polarization voltage is generated and regulated by a suitable circuit in the integrated circuit. The regulating circuit may for example operate by following the deviation of the enhancement transistor threshold voltage from a preset reference voltage, which may be a fraction of the supply voltage, and may thus control a charge generator connected to the substrate.
An integrated circuit must be designed to allow for the scatter in operating parameters due to inevitable variations in the manufacturing process. In practice, care must be taken that all embodiments of an integrated circuit manufactured by the same process operate equally well. In the particular case of an MOS transistor integrated circuit having a channel of the same type, a threshold voltage can be fixed for the enhancement transistors and the circuit parameters can be calculated so that the circuit operates properly at all voltages of the substrate in the range of variability due to scatter in the transistor characteristics. Usually, however, this criterion cannot ensure optimum values for the threshold voltage of the depletion transistors; on the contrary, compromises have to be made and result in difficulties in design and often critically impair the operation of the circuit.
According to the invention, there is provided a circuit as defined in the appended claim 1.
It is thus possible to provide a regulator for a voltage generator for polarizing the substrate of a field-effect transistor integrated circuit where the substrate voltage is adjusted to an optimum value for the characteristics of both types of transistors and is substantially independent of variations in manufacturing parameters and in the supply voltage.
The invention will be further described, by way of example, with reference to the accompanying drawings, in which:
Figure 1 is a block diagram of a voltage generator for polarizing a substrate for incorporating a regulator constituting a preferred embodiment of the invention;
Figure 2 shows a circuit used in a regulator of know type;
Figures 3a and 3b are graphs illustrating the limits of the prior art;
Figure 4 shows a circuit used in a regulator constituting a preferred embodiment of the invention; and
Figures 5a and 5b show transfer curves of the circuits of Figures 2 and 4, respectively.
In Figure 1 of the drawings, block 1 denotes the substrate of a chip of semiconducting material on which an integrated circuit, eg an n-channel MOS transistor circuit, is formed. Block 2 represents a controlled oscillator, block 3 is a generator of negative charges and block 4 is a level detector. A power supply, not shown, supplies a voltage to the integrated circuit, the oscillator 2 and the level detector 4. The charges produced by the generator 3 bring the substrate 1 to a more negative voltage than that of the negative terminal of the power supply. The level detector or regulator 4 senses the voltage at its input terminal 5 and actuates the oscillator 2, enabling or blocking operation thereof via a connection 6, depending on the detected voltage, so as to supply or not to supply the charge generator 3 and, finally, maintain the substrate 1 at the desired negative voltage.In some known applications, eg as described in US-PS 4142 144, the voltage is determined by fixing a reference voltage which is a fraction of the supply voltage.
The regulator disclosed in this earlier patent specification and shown in Figure 2 comprises two field-effect transistors T1 and T2, the first being of the enhancement type and the second of the depletion type, connected to form an inverting circuit. More particularly transistor T2, which acts as a load resistance, has its gate electrode connected to the source electrode and to the drain electrode of the transistor T1,whereas its drain electrode is connected to the positive supply terminal Vcc.The transistor T1,which serves as the active component, has its source electrode connected to the negative terminal of the supply (indicated by the earth symbol) and its gate electrode connected to the intermediate tap of a voltage divider made up of two resistors R1 and R2 inserted between the supply terminals. Note that the connection 5 to substrate 1 is an essential part of the structure and is therefore indicated by a broken line in Figure 2 to distinguish it from the other electrical connections.
The conduction of the transistor 1 depends on the voltage VR imposed by the voltage divider between the gate and the source electrodes and also on its threshold voltage VTwhich in turn depends on the substrate voltage Vaa. The relation (well known to the skilled addressee) between VT and V55 is the following:
where KBE iS the "body" effect coefficient, VTo iS the threshold voltage of the transistor when VBB = O, and PJINV iS the surface inversion potential.
If we make this relation explicit relative to V55, we obtain the substrate voltage VBB necessary to have a given threshold voltage VT:
The values of resistors R1 and R2 can be chosen so as to supply a reference voltage VR equal to the optimum value required for the threshold voltage VT of the enhancement transistors. The transistor T1 stops conducting when the substrate 1 reaches a negative voltage which can be calculated by relation (1) such that
VT iS equal to VR. The output terminal 6 of the detector 4 will be at a high or low voltage depending on the conduction of transistor T1.The state of the output of the detector 4 is used to adjust the operating time of the oscillator 2, so that the substrate voltage V55 stabilizes at a preset negative value depending on the reference voltage VR.
The graph in Figure 3a represents the variation in the threshold value VT of an enhancement transistor of the kind in question formed on substrate 1, depending on the polarization voltage -VBB of the substrate.
Owing to the variability of the manufacturing parameters, the curve for a real transistor will be within a range of values bounded by two curves, indicated by 7 and 8 in the drawing. If a reference voltage VR and consequently a threshold voltage VTj are fixed, the polarization voltage of the substrate V55, adjusted by the circuit in Figure 1, will have a value between two extreme values V1 and V2 defined, as shown in Figure 3a, by the points of intersection between curves 7 and 8 and the abscissa corresponding to the voltage VTi. The extent of the interval V1 - V2 can be found analytically from expression (1), which relates V55 to VT, if we know the extreme values of the parameters which vary with the manufacturing conditions.In practice, with a threshold voltage VTi = 1 volt, corresponding to an ideal substrate voltage VBBid = -3 V, the real voltage V55 can vary between -2 and V.
The graph in Figure 3b shows the variation in the threshold VT of a depletion transistor of the kind in question in the same integrated circuit, depending on the polarization voltage -VBB of the substrate. In this case also, the real curve is within a range of values bounded by two curves 9 and 10. The threshold voltage of a real depletion circuit will be between a value V3 defined by the intersection between the bottom curve 10 and the ordinate corresponding to the voltage V1, and a value V4 defined by the intersection between the upper curve 9 and the ordinate of voltage V2. As the drawing shows, the substrate voltage VBB may be sufficient to make the depletion transistor threshold positive, so that the transistor cannot operate properly.
There is thus a greater variation between the actual threshold voltages and the ideal values used in designing a circuit comprising a voltage generator for polarizing a substrate controlled as shown in the known circuit in Figure 2. In addition, account must be taken ofvariations and flucuations in the supply voltage, which have a direct effect on the threshold voltages since the reference voltage VR varies with the supply voltage Vcc. This dependence is useful in some applications but undesirable in many cases.
Figure 4 shows a level detector 4forming part of a preferred embodiment of the invention and comprising an inverter made up of two transistors T3 and T4, both of the depletion type. More particularly, transistorT4 has its gate electrode connected to the source electrode so as to form the load of the transistor T3, which operates as the active component. The drain electrode of T4 and the source electrode of T3 are respectively connected to the positive terminal +Vcc and the negative terminal (earth) of the supply source. The junction between the two transistors forms the detector output terminal 6 and the gate electrode oftransistorT3 is the input terminal 5 which, in the present case, is a direct electrical connection to substrate 1.
In operation, if the gain of T3 is much greater than that of T4, the polarization voltage V55 of the substrate will be adjusted to the same value as the threshold voltage of transistor T3. If voltage V55 is less negative than the threshold voltage of transistorT3, the transistor T3 will be conductive, and consequently the output 6 will be "low" and the oscillator 2 is enabled to operate and supply the generator 3, which in turn tends to increase the voltage of the substrate and consequently the voltage of the gate electrode of the transistor T3.
When the voltage VBB becomes more negative than the threshold voltage of T3, the transistor stops conducting, the output 6 becomes "high", and the oscillator 2 is blocked.
The voltage VB5 iS thus regulated by directly using, as the reference voltage, the threshold voltage of the depletion transistor T3, which is a quantity determined by the manufacturing parameters. This feature will be better appreciated by considering the transfer curves of the level regulator 4 shown in Figure 2 and that shown in Figure 4.
To simplify the explanation, we shall hereinafter consider the case in which the gain of the inverters making up the level detectors is practically infinite, which is equivalent to saying that switching, ie the change from blocking to conducting or vice versa, of transistors T1 and T3 is practically instantaneous. In principle, however, the present explanation applies to any value of the gain.
Let V5 and V6 be the input and output voltages respectively of the level detector 4. In the case of the known circuit shown in Figure 2, transistor T1 is switched when the substrate voltage VBB is at a value such that the threshold voltage VT1 of transistor T1 is equal to the reference voltage VR. If we put the following in relation 1):
VT = VT1 = VR and VBB = V5 switching will occur at a voltage:
As can be seen, the input voltage V5c at which switching occurs will depend on the square of the reference voltage VR and the square of the threshold voltage T1 for V55 = 0 indicated by VTo(Tl).
The graph in Figure 5a shows the variation in the two transfer curves Ve = f(V5) of the known level detector corresponding to the two limit values which the voltage VTolT1) can assume owing to the scatter in the manufacturing parameters. In various embodiments of the known circuit, the switching voltage V5c and consequently VBB may vary as already stated, eg between -2 and -4 V. If we also allow for the possible variation in the supply voltage (typically + 10%), the resulting V55 will have been larger variations.
In the case of the level regulator shown in Figure 4, the transistor T3 switches when the substrate voltage V55 is equal to the threshold voltage VT3 of transistor T3. Since the input voltage of this circuit is V5 = VBB and if we put VT = VT3 = V5c in relation (1 ) and VTo = VTO(T3))I we obtain:
which is a quadratic equation in V50. If we solve this equation and disregard the imaginary solution, we obtain: V5c = VTo(T3) + KBE2 + KBE VTo(T3) + KBE2 - KBE #INV + #INV - #INV
2 4 Thus, the switching voltage V5c is equal to the threshold voltage VTo(T3) apart from a term containing the same voltage in the square root and a constant.Since the coefficient KBE in integrated circuits manufactured by modern processes is relatively small, typically around 0.4 V1'2, the voltage V5c deviates only slightly from the threshold voltage VTo (T3).
In practice, as shown in Figure 5b, the switching voltage V5c and therefore VBB in various embodiments of the circuit will typically vary between about -2.7 and about -3.3 V.
Finally, the substrate voltage does not depend on the supply voltage.
Although a single embodiment of the invention has been illustrated and described, many variations are of course possible within the scope of the invention. For example, the level detector for the substrate voltage need not be an inverter but can be another type of switching circuit which, like the described inverter, is controlled by a depletion transistor having its gate electrode directly connected to the substrate.
Claims (4)
1. A circuit for regulating the polarization voltage of the substrate of a field-effect transistor integrated circuit with a channel having only one type of conductivity, comprising
two terminals for connecting to a voltage supply;
an oscillator having an output terminal and a control terminal;
a charge generator connected between the oscillator output terminal and the substrate and arranged to supply charges to the substrate when the oscillator is in operation; and
a level detector sensitive to the voltage of the substrate and having an output terminal connected to the oscillator control terminal, the detector being arranged to inhibit operation of the oscillator when the substrate voltage exceeds a preset level;
the level detector comprising a depletion transistor whose gate electrode is directly connected to the substrate.
2. A circuit as claimed in claim 1, in which the level detector comprises an inverter connected between the two supply terminals, the active component of the inverter being the depletion transistor whose load is a second depletion transistor, the junction between the two transistors being the output terminal of the level regulator.
3. A circuit for regulating the polarization voltage of the substrate of a field-effect transistor integrated circuit with a channel having only one type of conductivity, substantially as hereinbefore described with reference to and as illustrated in Figures 1 and 4 of the accompanying drawings.
4. A field-effect transistor integrated circuit with transistor channels having only one type of conductivity, including a circuit as claimed in any one of the preceding claims.
4. A field-effect transistor integrated circuit with a channel having only one type of conductivity, including a circuit as claimed in any one of the preceding claims.
New claims or amendments to claims filed on 28 January 1985
Superseded claims 1,3 and 4
New or amended claims:
1. A circuit for regulating the polarization voltage of the substrate of a field-effect transistor integrated circuit with transistor channels having only one type of conductivity, comprising two terminals for connecting to a voltage supply; an oscillator having an output terminal and a control terminal; a charge generator connected between the oscillator output terminal and the substrate and arranged to supply charges to the substrate when the oscillator is in operation; and a level detector sensitive to the voltage of the substrate and having an output terminal connected to the oscillator control terminal, the detector being arranged to inhibit operation of the oscillator when the substrate voltage exceeds a preset level; the level detector comprising a depletion transistor whose gate electrode is directly connected to the substrate.
3. A circuit for regulating the polarization voltage of the substrate of a field-effect transistor integrated circuit with transistor channels having only one type of conductivity, substantially as hereinbefore described with reference to and as illustrated in Figures 1 and 4 of the accompanying drawings.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
IT23930/83A IT1220982B (en) | 1983-11-30 | 1983-11-30 | CIRCUIT REGULATOR OF THE POLARIZATION VOLTAGE OF THE SUBSTRATE OF AN INTEGRATED CIRCUIT WITH FIELD-EFFECT TRANSISTORS |
Publications (2)
Publication Number | Publication Date |
---|---|
GB8430148D0 GB8430148D0 (en) | 1985-01-09 |
GB2151823A true GB2151823A (en) | 1985-07-24 |
Family
ID=11210957
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08430148A Withdrawn GB2151823A (en) | 1983-11-30 | 1984-11-29 | Polarization voltage regulating circuit for field-effect transistor integrated circuit substrate |
Country Status (6)
Country | Link |
---|---|
JP (1) | JPS60157248A (en) |
KR (1) | KR850004357A (en) |
DE (1) | DE3443868A1 (en) |
FR (1) | FR2555774B1 (en) |
GB (1) | GB2151823A (en) |
IT (1) | IT1220982B (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4794278A (en) * | 1987-12-30 | 1988-12-27 | Intel Corporation | Stable substrate bias generator for MOS circuits |
GB2256950A (en) * | 1991-06-17 | 1992-12-23 | Samsung Electronics Co Ltd | Sensing and controlling substrate voltage level |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0015342A1 (en) * | 1979-03-05 | 1980-09-17 | Motorola, Inc. | Substrate bias regulator |
EP0029681A2 (en) * | 1979-11-22 | 1981-06-03 | Fujitsu Limited | Bias-voltage generator |
EP0032588A2 (en) * | 1979-12-27 | 1981-07-29 | Kabushiki Kaisha Toshiba | Substrate bias generation circuit |
EP0051532A2 (en) * | 1980-11-03 | 1982-05-12 | FAIRCHILD CAMERA & INSTRUMENT CORPORATION | Regulated MOS substrate bias voltage generator for a static random access memory |
-
1983
- 1983-11-30 IT IT23930/83A patent/IT1220982B/en active
-
1984
- 1984-11-28 FR FR8418097A patent/FR2555774B1/en not_active Expired
- 1984-11-29 GB GB08430148A patent/GB2151823A/en not_active Withdrawn
- 1984-11-30 KR KR1019840007559A patent/KR850004357A/en not_active Application Discontinuation
- 1984-11-30 DE DE19843443868 patent/DE3443868A1/en not_active Withdrawn
- 1984-11-30 JP JP59253930A patent/JPS60157248A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0015342A1 (en) * | 1979-03-05 | 1980-09-17 | Motorola, Inc. | Substrate bias regulator |
EP0029681A2 (en) * | 1979-11-22 | 1981-06-03 | Fujitsu Limited | Bias-voltage generator |
EP0032588A2 (en) * | 1979-12-27 | 1981-07-29 | Kabushiki Kaisha Toshiba | Substrate bias generation circuit |
EP0051532A2 (en) * | 1980-11-03 | 1982-05-12 | FAIRCHILD CAMERA & INSTRUMENT CORPORATION | Regulated MOS substrate bias voltage generator for a static random access memory |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4794278A (en) * | 1987-12-30 | 1988-12-27 | Intel Corporation | Stable substrate bias generator for MOS circuits |
GB2256950A (en) * | 1991-06-17 | 1992-12-23 | Samsung Electronics Co Ltd | Sensing and controlling substrate voltage level |
Also Published As
Publication number | Publication date |
---|---|
IT1220982B (en) | 1990-06-21 |
GB8430148D0 (en) | 1985-01-09 |
JPS60157248A (en) | 1985-08-17 |
FR2555774B1 (en) | 1989-01-13 |
DE3443868A1 (en) | 1985-06-13 |
IT8323930A0 (en) | 1983-11-30 |
FR2555774A1 (en) | 1985-05-31 |
KR850004357A (en) | 1985-07-11 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |