GB2149154A - Improvements in and relating to variable frequency oscillators - Google Patents

Abstract

A variable frequency oscillator comprises three operational amplifiers (A1, A2, A3) respectively configured as a pair of cascaded integrators (A1, A2) and an inverter (A3) connected in a closed loop. A further signal of variable gain is provided to the inverter (A3) by way of a multiplier (4) which respectively receives the output signal from the first integrator (A1) and an output signal from an adding circuit (7) for summing the outputs from a pair of squaring circuits (5, 6) respectively connected to the outputs of two integrators (A1, A2) to provide a d.c. signal representative of the amplitude of the a.c. output signal of the oscillator. The gain of the feedback signal is determined by a d.c. reference signal applied at a further input (8) of the adding circuit, to control the amplitude of the oscillator output signal. <IMAGE>

Description

SPECIFICATION Improvements in and relating to variable frequency oscillators This invention concerns improvements in and relating to variable frequency oscillators, and more especially to sine wave oscillators arranged to provide fast stabilisation of the amplitude of the sine wave following a change in frequency.

A known type of sine wave oscillator comprises two integrators and an inverter connected in cascade in a closed loop. With appropriate matching of the respective components oscillation will occur at a given frequency, with each of the integrators providing a 90 phase lag, and the inverter providing a 180 phase lag to complete the 360 phase change required in the loop. In practice, it is necessary in order to ensure oscillation of the circuit, and to control the amplitude of the output signal that a feedback signal be applied to the input of the inverter from the output of the first of the two integrators.The control of the output amplitude of the oscillator is provided by introducing a variable attenuation of the feedback signal in response to a comparison of the amplitude of the sine wave with a d.c. reference signal. The derivation of an appropriate d.c. signal as a measure of the sine wave output of the oscillator in order to enable comparison with the d.c. reference voltage has, however, hitherto posed a considerable problem. Various methods for the derivation of such a signal in a sufficiently short time to enable rapid stabilization of the output signal of the oscillator have hitherto been proposed.Such proposals that involve acceptably simple circuitry have involved the derivation of a resultant d.c. signal by the rectification of a plurality of phase shifted signals having an amplitude corresponding to that of the oscillator output signal, see for example "Fast Amplitude Stabilisation of an RC Oscillator" by Vannerson and Smith, IEEE Journal of Solid State Circuits, Vol. SC9 No.

4, August 1974, and "Fast Amplitude Stabilisation of an RC Oscillator" by Filanovksy, Piskarev and Stromsmoe, Wireless World, July 1982. Whilst such hitherto proposed solutions do enable reduction of the filter time in comparison with a d.c. voltage derived from the usual half wave rectifier, the fact that the d.c. voltage under consideration is still derived by rectification necessarily causes a certain unwanted ripple in the resultant signal, and thus a consequent distortion of the sine wave at the output of the oscillator.

It is accordingly an object of the present invention to provide a sine wave oscillator of the kind initially referred to, having an improved means for deriving the required d.c.

voltage representative of the amplitude of the sine wave at the output of the oscillator.

In accordance with the present invention, there is provided a sine wave oscillator of the kind comprising a pair of cascaded integrators and an inverter connected in a closed loop, with the output of the first integrator connected to provide a feedback signal to the input of the integrator, and means for varying the gain of the feedback signal in accordance with the amplitude of the output signal of the oscillator, characterised in that the means for varying the gain of the feedback signal includes means for deriving signals, respectively representing the squares of the output signals of the integrators and means for summing the said derived signals in order to provide a resultant d.c. signal representative of the amplitude of said output signal.

As will be explained in more detail below, by squaring the output signal from each of the integrators and summing the resultant signals, there is obtained a d.c. signal which is ripple free and is instantaneously representative of the amplitude of the oscillator signal.

Thus, by controlling the gain of the feedback signal in accordance with this d.c. signal rapid and accurate stabilisation of the amplitude of the sine wave signal at the output of the oscillator can be achieved with very low distortion.

The invention is illustrated by way of example in the accompanying drawings, in which: Figure 1 is a block circuit diagram of a sine wave oscillator in accordance with the invention, Figure 2 is a more detailed circuit diagram illustrating in the case of a preferred embodiment of the invention in the closed loop formed by the integrators and inverter, together with an associated variable gain control circuit included in the path of the feedback signal, and Figure 3 is a circuit diagram of a means for deriving from the signal voltages appearing in the closed loop of the circuit of Fig. 2, a d.c.

control signal.

Referring to Fig. 1, there is shown diagrammatically the circuit of an oscillator in accordance with the invention, which comprises three operational amplifiers Al, A2, A3, connected in cascade to form a closed, phase controlled loop. The operational amplifiers Al and A2 are configured as matched integrators, whereas the operational amplifier A3 is configured as an inverter. The manner in which the operational amplifiers are respectively configured to operate as integrators and an inverter will be well known to those skilled in the art, and will not therefore be described in further detail. It will also be understood that the operational amplifiers are fed from a balanced power supply and operated in the common mode, and the relevant connections to the power supply are omitted from the diagrammatic drawing for simplicity.

The output from the oscillator is indicated at 1, and is derived from the output of operational amplifier A2. Phase-locking of the oscillator is achieved by means of a feedback signal derived from the output 2 of operational amplifier Al and applied to the input 3 of operational amplifier A3, via a multiplier or variable gain element 4. The arrangement as so far described corresponds to that of a well known oscillator circuit for the generation of a sine wave output signal, and it is further known that the amplitude of the sine wave output signal can be controlled by varying the gain provided by the element 4 in response to comparison of the amplitude of the output signal with a d.c. reference voltage.

In accordance with the invention, the derivation of a d.c. signal representative of the amplitude of the output signal of the amplifier is effected by squaring the respective output signals of the operational amplifiers Al, A2, and summing the resultant signals. Thus, as indicated in Fig. 1, the output of amplifier Al is connected to a squaring circuit indicated diagrammatically at 5, whereas the output of amplifier A2 is connected to a similar squaring circuit 6, and the output of the respective circuits 5 and 6 are connected to an adding circuit indicated diagrammatically at 7.

From a consideration of the phase relationship of the signals appearing at the various points in the closed loop containing the operational amplifiers Al, A2 and A3, it will be seen that since there is a 90 phase lag between the respective outputs of amplifier Al and amplifier A2, plus the 180 inversion of the operational integrator, if the instantaneous value of a sine wave signal of peak amplitude A appearing at the output of amplifier Al is represented by A cos cot, then the instantaneous amplitude of the corresponding signal appearing at the output of amplifier A2 will be - A sin cot.Thus, the signal obtained by squaring the output of each integrator and adding the resultant signals can be represented by the following formula: (A sin Wt)2 +(~A cos Wt)2 = A2 (sin2 cot + cos2 cot) A2 (sin cot)2+A2(-cos)cot)2 (1) = A2 (sin wot)2 + (cos cot)2) But sin2 0 + cos2 a = 1 therefore, it will be seen that the resultant signal corresponds to the d.c. amplitude A2 which is a measure of the a.c. amplitude A and is derived virtually instantaneously.By applying a d.c. reference voltage "V ref" to a subtracting input 8 of the adding circuit 7, there is obtained at an output 9 of the latter circuit a control voltage A2 - V ref which is applied to the multiplier circuit 4 together with the signal - A cos cot from the output of operational amplifier Al, so that the resultant feedback signal applied to the input 3 of amplifier A3 has the magnitude (A2 - V ref) (- A cos xt).

With reference to Figs. 2 and 3, there will now be described a practical embodiment of an oscillator circuit operating on the principle described above.

Those components in Figs. 1 and 2 which correspond with those of Fig. 1 have been indicated by the same reference numerals, and where appropriate, component values and types are indicated in the Figs. and will not be referred to in further detail herein. The circuit is operated from a balanced power supply of + 1 5 and - 1 5 volts, which the connections to the power supply being indicated in the drawings by the usual conventions. All common connections to the zero voltage rail have been indicated in the drawings as terminating in triangles.

As in the case of Fig. 1, the operational amplifiers Al, A2 and A3 of Fig. 2 are respectively configured as a pair of balanced integrators and an inverter. The time constants of the integrators provided by operational amplifiers Al and A2 and thus the frequency of the oscillator can be varied by optional selection of the input resistors and feedback capacitors associated therewith, and for simplicity there are shown in each case only two input resistors R1, R2 and R1', R2' respectively and two feedback capacitors C1, C2 and C1', C2' respectively, together with selector switches S1, S2, S3 and Sol', S2' and S3', the latter switches either being ganged mechanical switches or simultaneously actuatable electronic switches.The amplifier A3 has an input resistor R3 and feedback resistor R4 of equal value so that the net gain of the inverting amplifier is unity.

The multiplier 4 of Fig. 1 is provided by the circuitry shown in Fig. 2 as enclosed within the broken lines 4, and comprises a first input 10 connected to the output of amplifier Al, a second input 11 arranged to receive a d.c.

control voltage derived in a manner to be described below, and an output 1 2 coupled to the inverting input of the amplifier A3. The input 10 is connected to the input of an inverting amplifier A4 configured to provide a gain of unity, so that if the signal at the output 2 from amplifier Al and applied at the input 10 is A cos cot then the output signal from the output 1 3 of amplifier A4 will be - A cos cot. Between the respective points 10 and 1 3 and the output 12 of multiplier 4 there are matched voltage divider networks provided by a resistor R5 and transistor TR1 connected in series between the input 10 and the common zero voltage rail, a corresponding resistor R6 and transistor TR2 connected in series between output 1 3 of amplifier A4 and the zero voltage rail, and matched resistors R7 and R8 connected respectively from the tapping between resistor R5 and transistor TR1 to the output 1 2 and from the tapping between resistor R6 and transistor TR2 to the output 1 2. Ignoring the effect of transistors TR 1 and TR2 and the associated bias network, the net effect is thus to superimpose upon the loop voltage appearing at input 3 of amplifier A3 a feedback voltage which is the sum of the respective voltages appearing at points 10 and 13, which are equal and opposite and thus cancel out.However, since the transistors TR1 and TR2 provide current paths to the zero voltage rail, the actual feedback voltage is. dependent upon the relative states of conductivity of transistors TR1 and TR2, which in turn is governed by the d.c. voltage applied at input 11, as will be described below.

A so-called current mirror 14, for example of type TLO 12 provides current paths between an input 1 5 and a terminal 1 6 connected to the negative voltage rail, on the one hand, and between an output 1 7 and the terminal 1 6 on the other hand. In known manner such a device operates to cause any current flowing between terminals 1 5 and 1 6 to be mirrored by a corresponding current flowing between terminal 17 and terminal 16.

The input 1 5 of the current mirror 14 is connected via a transistor TR3 and resistor R9 to the zero voltage rail, whereas the base of transistor TR3 is connected via Zener diode ZD1 to the input 11. The output 17 of the device 1 4 is connected via a resistor R10 to the zero voltage rail.The tapping between resistor R10 and terminal 1 7 of the device 14 is connected to the base of transistor TR2, and thus the conductive state of transistor TR2 will be determined by the current flowing between the terminals 1 7 and 1 6 of the device 14 and the corresponding voltage developed across the resistor R 10. Since the current between terminals 1 7 and 1 6 is in turn determined by the current flowing between terminals 1 5 and 1 6 in accordance with the signal voltage applied to the base of transistor TR3 from the input terminal 11, it will be seen that the level of the d.c. voltage appearing at terminal 11 will directly affect the conductive state of transistor TR2.It will be noted that the base of transistor TR2 is further connected to a bias network formed by resistors R11 to R 1 3 and transistor TR4, such bias network being provided to linearise the characteristics of transistor TR2 in a known manner that will be understood by those skilled in the art.

The control circuitry for transistor TR2 is repeated identically for transistor TR 1, the corresponding components being indicated by the same reference numerals indicised, and a detailed description thereof will therefore be omitted. Suffice it to say that the control signal influencing the conductivity of transistor Tor 1 is derived from the output 1 8 of an inverting amplifier A5 of which the inverting input is connected to the signal input 11, whereby the transistors TR1 and TR2 are controlled in opposite sense, in accordance with the polarity of the signal appearing at the input terminal 11.The net effect of the circuit 4 is, as described above, to cause there to be effectively superimposed upon the signal applied to the input 3 of the inverter A3 a signal which is the multiple of a d.c. reference voltage applied at terminal 11, and the instantaneous value of the feedback signal applied at input 10.

As already described above, the signal from the output of amplifier Al equals A cos cot, whereas the output from amplifier A2 equals A sin cot, and the signal from the output 1 3 of inverting amplifier A4 = - A cos ot. Moreover, the output from the inverting amplifier A3 will, assuming that the oscillator has reached a stable state, be equal to - A sin ot.

These four signals may, therefore, conveniently be utilised as inputs to respective multipliers in order to derive the required d.c.

signal representative of the value A2 and thus, the appropriate d.c. control signal to be applied to input terminal 11. The corresponding circuit is illustrated in Fig. 3, wherein reference numerals 1 9 and 20 respectively indicate a pair of multipliers, for example of type Motorola 1 595L. The multiplier 1 9 comprises a pair of inputs 21 and 22 respectively connected to the output from amplifier Al of Fig. 2 and the output 1 3 from amplifier A4.

The multiplier 1 9 is arranged to provide at an output 23 a signal that corresponds to the multiple of the signal applied to input 21 and a signal that is inverted with respect to the signal applied to input 22, namely A2 cos2 cot.

Likewise, the multiplier 20 has an input 24 connected to the output from amplifier A2 and an input 25 connected to the output from amplifier A3 and is arranged to provide at an output 26 a signal that is the inverted multiple of the signal applied at input 24 and a signal inverted with respect to the signal applied at input 25, namely - A2 sin2 cot.

The output 23 of multiplier 1 9 is connected to the non-inverting input of an operational amplifier A6 configured as an inverter, whereas the output 26 of multiplier 20 is connected to the inverting input of amplifier A6. There is also connected to the non-inverting input of amplifier A6 a d.c. reference current derived from a potential divider network connected to the power supply and including resistors R14, R15, R16, R17, transistors TR5 and TR6 and reference Zener diode ZD2. Thus, at the output of amplifier A6, which is connected to the input 11 of Fig. 2, there appears a voltage signal determined by the relationship between the respective currents at the inputs to the amplifier A6, the reference current being set to a value such that in the stable state of the oscillator when the feedback voltage signal is driven to zero, the sine wave output signal of the oscillator has the desired peak amplitude A.

Claims (9)

1. A sine wave oscillator comprising a pair of cascaded integrators and an inverter connected in a closed loop, with the output of the first integrator connected to provide a feedback signal to the input of the inverter, and means for varying the gain of the feedback signal in accordance with the amplitude of the output signal of the oscillator, characterised in that the means for varying the gain of the feedback signal includes means for deriving signals, respectively representing the squares of the output signals of the integrators and means for summing the said derived signals in order to provide a resultant d.c. signal representative of the amplitude of said output signal.

2. A sine wave oscillator as claimed in claim 1, wherein the said means for varying the gain of the feedback signal comprises a multiplier circuit having a first input connected to the output of said first integrator and a second input connected to the output of said summing means, the output of the multiplier providing said feedback signal.

3. A sine wave oscillator as claimed in claim 2, wherein said summing means has an input coupled to a source of d.c. reference potential, whereby the magnitude of the feedback signal is varied in accordance with the relationship between said resultant d.c. signal and said reference potential.

4. A sine wave oscillator as claimed in claim 3, wherein the said multiplier circuit comprises an inverting operational amplifier coupled between the output of said first integrator and the input of said inverter, said inverting operational amplifier having matched feedback networks connected between its output and its respective inputs, said feedback networks respectively including variable resistance elements of which the relative conductivity is arranged to be varied in accordance with the magnitude of the output signal from said summing means.

5. A sine wave oscillator as claimed in claim 4, in which the said means for deriving the signals representing the squares of the output signals from said integrators comprise a pair of further multiplier circuits each having respective inputs coupled to the output of the corresponding integrator and to the output of an inverter coupled thereto and having a gain of unity.

6. A sine wave oscillator as claimed in claim 5, wherein the inverters coupled between the inputs of said pair of multiplier circuits respectively comprise the said inverter of the oscillator closed loop, and the said inverting operational amplifier providing the first multiplier, the latter being configured to have a gain of unity when the output amplitude of the oscillator reaches a stable state.

7. A sine wave oscillator as claimed in claim 4, wherein the said variable resistance elements respectively comprise field effect transistors having bias current networks each incorporating one current path of a current mirror element of which the current flowing in the other path is controlled in accordance with the output signal from said summing means.

8. A sine wave oscillator as claimed in claim 7, wherein the output of said summing means is coupled to the input of an inverter, to the input and output of which are respectively connected elements for controlling the current flow in said current mirror elements.

9. A sine wave oscillator as claimed in claim 1, substantially as hereinbefore described with reference to the drawings.