GB2143389A - High speed A-D converter - Google Patents
High speed A-D converter Download PDFInfo
- Publication number
- GB2143389A GB2143389A GB08412648A GB8412648A GB2143389A GB 2143389 A GB2143389 A GB 2143389A GB 08412648 A GB08412648 A GB 08412648A GB 8412648 A GB8412648 A GB 8412648A GB 2143389 A GB2143389 A GB 2143389A
- Authority
- GB
- United Kingdom
- Prior art keywords
- significant digit
- signal
- conversion circuit
- digit digital
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit
- H03M1/16—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit with scale factor modification, i.e. by changing the amplification between the steps
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/34—Analogue value compared with reference values
- H03M1/36—Analogue value compared with reference values simultaneously only, i.e. parallel type
- H03M1/361—Analogue value compared with reference values simultaneously only, i.e. parallel type having a separate comparator and reference value for each quantisation level, i.e. full flash converter type
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Analogue/Digital Conversion (AREA)
Abstract
The high speed A-D converter comprises a more significant digit digital coding A-D conversion circuit (2) for converting an input analog voltage signal to a coded more significant digit digital signal, an excess output conversion circuit (22) for producing an excess output signal for alternate binary or natural binary on the basis of the input analog voltage signal and having an input terminal (21) common to an input terminal (23) of the circuit (2), and a less significant digit digital coding A-D conversion circuit (8) connected in series to the excess output conversion circuit (22), whereby the excess output signal producing processing operation is carried out simultaneously with the processing operation of the more significant digit digital signal. <IMAGE>
Description
SPECIFICATION
High speed A-D converter
This invention relates to a high speed A-D converter for high speed conversion of analog electric signals to the more significant digit digital signal and the less significant digit digital signal.
Heretofore, such A-D converts have been constructed in such a way that, as shown in Figure la more significant digit digital coding circuit 2, a D-A converter circuit 4, and a subtraction circuit 6 and a less significant digit digital coding circuit 8 are connected in series, and a sample and hold circuit is connected between an input terminal of the more significant digit digital coding circuit 2 and an input terminal of the subtraction circuit 6.In the foregoing construction, for example, when an analog voltage signal 12 shown in Figure 5 is inputted to the input terminal of the more significant digit digital coding circuit 2, the analog signal 12 is subjected to A-D conversion by the circuit 2, and the signal is outputted as a 4-bit coded digital signal at the output terminals bl, b2, b3 and b4 of the circuit 2. This digital signal constitutes a more significant digit digital signal. Next, this digital signal is inputted to the D-A converter circuit 4, and is converted to an analog signal 14 of step mode shown in Figure 6(a).
Next, the subtraction circuit 6 performs a subtraction of the sampling signal of the input analog voltage signal 12 and the step mode analog signal 14, and as shown in Figure 6(b), an excess output signal 16 for natural binary is outputted. This output signal 16 is inputted to the input terminal of the less significant digit digital coding circuit 8, and the excess output signal 16 for natural binary is subjected to the A-D conversion to the 4-bit less significant digit digital coding signal. As described in the foregoing, the input analog voltage signal 12 is converted to the more significant digit digital coding signal and the less significant digit digital coding signal.As it is obvious from the foregoing description, heretofore, the less significant digit digital coded signal produces the more significant digit digital coded signal, and then, effects the D-A conversion of the more significant digit digital coded signal, and this analog converted output is subjected to a subtraction operation against the input analog voltage signal to take out an excess output, and this excess output is converted to the less significant digit digital coded signal. Accordingly, when this system is employed, a number of elements of entire circuits becomes smaller and this it is economical but more time is needed to obtain the less significant digit digital coded signal which is a drawback of this system.
This invention provides a high speed A-D converter in which an input analog electric signal is converted to a coded more significant digit digital signal and a less significant digit digital signal, the improved high speed A-D converter comprising a more significant digit digital coding A-D conversion circuit, an excess output conversion circuit having an input terminal common to an input terminal of the more significant digit digital coding A-D conversion circuit and producing an excess output signal for
alternate binary or natural binary on the basis of the
input analog electric signal, and a less significant
digit digital coding A-D conversion circuit whose
input and output terminals respectively are con
nected to the output terminal of the excess output conversion circuit and in use produce the less significant digit digital signal of the input analog electric signal on the basis of the excess output
signal of the excess conversion circuit.
In this invention, the input voltage is converted to the more significant digit digital signal and the excess output simultaneously by the more significant digit digital cosing A-D conversion circuit and the excess output conversion circuit. The time for producing the excess output can be shortened by this simultaneous processing, and the less significant digit digital signal can be obtained at high speed on the basis of the excess output.
The invention will now be more particularly described, by way of example, with reference to the accompanying drawings, in which:
Figure 1 is a block diagram of a known A-D converter;
Figure 2 is a block diagram showing a preferred embodiment of an A-D converter according to the invention;
Figure 3 is a circuit diagram of the more significant digit digital coding A-D conversion circuit of Figure 2.
Figure 4 is a circuit diagram of the excess output conversion circuit of Figure 2;
Figures 5-8 are explanatory drawings showing various waveforms;
Figure 9 is a circuit diagram of part of the circuit shown in Figure 3;
Figure 10 is an explanatory drawing;
Figure ii is a circuit diagram of part of the circuit shown in Figure 4, and
Figure 12 is a circuit diagram showing a modification to the circuit of Figure 4.
In Figure 2, reference numeral 2 denotes a more significant digit digital coding A-D conversion circuit of known type (see Figure 3), and is provided with a large number of comparators 20 corresponding to its resolution. Numeral 22 denotes an excess output conversion circuit for producing an excess output for alternate binary on the basis of the input analog voltage signal. An input terminal 21 of the excess output conversion circuit 22 and an input terminal 23 of the A-D conversion circuit 2 are connected to an input line 24 of the input analog electric signal. The excess output conversion circuit 22 is provided with a large number of differential type switch circuits 26 (see Figure 4). The electric current proportional to the input voltage flows in the switch circuit 26, and also, the upper limit electric current is controlled by the limiting constant electric current circuit 28.A level of the input voltage at which an electric current of the switch circuit 26 starts to flow corresponds to each comparison reference voltage of a comparator 20 corresponding to the A-D conversion circuit 2. An output terminal 30 of the excess output conversion circuit 22 is connected to an input terminal of the less significant digit digital coding A-D conversion circuit 8 of the known type.
The operation of this embodiment will now be described. For example, the input analog voltage signal 12 (see Figure 5) is subjected to a parallel comparison processing by each comparator 20 of the more significant digit digital coding A-D conversion circuit 2, and the 4-bit more significant digit digital signal shown in Figure 7(a) is outputted by output terminals b1, b2, b3 and b4. On the other hand, the analog voltage signal 12 is converted to the excess signal 1 6a for alternate binary as shown in Figure 7(b) by the excess output conversion circuit 22 for alternate binary.This output signal 1 6a is supplied to an input terminal 32 of the less significant digit digital coding A-D conversion circuit 8, and the circuit 8 converts the excess output signal 1 6a to the less significant digit digital signal shown in
Figure 8(b), and this signal is outputted from the outputterminals b1' b2', b3' and b4'. Bytheway, when a switch circuit 26a is formed as shown in
Figure 12 by eliminating a resistance element between emitters of a pair of transistors of the switch circuit 26, the excess output conversion circuit 22 outputs the excess output 16 for natural binary. This excess output 16 may be inputted to an input terminal 32 of the less significant digit digital coding
A-D conversion circuit 8.
An operation of one comparator among a group of comparators 20 of the more significant digit digital coding A-D conversion circuit will be described in the following.
In Figure 9, a comparison reference voltage a is impressed on the one input terminal of the comparator 20a. The input analog voltage signal 12 is inputted to the other input terminal, and when the level of the voltage signal 12 reaches voltage a, Q output terminal of the comparator 20a is changed from High to Low, and the 0 output terminal is changed from Lowto High.
An operation of the differential type switch circuit of the excess output conversion circuit will be described in the following by referring to Figure 11.
In Figure 11, the reference potential Vs is set by a large number of division resistors Rn provided on a line L of Figure 4. An output line 34 of the differential type switch circuit is connected to the limiting constant electric current circuit 28, and a constant electric current, for example, 1 mA always flows.
When the resistor 36 is set at 1 KQ, and electric current of 1 mA flows to the resistor 36, the 1 -volt voltage is produced at both terminals of the resistor 36. Now, assuming there is a condition of (1)Vs-V1 > 1 volt
The electric current flows between an emitter and a collector of the transistor T1, namely, the A line and the electric current between an emitter and a collector of the transistor T2, namely, the B line becomes zero (OFF). At this time, the voltage of Vout (output) rises. When Vin (input analog voltage) increases and (2) 0 < Vs - Vin < 1 volt is produced, the continuity is produced in the A line and the B line, and a sum of the electric current value flowing in the A line and the electric current value flowing in the B line becomes 1 mA. At this time, the voltage of Vout descends.When (3) Vs - V1 < 0 is produced, the A line becomes OFF and the electric current becomes zero, and the 1 mA electric current flows in the B line.
When a large number of the differential type switch circuits performing the operations (1), (2) and (3) are connected in parallel, the input analog voltage 12 is converted to the excess output 1 6a for alternate binary shown in Figure 7(b).
As described in the foregoing, this invention is constructed in such away that when the input analog electric signal is inputted to the more significant digit digital coding A-D conversion circuit, simultaneously, the analog input electric signal is inputted to the excess output conversion circuit, and the processing operation of producing the more significant digit digital signal and the excess output signal producing process;ng operation are carried out simultaneously, and this excess output signal is inputted to the input terminal of the less significant digital coding A-D conversion circuit whereby, a remarkably high speed A-D conversion is produced.
Claims (2)
1. A high speed A-D converter in which an input analog electric signal is converted to a coded more significant digit digital signal and a less significant digit digital signal, the improved high speed A-D converter comprising a more significant digit digital coding A-D conversion circuit, an excess output conversion circuit having an input terminal common to an input terminal of the more significant digit digital coding A-D conversion circuit and producing an excess output signal for alternate binary or natural binary on the basis of the input analog electric signal, and a less significant digit digital coding A-D conversion circuit whose input and output terminals respectively are connected to the output terminal of the excess output conversion circuit and in use produce the less significant digit digital signal of the input analog electric signal on the basis of the excess output signal of the excess conversion circuit.
2. A high speed A-D converter substantially as hereinbefore described with reference to anyone of the embodiments shown in Figures 2-4,9, 11 and 12 of the accompanying drawings.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58104931A JPS59230323A (en) | 1983-06-14 | 1983-06-14 | High-speed analog/digital converter |
Publications (2)
Publication Number | Publication Date |
---|---|
GB8412648D0 GB8412648D0 (en) | 1984-06-20 |
GB2143389A true GB2143389A (en) | 1985-02-06 |
Family
ID=14393838
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08412648A Withdrawn GB2143389A (en) | 1983-06-14 | 1984-05-17 | High speed A-D converter |
Country Status (5)
Country | Link |
---|---|
JP (1) | JPS59230323A (en) |
DE (1) | DE3420970A1 (en) |
FR (1) | FR2553948A1 (en) |
GB (1) | GB2143389A (en) |
IT (1) | IT1196712B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997049188A1 (en) * | 1996-06-17 | 1997-12-24 | Philips Electronics N.V. | Method of testing an analog-to-digital converter |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1501694A (en) * | 1974-03-15 | 1978-02-22 | Thomson Csf | Analogue to digital converters |
GB1572637A (en) * | 1977-01-31 | 1980-07-30 | Motorola Inc | Analogue-to-digital converter |
EP0070175A2 (en) * | 1981-07-10 | 1983-01-19 | Sony Corporation | Analog-to-digital converters |
EP0070734A2 (en) * | 1981-07-21 | 1983-01-26 | Sony Corporation | Analog-to-digital converters |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE2402072C3 (en) * | 1974-01-17 | 1978-11-02 | Kernforschungsanlage Juelich Gmbh, 5170 Juelich | Circuit for the continuous conversion of signals into digital quantities |
DE2919627A1 (en) * | 1979-05-16 | 1980-11-27 | Licentia Gmbh | Signal multiplying amplifier system - has two operational amplifiers of very wide band type operating in parallel and with common signal input and output |
JPS5693427A (en) * | 1979-12-27 | 1981-07-29 | Toshiba Corp | Analogue-digital converter |
-
1983
- 1983-06-14 JP JP58104931A patent/JPS59230323A/en active Granted
-
1984
- 1984-05-17 GB GB08412648A patent/GB2143389A/en not_active Withdrawn
- 1984-06-06 DE DE3420970A patent/DE3420970A1/en not_active Withdrawn
- 1984-06-12 FR FR8409141A patent/FR2553948A1/en not_active Withdrawn
- 1984-06-13 IT IT67605/84A patent/IT1196712B/en active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1501694A (en) * | 1974-03-15 | 1978-02-22 | Thomson Csf | Analogue to digital converters |
GB1572637A (en) * | 1977-01-31 | 1980-07-30 | Motorola Inc | Analogue-to-digital converter |
EP0070175A2 (en) * | 1981-07-10 | 1983-01-19 | Sony Corporation | Analog-to-digital converters |
EP0070734A2 (en) * | 1981-07-21 | 1983-01-26 | Sony Corporation | Analog-to-digital converters |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997049188A1 (en) * | 1996-06-17 | 1997-12-24 | Philips Electronics N.V. | Method of testing an analog-to-digital converter |
Also Published As
Publication number | Publication date |
---|---|
FR2553948A1 (en) | 1985-04-26 |
DE3420970A1 (en) | 1984-12-20 |
IT8467605A0 (en) | 1984-06-13 |
JPS6353739B2 (en) | 1988-10-25 |
IT1196712B (en) | 1988-11-25 |
GB8412648D0 (en) | 1984-06-20 |
JPS59230323A (en) | 1984-12-24 |
IT8467605A1 (en) | 1985-12-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |