GB2139045A

GB2139045A - Transmission systems

Info

Publication number: GB2139045A
Application number: GB08409313A
Authority: GB
Inventors: David Leslie Hedderley
Original assignee: General Electric Co PLC
Current assignee: General Electric Co PLC
Priority date: 1983-04-20
Filing date: 1984-04-11
Publication date: 1984-10-31
Also published as: GB2139045B; GB8409313D0

Abstract

To overcome the requirement for a synchronising header on signalling bursts in a burst mode signalling system, the received signal is split at the receiver and is forwarded to a delay line 3 and a synchronisation circuit 4. A decoding circuit 5 receives the delayed signal from the delay line 3 and, concurrently, receives carrier and digit synchronisation values from the synchronisation circuit 4. Thus digital data may be extracted from the first digit of each burst since the decoding circuit 5 is synchronised to the values already determined by the synchronisation circuit 4. Since synchronisation values may be determined for one burst whilst a preceding burst is being decoded, a greater information density in any given signalling system may be achieved. <IMAGE>

Description

SPECIFICATION Transmission systems The present invention relates to transmission systems and in particular to transmission systems using burst mode signalling techniques.

In transmission systems using burst mode signal ing techniques where a number of stations are signalling digitally to a central station - for example in satellite communication or multipoint radio systems - it is necessary for the central station to be synchronised for each burst of signalling.

Accordingly each burst of real data is preceded by a header having a series of carrier synchronisation bits, a series of bits for bit synchronisation and a unique word indicating the start of the "real" data.

The header in each burst creates a significant time "overhead" on each burst which if eliminated or reduced could be utilised to increase the channel capacity of a burst mode signalling transmission system.

It is an object of the present invention to provide a transmission system in which the requirement for a header on each burst of data is substantially eliminated.

A transmission system using burst modesignall- ing techniques is a transmission system of the kind specified.

According to the present invention in a transmission system of the kind specified, a receiver has a synchronising circuit and temporary storage means to each of which incoming signals are passed and processing means which is arranged to extract digital data from each received burst of signalling and which is connected to an output of the temporary storage means, the synchronising circuit is arranged to process each burst of signals to derive therefrom a value representing the synchronisaton of the carrier signal in such a burst and to derive a value representing the synchronisation of the digital data within such a burst and to transfer the values so derived in respect of each burst to said processing means concurrently with the transfer of the respective burst from said temporary storage means to said processing means, and the processing means is responsive to the values so transferred to set carrier and digit synchronisation therein such that digital data may be determined commencing from the first digit of each burst of signalling.

Preferably said temporary storage means is an analogue delaying element which may be a surface acoustic wave delay line.

A station of a transmission system including a receiver in accordance with the invention will now be described by way of example only with reference to the accompanying drawing of which: Figure lisa block schematic diagram of the station, and Figure 2 is a timing diagram relating to the signalling sequence in the station of Figure 1.

Referring to Figure 1 the station comprises an amplifier/signal splitter in which signals received from a receiving aerial 2 are amplified and divided for passing to a delay line 3 (for example a surface acoustic wave delay line) and a synchronisation circuit 4.

The synchronisation circuit 4 on receipt of a signalling burst determines from the burst the sychronisation of the carrier and the synchronisation of the data bits within the signalling burst. Digital values representing the carrier synchronisation and bit synchronisation as determined by the synchronisation circuit 4 are passed by way of data buses 10 and 11 to a decoding circuit 5 at the time when the start of the signalling burst reaches the output of the delay line 3.

The decoding circuit 5 uses the digital values received by way of the buses 10 and 11 respectively to reset its carrier demodulator oscillator (not separately shown) and to set the timing of signal threshold detectors used to extract the digital data in the bursts of pulses.

The data from a burst of pulses may be extracted by way of a bus 6 or may have certain digits replaced prior to recoding by a recoder 6 and transmission by a transmitter 8 and a transmitting aerial 9.

It will be appreciated that software techniques using microprocessors may be used to effect synchronisation, decoding and recoding to which end any or all of the circuit elements 4,5 and 7 may include or be replaced by appropriately programmed microprocessors.

The particular advantage of the invention may be seen by referring to Figure 2. Thus whilst the first signalling burst (channel 1) is being decoded in the decoder 5, the synchronisation circuit 4 is deriving the carrier and bit synchronisation of the second signalling burst (channel 2). Similarly for each subsequent signalling burst whilst one channel is being decoded the synchronisation of a subsequent signalling burst may be prepared.

Since the derivation of the synchronisation is carried out in advance of decoding, using the data present in the signalling burst, there is no requirement for carrier synchronisation and digital synchronisation data to be provided as a "header" for the data burst.

Thus each signalling burst may include more wanted data or each signalling burst may be shorter allowing a greater amount of wanted data or a greater number of data bursts to be handled in the same time period.

It will be appreciated that where the data rate is appropriate the incoming signal may be digitised using an analogue to digital converter and be stored digitally until such time as the synchronism of the decoder 5 has been determined. The stored signal may then be reconnected to analogue for further processing.

1. Atransmission system of the kind specified wherein a receiver has a synchronising circuit and temporary storage means to each of which incoming signals are passed and processing means which is arranged to extract digital data from each received burst of signalling and which is connected to an output of the temporary storage means, said syn

**WARNING** end of DESC field may overlap start of CLMS **.

Claims

**WARNING** start of CLMS field may overlap end of DESC **. SPECIFICATION Transmission systems The present invention relates to transmission systems and in particular to transmission systems using burst mode signalling techniques. In transmission systems using burst mode signal ing techniques where a number of stations are signalling digitally to a central station - for example in satellite communication or multipoint radio systems - it is necessary for the central station to be synchronised for each burst of signalling. Accordingly each burst of real data is preceded by a header having a series of carrier synchronisation bits, a series of bits for bit synchronisation and a unique word indicating the start of the "real" data. The header in each burst creates a significant time "overhead" on each burst which if eliminated or reduced could be utilised to increase the channel capacity of a burst mode signalling transmission system. It is an object of the present invention to provide a transmission system in which the requirement for a header on each burst of data is substantially eliminated. A transmission system using burst modesignall- ing techniques is a transmission system of the kind specified. According to the present invention in a transmission system of the kind specified, a receiver has a synchronising circuit and temporary storage means to each of which incoming signals are passed and processing means which is arranged to extract digital data from each received burst of signalling and which is connected to an output of the temporary storage means, the synchronising circuit is arranged to process each burst of signals to derive therefrom a value representing the synchronisaton of the carrier signal in such a burst and to derive a value representing the synchronisation of the digital data within such a burst and to transfer the values so derived in respect of each burst to said processing means concurrently with the transfer of the respective burst from said temporary storage means to said processing means, and the processing means is responsive to the values so transferred to set carrier and digit synchronisation therein such that digital data may be determined commencing from the first digit of each burst of signalling. Preferably said temporary storage means is an analogue delaying element which may be a surface acoustic wave delay line. A station of a transmission system including a receiver in accordance with the invention will now be described by way of example only with reference to the accompanying drawing of which: Figure lisa block schematic diagram of the station, and Figure 2 is a timing diagram relating to the signalling sequence in the station of Figure 1. Referring to Figure 1 the station comprises an amplifier/signal splitter in which signals received from a receiving aerial 2 are amplified and divided for passing to a delay line 3 (for example a surface acoustic wave delay line) and a synchronisation circuit 4. The synchronisation circuit 4 on receipt of a signalling burst determines from the burst the sychronisation of the carrier and the synchronisation of the data bits within the signalling burst. Digital values representing the carrier synchronisation and bit synchronisation as determined by the synchronisation circuit 4 are passed by way of data buses 10 and 11 to a decoding circuit 5 at the time when the start of the signalling burst reaches the output of the delay line 3. The decoding circuit 5 uses the digital values received by way of the buses 10 and 11 respectively to reset its carrier demodulator oscillator (not separately shown) and to set the timing of signal threshold detectors used to extract the digital data in the bursts of pulses. The data from a burst of pulses may be extracted by way of a bus 6 or may have certain digits replaced prior to recoding by a recoder 6 and transmission by a transmitter 8 and a transmitting aerial 9. It will be appreciated that software techniques using microprocessors may be used to effect synchronisation, decoding and recoding to which end any or all of the circuit elements 4,5 and 7 may include or be replaced by appropriately programmed microprocessors. The particular advantage of the invention may be seen by referring to Figure 2. Thus whilst the first signalling burst (channel 1) is being decoded in the decoder 5, the synchronisation circuit 4 is deriving the carrier and bit synchronisation of the second signalling burst (channel 2). Similarly for each subsequent signalling burst whilst one channel is being decoded the synchronisation of a subsequent signalling burst may be prepared. Since the derivation of the synchronisation is carried out in advance of decoding, using the data present in the signalling burst, there is no requirement for carrier synchronisation and digital synchronisation data to be provided as a "header" for the data burst. Thus each signalling burst may include more wanted data or each signalling burst may be shorter allowing a greater amount of wanted data or a greater number of data bursts to be handled in the same time period. It will be appreciated that where the data rate is appropriate the incoming signal may be digitised using an analogue to digital converter and be stored digitally until such time as the synchronism of the decoder 5 has been determined. The stored signal may then be reconnected to analogue for further processing. CLAIMS

1. Atransmission system of the kind specified wherein a receiver has a synchronising circuit and temporary storage means to each of which incoming signals are passed and processing means which is arranged to extract digital data from each received burst of signalling and which is connected to an output of the temporary storage means, said syn chronising circuit is arranged to process each burst of signals to derive a value representing the synchronisation of the carrier signal in such a burst and to derive a value representing the synchronisation of the digital data within such a burst and to transfer the values so derived in respect of each burst to said processing means concurrently with the transfer of the respective burst from said temporary storage means to said processing means, and said processing means is responsive to the values so transferred to set carrier and digit synchronisation therein such that digital data may be determined commencing from the first digit of each burst of signalling.

2. Atransmission system as claimed in Claim 1 wherein said temporary storage means is an analogue delaying element.

3. A transmission system as claimed in Claim 2 wherein the analogue delaying element is a surface acoustic wave delay line.

4. A transmission system as claimed in any one of Claims 1 to 3 wherein data received in some or all of the burst of pulses is extracted at the receiver.

5. Atransmission system as claimed in any preceding claim wherein the receiver is associated with re-encoding apparatus and a transmitter such that some or all of the decoded bursts may be retransmitted.

6. A transmission system as claimed in Claim 5 wherein at least one digit of some of the bursts of pulses is replaced at the receiver prior to retransmission of those bursts of pulses.

7. A receiver for a transmission system of the kind specified wherein incoming transmission signals are passed to a synchronising circuit and to the input of an analogue delaying element the output of which is connected to processing means which is arranged to extract digital data from each burst of signalling, the synchronising circuit is arranged to process each burst of signals to derive therefrom a value representing the synchronisation of the carrier signal in such a burst and a value representing the synchronisation of the digital data within such a burst and to transfer the values to said processing means concurrently with the commencement of each of said bursts of signalling, and the processing means is arranged to use said values to set its carrier and digit synchronisation such that digital data may be extracted starting from the first digit of each burst of signalling.

8. A transmission system of the kind specified substantially as hereinbefore described with reference to the accompanying drawings.

9. A receiver for use in a transmission system of the kind specified and substantially as hereinbefore described with reference to the accompanying drawings.