GB2138978A - Digital computer memory - Google Patents
Digital computer memory Download PDFInfo
- Publication number
- GB2138978A GB2138978A GB08405987A GB8405987A GB2138978A GB 2138978 A GB2138978 A GB 2138978A GB 08405987 A GB08405987 A GB 08405987A GB 8405987 A GB8405987 A GB 8405987A GB 2138978 A GB2138978 A GB 2138978A
- Authority
- GB
- United Kingdom
- Prior art keywords
- memory
- semi
- volatile
- electronic digital
- conductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
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Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0638—Combination of memories, e.g. ROM and RAM such as to permit replacement or supplementing of words in one module by words in another module
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Read Only Memory (AREA)
Abstract
A digital computer memory comprises two complementary memory blocks, namely 16K of core memory, 10, and 48K of non-volatile electrically erasable programmable ROM (EEPROM), 11. The core section provides a fast read/write resource for operational working space, whilst the non-volatile EEPROM section provides for high density storage of programme instructions and data with fast read facility consistent with RAM operation. This combination resolves the problem of obtaining high density non-volatile RAM, based on the observation inter alia of memory partitioning to the effect that working space requirement rarely exceeds a maximum of the order of 32K in many applications demanding limited physical size, whereas the need for programme and data space continually grows. Relatively long cycle times are used for addressing the semiconductor memory block for writing thereto and relatively short cycle times are used for reading from either block. <IMAGE>
Description
SPECIFICATION
Digital computer memory
This invention relatesto electronic digital computing apparatus. The invention is particularly concerned with memory means for use in such apparatus.
For certain uses of digital computers, it is desirable that random access memory (RAM) used in the apparatus is a non-volatile memory, that is to say that its contents are alterable only upon specific command, and are not lost when electrical supply to the apparatus is removed. This is the case, for example in certain military applications, where programme instructions and data are stored in memory locations at base and retained indefinitely without reliance upon electrical supply until field use is required. Also, it is desirable, in some cases, that programme instructions and data be changed either entirely or in part without necessitating physical removal of hardware components from the computer assembly.Electro-magnetic devices known as core memories are well suited to these requirements in that they are non-volatile, have a relatively short cycle time consistent with RAM operation, and are reliable to the standards preferred by military specification. However, core memory suffers from the disadvantage that its byte capacity or packing density for a given physical size is relatively small as compared with that of semi-conductor memory devices. Generally, in the present context, it is found that there is an effective limitation on the capacity of core memory of 32K, beyond which physical size becomes a serious problem.
An electrically eraseable programmable semiconductor device (EEPROM) is known which is capable of providing relatively large capacity within the physical size limits of the present context, and which is non-volatile. However, EEPROM has the disadvantage that the address field cycle time of the device is too great (i.e. the write time is too slow) for the practical purposes of a RAM. Accordingly, although this device permits rapid and constant access time in read mode once it is programmed, its whole performance is outside the ambit of what is specified for RAM.
According to the present invention, there is provided electronic digital computing apparatus in which memory means comprises an electromagnetic memory part, a non-volatile electrically erasable programmable semi-conductor memory part, and timing and control means associated with operation of both said memory parts and adapted to select during operation of the apparatus relatively long cycle time values when the semi-conductor memory part is addressed for writing thereto and relatively short cycle time values when the electromagnetic memory part or the semi-conductor memory part is addressed for reading therefrom.
We have observed that, in general, the practical applications in which core memory is favoured for its non-volatile property involve regular reprogramming. When fresh programme instructions and data are written into the core memory, that part of the core memory containing the programme instructions and data is addressed thereafter, in effect, solely as read only memory (ROM). We have further observed that said practical applications, in general, do not necessarily require fast cycle time values during operation to load programme instructions and data into memory.We have also observed that, in general, the partitioning of the total memory space is such that although the ongoing development of applications software demands greater and greater RAM capacity, the maximum free or "working" space required remains surprisingly constant and relatively small, and that virtually all of the additional capacity called for is to contain programme instructions and data. Our present invention obviates or mitigates the said disadvantages of electro-magnetic memories and semi-conductor memories respectively in that the EEPROM part is used solely to store programme instructions and data which can readily be changed or reprogrammed; and the electro-magnetic part provides sufficient operational free RAM space.
Further, according to the present invention, there is provided for use in electronic digital computing apparatus, a memory means comprising complementary memory blocks of which one part is electo-magnetic memory and the other part is non-volatile electrically erasable programmable semi-conductor memory.
Still further, according to the present invention, there is provided electronic digital computing apparatus as aforesaid, in which the said semi-conductor memory part contains solely programme instructions or data, and the said electro-magnetic memory part is available for use as non-volatile random access memory.
An embodiment of the present invention will now be described, by way of example, with reference to the accompanying schematic drawing of part of electronic digital computing apparatus in accordance with the present invention.
In the drawing a 64K bulk non-volatile memory unit consists of a 16K core memory part 10 and a 48K non-volatile electrically erasable programmable semi-conductor memory part 11 which is known as "EEPROM". Full technical data regarding the EEP
ROM device (also known as EEROM or E2ROM) is available for example in publications issued by
SEEQ Technology, Inc., of San Jose, California,
U.S.A. The memory unit also includes timing and control circuitry 12 and the memory parts 10,11 are accessed by means of latches 13 and 14. The latches 13 handle addresses, and the latches 14 handle data.
The cycle time of the core memory 10 is of the order of one micro-second. The cycle time for reading of the semi-conductor memory is also of the order of one micro-second or better. However, the cycle time for writing to the semi-conductor memory 11 is of the order of 10 milli-seconds. Accordingly, the semi-conductor memory part 11 is not suited to perform as non-volatile RAM. However, by selecting the size of the semi-conductor memory part 11 to suit requirements in respect of space for programme instructions and data, and by adapting the timing and control circuitry 12 so that during programme loading appropriate long cycle time values are used for writing to the semi-conductor memory, the effective result in practical or operational terms is that the memory unit as a whole performs as a 64K non-volatile memory which can be packaged to dimensions which could not be achieved if the entire 64K memory size was constituted by electromagnetic or core memory.
Claims (6)
1. Electronic digital computing apparatus in which memory means comprises an electromagnetic memory part, a non-volatile electrically erasable programmable semi-conductor memory part, and timing and control means associated with operation of both said memory parts and adapted to select during operation of the apparatus relatively long cycle time values when the semi-conductor memory part is addressed for writing thereto and relatively short cycle time values when the electromagnetic memory part or the semi-conductor memory part is addressed for reading therefrom.
2. Electronic digital computing apparatus according to claim 1, in which the size of the electro-magnetic memory part is 16K, and the size of the said semi-conductor memory part is 32K or greater.
3. Electronic digital computing apparatus according to claim 1 or 2, in which the said semi-conductor memory part contains solely programme instructions or data, and the said electromagnetic memory part is available for use as non-volatile random access memory.
4. For use in electronic digital computing apparatus, a memory means comprising complementary memory blocks of which one part is electromagnetic memory and the other part is non-volatile electrically erasable programmable semi-conductor memory.
5. Electronic digital computing apparatus substantially as hereinbefore described with reference to the accompanying drawings.
6. For use in electronic digital computing apparatus, a memory means substantially as hereinbefore described with reference to the accompanying drawings.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB08405987A GB2138978A (en) | 1983-03-19 | 1984-03-07 | Digital computer memory |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB838307668A GB8307668D0 (en) | 1983-03-19 | 1983-03-19 | Digital computer memory |
GB08405987A GB2138978A (en) | 1983-03-19 | 1984-03-07 | Digital computer memory |
Publications (1)
Publication Number | Publication Date |
---|---|
GB2138978A true GB2138978A (en) | 1984-10-31 |
Family
ID=26285573
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08405987A Withdrawn GB2138978A (en) | 1983-03-19 | 1984-03-07 | Digital computer memory |
Country Status (1)
Country | Link |
---|---|
GB (1) | GB2138978A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0361497A2 (en) * | 1988-09-29 | 1990-04-04 | Nec Corporation | Program/data memory employed in microcomputer system |
GB2246222A (en) * | 1990-06-18 | 1992-01-22 | Mitsubishi Electric Corp | Central processing unit |
EP0714060A1 (en) * | 1994-11-24 | 1996-05-29 | Sanyo Electric Co. Ltd | One chip microcomputer with built-in non-volatile memory |
-
1984
- 1984-03-07 GB GB08405987A patent/GB2138978A/en not_active Withdrawn
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0361497A2 (en) * | 1988-09-29 | 1990-04-04 | Nec Corporation | Program/data memory employed in microcomputer system |
EP0361497A3 (en) * | 1988-09-29 | 1992-03-25 | Nec Corporation | Program/data memory employed in microcomputer system |
GB2246222A (en) * | 1990-06-18 | 1992-01-22 | Mitsubishi Electric Corp | Central processing unit |
GB2246222B (en) * | 1990-06-18 | 1994-08-17 | Mitsubishi Electric Corp | Central processing unit |
EP0714060A1 (en) * | 1994-11-24 | 1996-05-29 | Sanyo Electric Co. Ltd | One chip microcomputer with built-in non-volatile memory |
CN1105976C (en) * | 1994-11-24 | 2003-04-16 | 三洋电机株式会社 | One-chip microcomputer mounted with nonvolatile storage |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
WAP | Application withdrawn, taken to be withdrawn or refused ** after publication under section 16(1) |