GB2137452A - A television receiver - Google Patents

A television receiver Download PDF

Info

Publication number
GB2137452A
GB2137452A GB08403594A GB8403594A GB2137452A GB 2137452 A GB2137452 A GB 2137452A GB 08403594 A GB08403594 A GB 08403594A GB 8403594 A GB8403594 A GB 8403594A GB 2137452 A GB2137452 A GB 2137452A
Authority
GB
United Kingdom
Prior art keywords
circuit
signal
frequency
output
synchronous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB08403594A
Other versions
GB8403594D0 (en
GB2137452B (en
Inventor
Makoto Furihata
Yasuhiro Nunogawa
Junich Mameda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of GB8403594D0 publication Critical patent/GB8403594D0/en
Publication of GB2137452A publication Critical patent/GB2137452A/en
Application granted granted Critical
Publication of GB2137452B publication Critical patent/GB2137452B/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/76Television signal recording
    • H04N5/765Interface circuits between an apparatus for recording and another apparatus
    • H04N5/775Interface circuits between an apparatus for recording and another apparatus between a recording apparatus and a television receiver
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/74Projection arrangements for image reproduction, e.g. using eidophor
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/44Receiver circuitry for the reception of television signals according to analogue transmission standards
    • H04N5/445Receiver circuitry for the reception of television signals according to analogue transmission standards for displaying additional information

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Signal Processing For Recording (AREA)
  • Synchronizing For Television (AREA)

Abstract

A television receiver in which an APC circuit 33, a VCO 34 and a frequency divider circuit 35 constitute a PLL circuit, which responds to an output of a synchronous separator circuit 31. In the case where the television receiver receives a signal from a broadcasting station or a playback signal from a video tape recorder in its normal playback mode, horizontal synchronous pulses of 15750 Hz are produced from an output of the frequency divider 35, and vertical synchronous pulses of 60 Hz are produced from an output of a 1/525 counter 36 to which an output of the VCO 34 is applied. A voltage comparator 45 detects an additional pulse (Vp'', Fig. 2) which is supplied from the video tape recorder in its special playback mode e.g. a fast playback mode. In the presence of the additional pulse, the output of the voltage comparator 45 forcibly resets the 1/525 counter 36, with the result that the vertical synchronous pulse responsive to the special playback mode is produced from the output of the 1/525 counter 36. <IMAGE>

Description

SPECIFICATION A Television Receiver The present invention relates to a television receiver.
In relation to television receivers, there has been proposed a system in which a horizontal synchronous signal and a vertical synchronous signal are produced from the output signal of a synchronous separator circuit by a counter circuit, that is, the countdown synchronous processing system.
Since the television receiver of such countdown synchronous processing system dispenses with a vertical oscillation circuit, it can save the troublesome operation of adjusting the free-running oscillation frequency of the vertical oscillation circuit having hitherto been required.
The nominal frequency fH of the horizontal synchronous signal in the NTSC broadcast received by the television receiver is 15750 Hz, while the nominal frequency fv of the vertical synchronous signal is 60 Hz.
Therefore, the ratio of both the frequencies becomes fH/fV = 15750/60 = 262.5.
The television receiver can be used, not only for projecting a picture by receiving the broadcast electric wave, but also for many other purposes. By way of example, the television receiver is connected with a video tape recorder (hereinbelow, termed "VTR") so as to play back a video signal and a sound signal which are recorded on a magnetic tape. In the case where the VTR is in the normal playback mode thereof, a plurality of recording tracks successively formed on the magnetic tape agree with the traces of first and second playback heads. The video signal, a chroma signal, and horizontal and vertical synchronous signals are derived from the first and second playback heads every field, and a stable picture is projected on the screen of the television receiver.
That is, during the normal playback mode of the VTR, the respective frequencies fH and fv of the horizontal and vertical synchronous signals contained in the video signal detected by the playback heads are held at the aforementioned ratio (i.e., 262.5). Therefore, synchronous conditions are satisfied in horizontal and vertical deflections, and a stable picture is achieved.
The VTR, however, has the so-called special play back functions of still picture playback, slow-motion playback, fast playback, etc. Among them, the fast playback will be exemplified. As the travelling speed of the magnetic tape becomes high, each of the first and second playback heads comes to trace a plurality of adjacent recording tracks, and the recording tracks formed come to diagree with the traces ofthe first and second playback heads.
Further, as is well known, the plurality of recording tracks are arranged obliquelytothe lengthwise direction of the magnetictape so that the starting points of the two adjacent recording tracks have a distance difference of 1.5 H (where H denotes 1/15750 second, namely, the period of the horizontal synchronous signal) in terms of time. By the way, the distance between the starting point and end point ofthe single recording track has a length of 262.5 H in terms of time.
Meanwhile, during the fast playback of the VTR, one playback head can trace N adjacent recording tracks. Then, the distance between the starting point and end point of the fast tracing becomes 262.5 H - (N - 1) x 1.5 H in terms of time. During the fast playback of the VTR, accordingly, the single playback head traces the N recording tracks, with the result that the ratio of the respective frequencies of the horizontal and vertical synchronous signals contained in the video signal detected by the playback head becomes smaller than the aforementioned value of 262.5.
When, in such fast playback operation of the VTR, the ratio between the horizontal deflection frequency and vertical deflection frequency of the television receiver connected with the VTR is held at the aforementioned value of 262.5, the vertical synchronization of the fast tracing of the VTR disagrees with the vertical synchronization of the television receiver.
It is natural in the VTR that the video signal, the horizontal synchronous signal, and the vertical synchronous signal recorded on the single recording track can be played back by only one playback head.
Accordingly, while the single playback head is shifting from the first recording track to the subsequent adjacent recording track in the fast playback of the VTR, the proper video signal and synchronous signals cannot be derived, and the output signal of the playback head consists only of noise.
During such fast playback, the single playback head carries out two times of tracing on the 2.N adjacent recording tracks, and this playback head needs to detect the vertical synchronous signal between the first tracing and the second tracing. Since, however, the vertical synchronous signal is not derived and only the noise is derived from the playback head during the shift of this playback head from the first tracing to the second tracing, asynchronism arises and the picture of the television receiver flows upwards or downwards.
In order to prevent this phenomenon, during the fast playback of the VTR, a pulse signal which has a duration corresponding to 3 to 5 horizontal synchronous pulses and a period of 262.5 H - (N - 1) x 1.5 H is added into the equalizing pulse between the horizontal synchronous signal and the vertical synchronous signal. The additional pulse is impressed only in the special playback mode, and is not recorded on the magnetic tape.
In the case where a conventional television receiver including both a horizontal oscillation circuit and a vertical oscillation circuit receives the video signal from the VTR under the fast playback operation, the oscillation frequency ofthe horizontal oscillation circuit agrees with the frequency of the horizontal sync hronoussignal in this video signal, andthe oscillation frequency of the vertical oscillation circuit agrees with the frequency of the additional pulse signal in this video signal. Accordingly, the ratio between the horizontal deflection frequency and vertical deflection frequency of the television receiver becomes smaller than 262.5, and the agreement between the vertical synchronization of the fast tracing of the VTR and the vertical synchronization of the television receiver is attained.
On the other hand, in the case where the prior-art television receiver of the countdown processing system is connected with the VTR, the vertical output signal is formed by counting the horizontal synchronous signal from the VTR at a fixed rate of counting irrespective of whether the VTR is in the normal playback mode or in the special playback mode.
Accordingly, the ratio between the horizontal deflection frequency and vertical deflection frequency of the television receiver of the countdown processing system in this case is held at the value of 262.5, and the asynchronism arises to cause the picture of the television receiver to flow upwards or downwards.
It is an object of the present invention to provide a television receiver which can project a stable picture on a picture tube even in the special playback mode of a VTR.
According to the present invention there is provided a television receiver including: (a) a synchronous separator circuit which separates a horizontal synchronous signal and a vertical synchronous signal from a video signal; (b) an oscillator circuit which produces an output having a frequency in a predetermined relation to a frequency of the horizontal synchronous signal derived from an output terminal of said synchronous separator circuit; (c) a first frequency divider circuit which divides the frequency of the output of said oscillator circuit, in order to produce horizontal synchronous pulses; (d) a second frequency divider circuit which divides the frequency of the output of said oscillator circuit, in order to produce vertical synchronous pulses; and (e) an additional pulse detector circuit which detects whether or not an additional pulse in a special playback mode of a video tape recorder is contained in the video signal, the vertical synchronous pulse for the special playback mode being generated on the basis of a detection output signal of said detector circuit.
The present invention will now be described in greater detail by way of example with reference to the accompanying drawings, wherein: Figure 1 is an explanatory diagram showing the relationship between the recording tracks of a magnetic tape and the traces of playback heads in the special playback mode of a VTR; Figure2 is a waveform diagram showing an example of an additional pulse in the special playback mode; Figure 3 is a block circuit diagram of a preferred form of television receiver; and Figure 4 shows a series of waveforms in order to explain the operation of the television receiver.
Referring first to Figure 1, the cause of the fluctuation ofthe frequency ratio between a horizontal synchronous signal fH and a vertical synchronous signal fv will now be given. Avideo signal, a chroma signal, a horizontal synchronous signal and a vertical synchronous signal are recorded on recording tracks CH1, ....... and CHn arranged obliquely to the lengthwise direction of a magnetic tape T. In addition, the tape T carries a sound signal track C, and a control signal track D. The magnetictape Ttravels in the direction of an arrow a.
In the case where the VTR is in the normal playback mode, the recording track CH1 and the trace A of a first playback head (not shown) agree, and a detection output signal for one field is produced. In addition, the recordig track CH2 and the trace of a second playback head (not shown) agree, and a detection output signal for the next one field is produced. It is supposed that the starting points of the respectively adjacent recording tracks CH1, CH2, . . . CHn have a time difference (carrier shift) of 1.5 H so as to form the so-called H-arrayal.Owing to the signals played back from the recording tracks OHi and CH2, namely, the detection output signals of the first and second playback heads, a picture for one frame is projected on the picture tube of a television receiver to be described later.
When a fast playback operation is taken as an example, the magnetic tape T is caused to travel at high speed in the direction of the arrow a, and the trace A of the first playback head extends over a plurality of recording tracks as shown at each hatched part A' in Figure 1. Also the second playback head traces a plurality of recording tracks as shown at each hatched part B' in Figure 1.
During the fast playback operation as stated above, the playback signal fp of a waveform as shown in Figure 2 is supplied from the VTR to the television receiver. Vp indicates a vertical synchronous pulse, Vp' an equalizing pulse, and Vp" an additional pulse.
The additional pulse Vp'' which is supplied from the VTR in the special playback mode thereof has a duration corresponding to 3-5 times the period of horizontal synchronous pulses Hp. Avideo signal Vi indicated by a two-dot chain line in Figure 2 is play back during the normal playback mode.
The distance (one field) from the starting point to the end point of one recording track becomes 262.5 H in terms of time. In the case where, as illustrated in Figure 1, one playback head traces the three adjacent recording tracks obliquely in the fast playback operation of the VTR, the distance between the starting point and end point of the fast tracing becomes 262.5 H - (3 - 1) x 1.5 H = 259.5 H in terms of time.
The playback signal fp shown in Figure 2 is supplied from the VTR to the input terminal (usually, UHF antenna terminal) of the television receiver.
The circuit of the television receiver shown in figure 3 and the operation thereof will now be described with reference to Figure 4.
The playback signal fp in the fast playback operation as shown in Figure 2 is supplied to a radio frequency amplifier circuit 2, the output signal fp' of which is supplied to a frequency mixer circuit 3. A local oscillation circuit 4suppliesthe frequency mixer circuit 3 with a frequency fL which is higher than the carrier frequency of the output signal fp' by 58.75 MHz at all times. The above frequency fL is a frequency for a video carrier wave. The output signal fM of the frequency mixer circuit 3 has a frequency of the difference between the output signal fp' and the frequency signal h.
The output signal fi of a video intermediate frequency circuit 5 is the so-called colour television signal which contains a video signal Vi, a chroma signal, a horizontal synchronous signal fH, a vertical synchronous signal fv, a sound signal, etc. The output signal fi is supplied to the respective circuit blocks of a sound signal processing system 11, a video signal processing system 12, a chroma signal processing system 13 and a synchronous signal processing system 14. The sound signal processing system 11 has an FM detector circuit and an amplifier circuit, and a sound output is provided from a loudspeaker 19. The video signal processing system 12 has a video detector circuit, a video amplifier circuit, and provides a luminance signal Y.The chroma signal processing system 13 is constructed of a band-pass amplifier circuit, a chroma demodulator circuit, a matrix circuit, a colour output circuit, a burst amplifier circuit, a colour subcarrier oscillation circuit, a phase shifted circuit. The colour output circuit is supplied with the aforementioned luminance signal Y, and is also supplied with the colour difference signals of R - Y, G - Y and B - Y from the matrix circuit. The colour output circuit provides the colour signals of R (red), G (green) and B (blue), which are supplied to the corresponding cathodes of a picture tube 22.
The circuit operations of the synchronous signal processing system 14 will now be explained.
A synchronous separator circuit 31 separates the horizontal synchronous signal fH and the vertical syn- chronous signal fvfrom the colourtelevision signal fi, and supplies them to a high-pass filter 32 and a low pass filter 41. Only differential pulses which are sync hronous with the horizontal synchronous pulses Hp shown in Figure 2 are derived from the high-pass filter 32, and they are supplied to an automatic phase control circuit 33 at the succeeding stage. The auto matic phase control circuit 33 compares the phases of the aforementioned horizontal synchronous pulses Hp and the output signal Hp' of a frequency divider circuit 35 to be described later.With its output signal Ve of a voltage level corresponding to the phase dif ference of both the signals, the circuit 33 controls the oscillation frequency fo of a voltage-controlled oscil lator 34 to 2 fH, i.e., 31500 Hz.
The oscillation frequency fo is supplied to the fre quency divider circuit 35 in orderto produce the hori zontal synchronous signal fH, while it is supplied to a 1/525 counter circuit 36 in order to produce the verti cal synchronous signal fv. Further, it is supplied to a 262.5 H-delay circuit 37 as a clock signal. The fre quency divider circuit 35 provides the pulse signal Hp' of the frequency of 15750 Hz, which is supplied to the APC circuit 33 and a horizontal drive circuit 38. The horizontal drive circuit 38 provides a horizontal saw tooth wave current fHs of the frequency of 15750 Hz, which is supplied to a horizontal deflection coil in a deflection coil 21.Further, in the case where the VTR is in the normal playback mode, the 1/525 counter circuit 36 provides a pulse signal fvP of the frequency of 60 Hz, which is supplied to the 262.5 H-delay circuit 37 and a vertical drive circuit 39. The vertical drive circuit 39 provides a vertical sawtooth wave current fvs of a frequency of 60 Hz, which is supplied to a vertical deflection coil in the deflection coil 21.
On the other hand, in the case where the VTR is in the fast playback mode, the low-pass filter 41 pro vides a voltage signal fv' with the signal fP integrated as shown in waveform (B) of Figure 4. The voltage signal fv' is supplied to a voltage comparator 42 fed with a reference voltage V1, and a voltage comparator 43 fed with a reference voltage V2. The voltage levels of the reference voltages V1 and V2 are set at V1 > V2 as shown in waveform (B) of Figure 4.
Here, the variation of the voltage level of the voltage signal fv' will be observed. As shown in waveform (B) of Figure 4, the voltage level falls rapidly in a part corresponding to the additional pulse Vp" and then rises. Further, it falls slowly in a part corresponding to the vertical synchronous pulse Vp.
By setting the reference voltage V1 at a desired voltage level, accordingly, an output voltage VRP as shown in waveform (C) of Figure 4 is produced from the voltage comparator 42. The output voltage VRP iS supplied to one end of each of switches S. and S2 in order to be used as the reset signal of the 1/525 counter36, while at the sametime it is supplied to one input terminal of an AND circuit 51 as a gate signal.
A series of circuit operations from the voltage comparator 43 to the switch S. will now be described.
In the voltage comparator 43, the reference voltage V2 and the voltage of the voltage signal fv' are compared. While the voltage level ofthe voltage signal fv' is lower than the reference voltage V2, an output signal fv" of low level (L level) as shown in waveform (D) of Figure 4 is provided. This output signal fv" is produced only when the voltage signal fv' has fallen rapidly by the additional pulse VP". accordingly, the output signal N can be said the detection signal of the additional pulse VP", and it is decided by the presence ofthe low level output signal fv"thattheVTR has been switched to the special playback mode.
The output signal fv" is supplied to an integrator circuit 44 at the succeeding stage. As shown in waveform (E) of Figure 4, the output voltage Vi of the integrator circuit 44 lowers gently in correspondence with the L level interval of the output signal f,,", whereupon it rises gently in correspondence with the high level (H level) thereof. The output voltage Vi is supplied to the inverting input terminal (-) of a voltage comparator 45.
A reference voltage V3 is applied to the noninverting input terminal (+) of the voltage comparator 45. While the output voltage Vi is lower in level than the reference voltage V3, an output signal Pc of H level as shown in waveform (F) of Figure 4 is provided from the voltage comparator 45. The output signal Pc is supplied to the switch Si as a gate signal for turning it "on" or "off". Although the switch S. is illustrated as a mechanical switch in Figure 3, it is in practice formed as an electronic switch. The switch S1 operates in the "on" state, in other words, the closed state when supplied with the high level output signal Pc. That is, the switch S1 is brought into the "on" state only in the case where the VTR has been switched to the special playback mode and supplied with the additional pulse VP".
As will be apparent on comparing the waveforms (C) and (F) of Figure 4, when the output signal Pc is of the H level and the switch S1 is in the "on" state, the high level output signal VRPofthevoltage comparator 42 is supplied to the 1/525 counter 36 through the switch si. Therefore, the 1/525 counter 36 is reliably reset by the high level output signal VRP once each time the additional pulse VP" appears.
Accordingly, when the 1/525 counter 36 is reset, the vertical sawtooth wave current fvs is produced from the vertical drive circuit 39.
For the reason described above, in the case where the television receiver according to the present embodiment has received the signal fP from the VTR in the fast playback operation, the frequency of the horizontal sawtooth wave currentfHs produced from the horizontal driver circuit 38 agrees with the fre quency of the horizontal synchronous pulses Hp contained in this signal fP, and the frequency of the verti cal sawtooth wave currentfvs produced from the vertical drive circuit 39 agrees with the frequency of the additional pulse VP" contained in this signal fP.
Accordingly, the ratio between the horizontal deflection frequency and vertical deflection frequency of this television receiver becomes smaller than 262.5, and the agreement between the vertical synchronization of the fast tracing of the VTR and the vertical synchronization of the television receiver is attained.
During the fast playback of the VTR, the first play back head traces the magnetic tape T along the hatched part A' as shown in Figure 1, and hence, the detection output signal provided from the first playback head during the gap between the recording tracks CHi and CH2 lacks several horizontal synchronous pulses HP. Since, however, the automatic phase control circuit 33, voltage-controlled oscillator circuit 34 and frequency divider circuit 35 constitute the so-called PLL (phase locked loop) circuit having a large moment of electrical inertia, the frequency of the horizontal sawtooth wave current fHv finally derived from the horizontal drive circuit 38 does not fluctuate in spite of the lack of the several horizontal synchronous pulses HP.
While a playback picture is stabilized in the special playback mode ofthe VTR as stated above, the switch S2 is held in the "off" state by circuit operations described below. The 262.5 H-delay circuit 37 is supplied with the frequency signal fo of 2.fH as the clock signal, and counts the clock pulses in succession. In addition, it is supplied with the vertical pulse fvP derived from the 1/525 counter 36, as the reset signal.
As a result, it supplies the AND circuit 51 with an output signal Vo each time it counts 525 pulses. In other words, the output signal Vo is shifted by 262.5 H. When the output signal Vo has coincided with the output signal VRP described in conjunction with waveform (C) of Figure 4, the output signal Vo' of the AND circuit 51 is supplied to a RAM 52. This RAM 52 is provided with a decision circuit (not shown).
Such output signals Vo' are sequentially memorized in predetermined addresses of the RAM 52. Subsequently, a deciding operation based on the output signal ofthe RAM 52 is carried out. Herein, during the special playback mode of the VTR, the ratio between the horizontal synchronous signal fH and the vertical synchronous signal fv is fH/v = 262.5 H - 3 H = 259.5 H as already stated.
Accordingly, the output signal Vo ofthe 262.5 H-delay circuit 37 and the output signal VRP of the voltage comparator 42 do not become the high level simul taneously, so that a control sig nal fortu rning "on" the switch S2 is not provided from the RAM 52. Consequently, the switch S2 hold the "off" state, and the voltage signal VRP iS supplied to the 1/525 counter 36 through the switch Si as the reset signal.
Therefore, in the case where the VTR is in the special playback mode such as the fast playback, the voltage signal VP produced in correspondence with the additional pulseVP"actsto resetthe 1/525 counter 36, and the stable vertical synchronous pulse fvP is provided, whereby the playback picture is stabilized.
Next, there will be described circuit operations in the case where the VTR has been switched to the normal playback mode.
In this case, the ratio between the frequency fH of the horizontal synchronous pulse HP and thatfvofthe vertical synchronous pulse VP contained in the signal detected by the playback head oftheVTR is held atthe aforementioned value of 262.5. In the television receiver of Figure 3, accordingly, the frequency ofthe output signal HP' of the frequency divider circuit 35 agrees with the frequency fH = 15750 Hz of the horizontal synchronous pulse HP, and the 1/525 counter circuit 36 transmits one output pulse signal fvPwhen it has counted 525 output signal pulses of the voltagecontrolled oscillator circuit 34 at the oscillation frequency of 2.fH = 31500 Hz.Accordingly, the frequency of the output pulse signal fv of the 1/525 counter circuit 36 becomes 31500 Hz/525 = 60 Hz, and it can agree with the frequency 60 Hz of the vertical synchronous pulse VP contained in the signal detected by the playback head of the VTR in the normal playback mode thereof.
Afterthe 1/525 counter circuit 36 has delivered one output pulse signal fv in synchronism with the vertical synchronous pulse VP in this manner, it needs to be reset to bring its count content back to zero. The resetting operation ofthe 1/525 counter circuit 36 will now be described.
In this case, the playback signal is not formed with the additional pulse VP", and the video signal Vi and the horizontal synchronous signal HP as shown by phantom lines in Figure 2 appear in the position corresponding to the additional pulse VP". Unlike the aspect in the foregoing case, accordingly, the voltage signal fv' which is derived from the low-pass filter 41 does not lower in the position corresponding to the additional pulse VP". Therefore, the voltage signal fv' does not become lower than the reference voltage V2, and the output signal fv" of low level is not produced, either.Further, the output voltage Vi of the integrator 44 becomes higher in the voltage level than the reference voltage V3 of the voltage comparator 45 at all times. As a result, an H level part does not appear in the output signal Pc ofthe voltage comparator45, and the L level continues. Accordingly, the switch S1 continues the "off" state when the VTR is in the normal playback mode.
On the other hand, the 262.5 H-delay circuit 37 performs the circuit operation described above. In this case, however, the error corresponding to 3 H of the horizontal synchronous signal is not involved.
Accordingly, the output signal Vo ofthe 262.5 H-delay circuit 37 is synchronised with the voltage signal VRP, so that the output signal Vo' of high level is provided from the AND circuit 51. The RAM 52 memorizes such output signals Vo' in succession and records them in predetermined addresses.When the switch S. is in the "off" state, the control signal Pc' is provided from the decision circuit of the RAM 52 to change-overthe switch S2 into the "on" state.
Owing to the above operations, the high level voltage signal VRP synchronous with the vertical synchronous pulse VP of 60 Hz is supplied to the 1/525 counter 36 through the switch S2 as the reset signal.
The circuit operations of the 1/525 counter 36 are performed similarly to those in the special playback mode stated above. In the case where the normal playback operation is carried out in this way, the reset signal or the voltage signal VRPforthe 1/525 counter 36 may be supplied 2 to 4 times.The reason is as stated below.
The 1/525 counter circuit 36 is reset by the voltage signal VRP synchronous with the vertical synchronous pulse VP of 60 Hz, with the result that the 1/525 counter circuit 36 generates one output pulse signal fvP in synchronism with the vertical synchronous pulse VP. Thereafter, the counter circuit 36 returns the count contentto zero automaticaliy and immediately.
Accordingly the 1/525 counter 36 can count the frequency signal fvP without any erroneous operation, after resetting operations of 2 to 4 times.
According to a preferred embodiment, after the 2 4 resetting operations have been performed, the control Pc' is cut off by the circuit operation of the RAM 52. The switch S2 falls into the "off" state, and the control signal Pc' is not supplied to the 1/525 counter 36. Accordingly, the 1/525 counter 36 is not supplied, through the reset terminal thereof, with electrical noise generated by the various circuits, noise components induced in wiring. As a result, the 1/525 counter 36 does not undergo any erroneous operation and effects a very stable counting opera tion.
Owing to the circuit operations described above, the frequency ofthe vertical pulsefvPwhich is derived from the 1/525 counter 36 is stabilized, and the sawtooth current fvs synchronous with the vertical pulse fvP is also stablized. Even in the normal playback mode, therefore, a picture projected on the picture tube 22 does not flow upwards or downwards.
The present invention brings forth the following effects: (a) By detecting that the additional pulse of the special playback mode of the VTR is formed, the counter circuit for producing the vertical deflection signal can be reset in the high level interval of the signal Pc by the signal VRPwhich is substantially syn chronous with the additional pulse. This achieves the effect that the vertical synchronous pulse is stabil ized.
(b) In the case where the additional pulse is not formed, the counter circuit is reset only in the initial condition, and the reset signal supplying circuit is thereafter turned "off". This achieves the effect that the counter circuit is not unnecessarily reset by noise components,so the vertical synchronous pulse is stabilized.
Although the invention has been described with reference to the specific embodiment shown in the drawings, a number of modifications are possible.
For example, the signal fv' to be derived from the low-pass filter 41 and the succeeding signals VRP, fv", Vi and Pc may well have their phases inverted to those shown in waveforms (B) to (F) of Figure 4.
Further, while the additional pulse VP" is set for the 3 H time in the described embodiment, it may well have a shorter duration or a longer duration.

Claims (5)

1. A television receiver including: (a) a synchronous separator circuit which separates a horizontal synchronous signal and a vertical synchronous signal from a video signal; (b) an oscillator circuit which produces an output having a frequency in a predetermined relation to a frequency of the horizontal synchronous signal derived from an output terminal of said synchronous separator circuit; (c) a first frequency divider circuit which divides the frequency ofthe output ofsaid oscillator circuit, in order to produce horizontal synchronous pulses; (d) a second frequency divider circuit which divides the frequency of the output of said oscillator circuit, in order to produce vertical synchronous pulses; and (e) an additional pulse detector circuit which detects whether or not an additional pulse in a special playback mode of a video tape recorder is contained in the video signal, the vertical synchronous pulse for the special playback mode being generated on the basis of a detection output signal of said detector circuit.
2. A television receiver according to claim 1, wherein said oscillator circuit is included in a PLL circuit, which detects a difference between the phase of the horizontal synchronous signal derived from the output terminal of said synchronous separator circuit and the phase of the output signal of said first frequency divider circuit so as to control the frequency of said oscillator circuit in accordance with the phase difference.
3. A television receiver according to claim 2, further comprising: (f) a radio frequency amplifier circuit; (g) a local oscillation circuit; (h) a frequency mixer ci rcuit to which an output of said radio frequency amplifier circuit and an output of said local oscillation circuit are applied; and (i) a video intermediate frequency circuit which responds to an output signal of said frequency mixer circuit; wherein a signal from the video tape recorder is applied to said radio frequency amplifier circuit.
4. Atelevision receiver according to any of claims 1 to 3, wherein said first frequency divider circuit executes a half frequency division; wherein the fre quencyoftheoutputsignal ofsaidoscillatorcircuitis set at double the frequency of the horizontal synchronous signal derived from the output terminal of said synchronous separator circuit, and wherein said second frequency divider circuit executes 1/525 frequency division.
5. Atelevision receiver constructed and arranged to operate substantially as herein described with reference to and as illustrated in the accompanying drawings.
GB08403594A 1983-03-16 1984-02-10 A television receiver Expired GB2137452B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58042195A JPS59169286A (en) 1983-03-16 1983-03-16 Tv receiver

Publications (3)

Publication Number Publication Date
GB8403594D0 GB8403594D0 (en) 1984-03-14
GB2137452A true GB2137452A (en) 1984-10-03
GB2137452B GB2137452B (en) 1986-06-25

Family

ID=12629222

Family Applications (1)

Application Number Title Priority Date Filing Date
GB08403594A Expired GB2137452B (en) 1983-03-16 1984-02-10 A television receiver

Country Status (6)

Country Link
JP (1) JPS59169286A (en)
KR (1) KR840008250A (en)
DE (1) DE3402667A1 (en)
FR (1) FR2542954A1 (en)
GB (1) GB2137452B (en)
IT (1) IT1173432B (en)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3573350A (en) * 1967-09-28 1971-04-06 Sylvania Electric Prod Color television receiver and color video tape recorder system
JPS521847B2 (en) * 1972-03-31 1977-01-18
NL7409514A (en) * 1974-07-15 1976-01-19 Philips Nv TELEVISION SYSTEM WITH A VIDEO STORAGE DEVICE AND A TELEVISION RECEIVER.
US4025951A (en) * 1976-06-09 1977-05-24 Gte Sylvania Incorporated Vertical synchronizing circuit having adjustable sync pulse window
US4025952A (en) * 1976-06-09 1977-05-24 Gte Sylvania Incorporated Vertical synchronizing circuit

Also Published As

Publication number Publication date
DE3402667A1 (en) 1984-09-20
GB8403594D0 (en) 1984-03-14
IT8419893A0 (en) 1984-03-02
FR2542954A1 (en) 1984-09-21
JPS59169286A (en) 1984-09-25
IT1173432B (en) 1987-06-24
KR840008250A (en) 1984-12-13
GB2137452B (en) 1986-06-25

Similar Documents

Publication Publication Date Title
CA1252880A (en) Multi-system television receiver
US5245430A (en) Timebase corrector with drop-out compensation
US4078212A (en) Dual mode frequency synthesizer for a television tuning apparatus
US4821112A (en) Detection circuit for detecting standard television signals and nonstandard television signals
CA1050157A (en) Color video reproducing apparatus
CA1143830A (en) Television horizontal afpc with phase detector driven at twice the horizontal frequency
US4536794A (en) Television receiver having different receiver synchronizing characteristics in response to television signal
CA1186410A (en) Video disc player having auxiliary vertical synchronizing generator
GB2137452A (en) A television receiver
US4193085A (en) Apparatus for removing jitter in color television signal
US5404230A (en) Color burst phase correcting color signal reproducing circuit
US4490750A (en) Apparatus for reproducing a video signal
US4745493A (en) Circuit arrangement for a color image recording and reproduction instrument or a color television receiver
CA1262281A (en) Multi-system television receiver
JPS6132876B2 (en)
JPS60126972A (en) Television receiver
EP0140567A2 (en) Apparatus for controlling the frequency of a voltage controlled oscillator
US4367494A (en) Video recorder-player and horizontal sync separator therefore
KR900000126B1 (en) Multi-system television receiver
JP2638937B2 (en) YC separation control circuit
JPH0134511B2 (en)
JPS59191970A (en) Picture receiver
JPH0241976Y2 (en)
JPH0253996B2 (en)
JPS6133309B2 (en)

Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee