JPS59191970A - Picture receiver - Google Patents

Abstract

PURPOSE:To stabilize the vertical synchronizing pulse by resetting a counter circuit which obtains a vertical deflecting signal with a signal approximately synchronous with an additional pulse of a special reproduction mode in a production mode of said pulse and resetting the counter circuit in its initial state in other cases. CONSTITUTION:In a high-speed reproduction mode, an output signal f''v is obtained from a voltage comparator 43 when the voltage signal f'v obtained by integrating a reproduction signal fp is smaller than the reference voltage V2. While an output signal PC of an H level is obtained from a voltage comparator 45 when the output voltage Vi of an integration circuit 44 is set at a low level. Then a switch S1 is closed. In this case, a high-level output signal VRP of a voltage comparator 42 is supplied to a 1/525 counter 36 via the switch S1. Therefore the counter 36 is assuredly reset once by the signal VRP every time an additional pulse V''P appears. As a result, a vertical sawtooth current fvs is obtained from a vertical drive circuit 39.

Description

[Detailed description of the invention] 〔Technical field〕 The present invention relates to a receiver such as a television.

[Background technology]

On the other hand, in recent years, a method has been proposed for television receivers in which a horizontal synchronization signal and a vertical synchronization signal are obtained from the output signal of a synchronization separation circuit using a counting circuit, that is, a countdown synchronization processing method.

Since the vertical oscillation circuit is omitted in such a countdown synchronization type television receiver, the complicated adjustment work of the free-running oscillation frequency of the vertical oscillation circuit, which was conventionally necessary, can be omitted.

By the way, the nominal frequency f□ of the horizontal synchronization signal in NTSC broadcasting received by a television receiver is 15750.
Hz, and the nominal frequency of the vertical synchronization signal is 262.5.

By the way, television receivers can be used for many purposes other than simply receiving broadcast waves and displaying a screen.

For example, a television receiver may be connected to a magnetic recording/reproducing device (hereinafter referred to as a VTR) to reproduce video and audio signals recorded on the magnetic tape.

When the VTR is in the normal playback mode, the plurality of recording tracks sequentially formed on the magnetic tape match the trajectories of the first and second playback heads. Then, from the first and second playback heads, the video signal, two-color signal, horizontal,
Vertical synchronization signals should be obtained, and a stable screen should be displayed on the television receiver.

That is, when the VTR is in normal playback mode.

The frequency fH of the horizontal synchronization signal and the frequency f of the vertical synchronization signal included in the video signal detected by these playback heads
Since v is maintained at the above-mentioned ratio (ie, 262.5), the synchronization condition is satisfied in both horizontal and vertical deflections, and a stable screen can be obtained.

However, VTRs have so-called special playback functions such as still image playback, slow motion playback, and high speed playback. Taking the case of high-speed playback as an example, as the running speed of the magnetic tape increases, the trajectories of the first and second playback heads begin to trace each of the adjacent recording trunks. Therefore, the recording track and the trajectories of the first and second reproducing heads no longer match.

Furthermore, as is well known, since a plurality of recording tracks are arranged diagonally with respect to the longitudinal direction of the magnetic tape, the starting point of two adjacent recording tracks is 1.5 in terms of time.
There is a distance difference of H (H is □ seconds, that is, the period of the horizontal synchronization signal 5750). In addition, the distance between the starting point and ending point of one recording track is 2 when converted to 1 hour.
It has a length of 62.5H.

On the other hand, one playback head can trace N adjacent recording tracks during high-speed playback of a VTR. Then, the distance between the starting point and the ending point of this high-speed trace becomes 262.5H-(N-1)Xi, 5H when converted into time. Therefore, when a single playback head traces the N@ recording track during high-speed playback of a VTR, the ratio between the frequency of the horizontal synchronization signal and the vertical synchronization signal contained in the video signal detected by the playback red is as described above. y, :262.5
becomes smaller than the value.

Therefore, during high-speed playback of such a VTR, the VTR
If the ratio of the horizontal and vertical deflection frequencies of the television receiver connected to it is held at the above-mentioned value of 262.5, the vertical synchronization of the high-speed trace of the VTR and the vertical synchronization of the television receiver becomes inconsistent.

On the other hand, it goes without saying that in a VTR, the video signal, horizontal synchronization signal, vertical synchronization signal, etc. recorded on one recording track can only be reproduced by one playback head. During high-speed playback, while the i@ playback head shifts from the first recording trunk to the next adjacent recording track, normal video signals and synchronization signals are not obtained, and the output signal of the playback head is only noise.

On the other hand, during such high-speed playback, the adjacent 2Nf
One playback head executes two traces on the recording track of
It is necessary to detect the saliva direct synchronization signal between the traces. However, while the playback head is shifting from the first trace to the second trace, no vertical synchronization signal is obtained from the playback head and only noise is obtained, resulting in a synchronization error and the screen on the television receiver being distorted. Or it starts to flow downward.

To prevent this phenomenon, when playing back a VTR at high speed, V
TR is a pulse signal with a time width corresponding to 3 to 5 horizontal synchronization signals and a period of 262.5H-(N-1>Xl, 5H) between the horizontal synchronization signal and the vertical synchronization signal. This additional pulse is added to the equivalent pulse. This additional pulse is added only during special playback and is not recorded on the magnetic tape.

When a general television receiver that has a horizontal oscillation circuit and a vertical oscillation circuit receives a video signal from a VTR during high-speed playback, the horizontal oscillation circuit oscillates.

The frequency matches the frequency of the horizontal synchronizing signal in this video signal, and the oscillation frequency of the vertical oscillation circuit matches the frequency of the additional pulse in this video signal. Therefore, the ratio of the horizontal deflection frequency to the vertical deflection frequency of this television receiver is 26.
2.5, and the vertical synchronization of the VTR's high-speed trace matches the vertical synchronization of the television receiver.On the other hand, when a conventional countdown branding type television receiver is connected to the VTR, the VTR V at a constant count regardless of whether it is in normal play mode or special play mode.
A vertical output signal is formed by counting horizontal synchronization signals from the TR.

Therefore, in this case, the ratio of the horizontal deflection frequency to the vertical deflection frequency of the television receiver using the countdown processing method is 2.
625, and a synchronization error occurs, causing the screen of the television receiver to flow upward or downward. [Object of the Invention] The object of the present invention is to prevent Another object of the present invention is to provide a television receiver that can display a stable screen on a picture tube.

[Summary of the invention]

A brief summary of the invention disclosed in this application is as follows. That is, it is detected whether or not an additional pulse is formed in the synchronization signal, and when the additional pulse is detected, a vertical signal is generated, thereby improving the screen quality, which is the object of the present invention.

[Embodiment] An embodiment of the present invention will be described below with reference to FIGS. 1 to 3.

First, with reference to FIG. 1, the causes of fluctuations in the frequency ratio between the horizontal synchronizing signal axis and the vertical synchronizing signal fv will be described.

In each recording track cH, CH2, . Further, C is an audio signal track, and D is a control signal track.

Note that the magnetic tape T runs in the direction of arrow a.

When the VTR is in normal playback mode, recording tracks CH,
and the trajectory A of the first playback head (not shown) match,
A detection output signal for one field is obtained. Furthermore, the recording track CH and the trajectory of the second reproducing head (not shown) match, and a detection output signal for the next one field is obtained. It is assumed that the starting points of each recording track CH, CH2, . Then, one frame of screen is projected on the picture tube of the television receiver, which will be described later, using the reproduction signals obtained from the recording tracks CH, CH2, that is, the detection output signals of the first and second reproduction heads. For example, during reproduction, the magnetic tape T is run at high speed in the direction of arrow a, and the first reproducing head traces A.
As shown by the shaded area A' in FIG. 11, the second playback head also traces a plurality of recording tracks, as shown by the shaded area B' in FIG. Now you can trace the track.

During high-speed playback as described above, a playback signal f having a waveform as shown in FIG. 2 is sent from the VTR to the television receiver.
P will be supplied, ie, etc. are the vertical sync pulses, are the equivalent pulses, and 㑑〃 are the additional pulses. The additional pulse ``'' supplied by the VTR during special playback of the VTR has a time width equivalent to 3 to 5 periods of the horizontal synchronizing pulse HP. Signal 1 is reproduced in normal reproduction mode.

111+] distance from the starting point to the ending point of the recording track m
('1 field) is 262.5H when converted into time. As shown in Figure 1, when one playback head traces three adjacent recording tracks diagonally during high-speed playback of a VTR, the distance between the starting point and end point of this high-speed tracing is 262.5H when converted into time. -(3-1)Xl
, 5H=259.5H.

The reproduced signal fP shown in FIG. 2 is then supplied from the VTR to the input terminal (usually a UHF antenna terminal) of the television receiver.

Hereinafter, the circuit operation of a television receiver to which the present invention is applied will be described with reference to FIGS. 3 and 4.

The reproduced signal fP during high-speed reproduction shown in FIG. 2 is supplied to the high frequency amplifier circuit 2, and its output signal fP' is supplied to the frequency mixing circuit 3. The local oscillation circuit 4 outputs an output signal fP
A frequency fL that is always higher by 5875 MH2 than the carrier frequency of ' is supplied to the frequency mixing circuit 3. Note that the frequency fL is a frequency for a video carrier wave. The output signal fM of the frequency mixing circuit has a frequency that is the difference between the output signal fP' and the frequency signal fL.

The output signal f1 of the video intermediate frequency circuit 5 is the video signal ■52
This is a so-called color television signal that includes a color signal, a horizontal synchronization signal fH9, a vertical synchronization signal fV, an audio signal, and the like. The output signal f is the audio signal processing system 11/video signal processing system 129.
Color signal processing system 13. The signal is supplied to each circuit block of the synchronization signal processing system 14. The audio signal processing system 11 includes an FM detection circuit and an amplifier circuit, and provides audio output from the speaker 19. The video signal processing system 12 includes a video detection circuit, a video amplification circuit, etc., and obtains a luminance signal Y. Color signal processing system 13
is composed of a band amplification circuit, a two-color demodulation circuit, a matrix circuit, a two-color output circuit, a burst amplification circuit, a one-color subcarrier oscillation circuit, a transfer circuit, and the like. The color output circuit is supplied with the luminance signal Y, and the color output circuit is supplied with the luminance signal Y from the matrix circuit.
-Y, G-Y.

A B-Y color difference signal is supplied. Then, color signals of R (red), G (green), and B (red) are obtained from the primary color output circuit and supplied to each cathode of the picture tube 22.

Next, the circuit operation of the synchronization signal processing system 14 will be described.

The synchronization separation circuit 31 separates the horizontal synchronization signal fH2 and the vertical synchronization signal fv from the color television signal f, and passes the bypass filter 32. It is supplied to a low-pass filter 41. From the bypass filter 32, a horizontal synchronizing pulse HP shown in FIG.
Only differential pulses synchronized with are obtained and supplied to the next stage automatic phase control circuit 33. The automatic phase control circuit 33 includes the horizontal synchronizing pulse HP and a 1/2 force counter circuit (described later).
The oscillation frequency f of the voltage controlled oscillation circuit 34 is compared with the output signal HP of the frequency dividing circuit 35, and the output signal VC of the voltage level corresponding to the phase difference between the two is used.
Set 0 to 2 cells a [l-f.

Oscillation frequency f. is 1/ to obtain the horizontal synchronization signal fH.
It is supplied to the 2-power counter circuit 35, and is also supplied to the 11525-power counter circuit 36 to obtain the vertical synchronization signal fv, and is further supplied to the 262.5H delay circuit 3 as a clock signal.
7. A pulse signal I (1') with a frequency of 15,750 Hz is obtained from the 1/2 force counter circuit 35, and AP
C circuit 33. The signal is supplied to the horizontal drive circuit 38. A horizontal sawtooth reduction current 'Is with a frequency of 15,750 Hz is obtained from the horizontal drive circuit 38, and is supplied to the horizontal deflection coil of the deflection coil 21. Also, when the VTR is in the normal playback mode, a 11,525 force counter current is obtained from the power counter circuit 36. is frequency 6
'0Hz pulse signal fvP is obtained and supplied to the vertical drive circuit 39. A vertical saw reduction current fvs of frequency 60H2 is obtained from the vertical drive circuit 39, and vertical deflection coil.

On the other hand, when the VTR is in the high-speed reproduction mode, a voltage signal fv' obtained by integrating the signal fP is obtained from the low-pass filter 41 as shown in FIG. 4). The voltage signal fv.
is supplied to a voltage comparator 43 provided with. Note that the voltage level of the reference voltages V, , V, is set to <V + >V t as shown in FIG.

Now, looking at the change in the voltage level of the voltage signal fv',
As shown in FIG. 2 (CB), the portion corresponding to the additional pulse ■P# decreases significantly, then rises, and then further decreases gently at the portion corresponding to the vertical synchronizing pulse ■2.

Therefore, by setting the reference voltage V to a desired voltage level, the output voltage vRP as shown in FIG. 4 (C1) is obtained from the tE comparator 42.The output voltage VRP is 1
It should be noted here that it is supplied to one end of the switches S, , S, to be used as a reset signal for the 1525 counter 36, and at the same time, it is also supplied to the input terminal of the AND circuit 51 as a gate signal. This is a series of circuit operations from 43 to switch S1.

In the voltage comparator 43, the reference voltage ■ and the voltage signal fv
A voltage comparison is made with ′. Then, while the voltage level of the voltage signal fV' is lower than the reference voltage V2, the fourth
Low level (L level) output signal fV as shown in Figure 0
′ is obtained. This output signal fv2 is the additional pulse VP
is obtained only when the voltage signal fv' is significantly reduced by '. Therefore, the output signal fv' is the additional pulse ■P
It can be said to be the detection signal of #, and the low level output signal f
Depending on the presence or absence of v', it is determined that the mode has been switched to VTR or special playback.

The output signal fv'' is supplied to the next-stage integrating circuit 44. The output voltage ■i of the integrating circuit 44 gradually decreases in response to the L level period of the output signal fv' as shown in FIG. , and then gradually rises in response to the high level (H level).The output voltage .

The reference voltage V is applied to the non-inverting input terminal (+) of the voltage comparator 45.
3 is applied. Output voltage ■ with respect to reference voltage V3
1 is at a low level, an output signal PC of H level as shown in FIG. 2 (D) is obtained from the voltage comparator 45. Although the switch S is shown as a mechanical structure in FIG. 3, an electronic switch is actually used.The switch S1 is supplied with an output signal P. When the switch S operates in the on state, in other words in the closed state.

, the VTR is switched to special playback and the additional pulse VP''
is switched to the on state only when supplied.

By the way, as is clear from comparing FIG. 4 0(F), the output signal P. When is at H level and the switch Sl is on, the high level output signal RP of the voltage comparator 42 is supplied to the 11525 counter 36 via the switch S. Therefore, the 11525 counter 36 is reliably reset by the high level output signal VRP once every time the additional pulse 2'' appears.

Therefore, by resetting the 11525 counter 36, the vertical saw current f is caused by the vertical drive circuit 39.
vs is obtained.

For the above reasons, when the television receiver according to this embodiment receives the signal fP from the VTR during high-speed reproduction, a horizontal sawtooth current wave is obtained from the horizontal drive circuit 38. The frequency of t matches the frequency of the horizontal synchronizing pulse H9 included in this signal fP, and the frequency of the vertical saw current fvs obtained from the vertical drive circuit 39 matches the frequency of the additional pulse P' included in this signal fP. Therefore, the ratio of the horizontal deflection frequency to the vertical deflection frequency of this television receiver is less than 262.5, and the vertical synchronization of the VTR's high-speed trace matches the vertical synchronization of the television receiver. can get.

During high-speed playback of a VTR, the first playback head traces the magnetic strip T along the shaded area A' as shown in FIG. Several horizontal synchronization pulses HP are missing from the detected output signal obtained from the first read head during the gap between.

However, the automatic phase control circuit 33. Voltage controlled oscillation circuit 34. The 1/2 force counter circuit 35 is a so-called PLL (PhaseLocke) with a large electrical moment of inertia.
d Loop) circuit, the horizontal drive circuit 38
The frequency of the horizontal saw current fHv finally obtained from the above does not change.

As described above, while the playback screen is being stabilized during special playback of the VTR, the switch S2 is turned off by the circuit operation described below.

In other words, the 262.5H delay circuit 37 has 2 f H
(7) Frequency signal f. is supplied as a clock signal,
This is counted sequentially. Further, the vertical pulse fVP obtained from the 11525 counter 36 is supplied as a reset signal. As a result, the output signal ■ is shifted by 262.5H every time 525 counts are made. is supplied to the AND circuit 51. When the output signal 0 and the output signal vRP described in FIG. 2 (C1) match, the AND circuit 5
1 output signal■. ' is supplied to the RAM 52. Furthermore, R
AM52 includes a determination circuit (not shown). Then, the above m force signal ■
0' is sequentially memorized. Next, a judgment operation is performed on the output signal of the RAM 51. At this time, the VT
-3H=259.5H. Therefore, 262.5H
Output signal ■ of the delay circuit 37. and the output signal of the voltage comparator 42■8. Since it does not become a level at the same time as RAM
A control signal for turning on the switch S2 cannot be obtained from the switch S2. Therefore, the switch St maintains the off state,
Since the voltage signal RP will be supplied as a reset signal to the 11525 counter 36 via the switch Sl, when the VTR is performing special playback such as high-speed playback, the voltage obtained in response to the additional pulse By signal vP,
The 11525 counter 36 is reset, a stable vertical synchronization pulse fvP is obtained, and the playback screen is stabilized.

Next, the circuit operation when the VTR is switched to the normal reproduction mode will be described.

In this case, the ratio between the frequency fH of the horizontal synchronizing pulse HP and the frequency fv of the vertical synchronizing pulse 2 contained in the signal detected by the reproducing head of the VTR is maintained at the value of 2625 described above. Therefore, in the television receiver of FIG. 3, the frequency of the output signal HP° of the 1/2 power counter circuit 35 is the frequency f of the horizontal synchronizing pulse HP, = 15750H2
When 525 output signal pulses of the voltage controlled oscillation circuit 34 with an oscillation frequency of 2fH=31500 Hz are counted, the 11525 force counter circuit 36 sends out one output pulse signal fvP. Therefore, the frequency of the output pulse signal fV of the 11525 force counter circuit 36 is 31500Hz1.
525=60Hz, which can match the frequency of 60Hz of the vertical synchronizing pulse VP included in the signal detected by the playback head of the VTR in the normal playback mode of the VTR.

In this manner, the 11525 output counter circuit 36 must be reset after sending out one output pulse signal fV in synchronization with the vertical synchronizing pulse VP to return the count to zero. The reset operation of the 11525 power counter circuit 36 will be explained below.

In this case, the additional pulse ``P'' is not formed in the reproduced signal, and the video signal ``i'' as shown by the imaginary line in FIG.
'It's obvious. Therefore, unlike the case described above, the voltage signal fv' obtained from the low-pass filter 41 does not drop at the position corresponding to the additional pulse P'. Therefore, the voltage signal f
v' does not fall below the reference voltage N, and a low novel output signal fv'' is not obtained.Furthermore, the integrator 44
The output voltage Vi of the voltage comparator 440 is always at a higher voltage level than the reference voltage V3. As a result, voltage comparator 45
output signal P. The KH level part does not appear and the L level continues. Therefore, switch S remains off when the VTR is in normal playback mode.

On the other hand, the 262.5H delay circuit 37 performs the circuit operation described above, but in this case there is no error corresponding to the horizontal synchronization signal 3H.

Therefore, the output signal of the 262.5H delay circuit 37 is ■. Since the voltage signal VRP and the voltage signal VRP are synchronized, the AND circuit 51 outputs a high level signal ■. ′ is obtained. RAM52 receives the above output signal ■. I is sequentially memorized and recorded at a predetermined address. When the switch S is in the off state, the RAM 52
Control signal P from the 0 judgment circuit. r is obtained and switch S2
Switch to on state.

By performing the above operation, a high level voltage signal V synchronized with the 60 Hz vertical synchronizing pulse vP is supplied to the 11525 counter P36 as a reset signal via the switch S2.
The circuit operations of counter 36 and below are performed in the same manner as the circuit operations during special playback described above. In this manner, when a normal playback operation is performed, the reset signal supplied to the 11525 counter 36, that is, the voltage signal
4 times of supply is sufficient. The reason for this is as follows.

That is, the 11525 power counter circuit 36 is reset by the voltage signal VRP synchronized with the 60 Hz vertical synchronization pulse 2, and as a result, the 11525 power counter circuit 36 is reset in synchronization with the vertical synchronization pulse 2.
output pulse signal fv, 11525 counter circuit 3
After generating 11525, the counter circuit 36 automatically and immediately returns the count to zero.
The counter 36 can count the frequency signal fVP without error by performing two to four reset operations.

According to the preferred embodiment, after 2 to 4 reset operations are performed, the RAM 520 circuit operation controls the ? MJ signal Pc' is cut off. The switch S2 is turned off, and the control signal Pc' is no longer supplied to the 11525 counter 36. Therefore, electrical noise generated from each circuit, noise components induced in wiring, etc. are not supplied to the 1/525 counter 36 as a reset signal.

As a result, no malfunction occurs in the V525 counter 36,
Extremely stable counting operation is performed.

By the above-described circuit operation, the frequency of the vertical pulse fvP obtained from the 11525 counter 36 is stabilized, and the sawtooth current fv8 synchronized with this vertical pulse fvP is also stabilized. Therefore, even in the normal reproduction mode, the screen displayed on the picture tube 22 does not move up and down.

〔effect〕

+11 By detecting the formation of the additional pulse of the special reproduction mode of the VTR, the counter circuit for obtaining the vertical deflection signal can be reset to the high level P period of the signal PC by the signal V which is almost synchronized with the additional pulse. Therefore, the effect that the vertical synchronization pulse is stabilized can be obtained.

(2) If no additional pulse is formed, the above-mentioned counter circuit is reset only in the initial state,
After that, the reset signal supply circuit is cut off, so that the counter circuit is not reset unnecessarily due to noise components, etc., and the vertical synchronization pulse is stabilized.

The invention made by the present inventor, Isobaru, has been specifically explained based on examples, but the present invention is not limited to the above-mentioned examples, and can be modified in various ways without departing from the gist thereof. Needless to say, for example, the signal fv' obtained from the low-pass filter 41
Each of the following signals RP, fv'', V, Po, etc. may have a phase opposite to that shown in FIG. It may be a smaller time range than this (although it may be a larger time range).

[Application field]

The present invention can be applied to a television receiver or a display device configured to obtain at least horizontal and vertical synchronization signals using a countdown processing method.

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram showing the relationship between the recording track and the locus of the playback head when the VTR performs special playback, Fig. 2 is a waveform diagram showing an example of additional pulses during special playback, and Fig. 3 is the invention of the present invention. FIG. 4 is a waveform diagram for explaining the circuit operation of the television receiver to which the above-mentioned television receiver is applied. 14... Synchronous signal processing system, 41... Low pass filter, 42, 43.45... Voltage comparator, 44... Integrating circuit, 36... 11525 counter, 37... 2
62.5 H delay circuit, 51...AND circuit, 52.
...RAM. s,,'s2...Switch, f...Vertical synchronization signal, Vpp...Vertical synchronization pulse, VP'...Equivalent pulse, ■P
'...additional pulse, PC...control signal, fv'...
・Voltage signal, fV''...-Output signal, ■1... Output voltage, VRP... Output voltage, V,, V2, V,...
Reference voltage.

Claims (1)

[Claims] 1. In a receiver that forms a vertical signal using a counter, a vertical signal is generated based on the additional pulse during a period when the additional pulse is added to a synchronization signal including horizontal and vertical synchronization signals. 2. A television receiver formed using a vertical signal counter, which detects whether an additional pulse is added to a synchronization signal including horizontal and vertical synchronization signals. 2. The receiver according to claim 1, further comprising an additional pulse detection mechanism, and a structure configured to generate a vertical signal based on the output when an additional pulse is detected by the additional pulse detection mechanism. .