GB2136223A - Saturable Reactor Snubbing of Thyristors - Google Patents

Abstract

A thyristor bridge circuit 28 is provided with saturable reactors 40, 58 in the commutation loop circuits of the thyristors 42, 56. The saturable reactors are arranged to prevent the capacitance of the thyristors "ringing" with inductance in the commutation loop circuits during commution, which might otherwise cause the peak reverse voltage rating of the thyristors to be exceeded. Thus, each saturable reactor is arranged to saturate when its associated thyristor is turned on but is arranged so as to be almost saturated at the peak reverse current of its associated thyristor when that thyristor is being turned-off. <IMAGE>

Description

SPECIFICATION Electrical Thyristor Bridge Circuits This invention relates to electrical bridge circuits in which thyristors are employed to control the flow of current to a load circuit. Such electrical bridge circuits will be referred to hereafter as "electrical bridge circuits of the kind referred to".

Such a bridge circuit may comprise a rectifier bridge circuit supplying a direct current load, or an inverter bridge circuit supplying an alternating current load, the thyristors being controlled in known manner in order to control the flow of current to the load.

Commutation of current (particularly in inverter circuits) from one bridge circuit thyristor to another can give rise to the generation of a large reverse voltage across the thyristor in which the current flow is being terminated. It is essential to prevent that reverse voltage rising to an unsafe value so as to obviate the possibility that such thyristor might break down under such reverse voltage conditions.

It is known in connection with inverter circuits to connect a reverse voltage "snubbing circuit" in parallel with each thyristor, which snubbing circuit comprises a resistor and a capacitor connected in series with one another. Moreover, it is known to connect in such an arrangement a reactor in series with each such thyristor, each such reactor being air-cored and non-saturating.

Alternatively, equivalent reactors (again air-cored and non-saturating) are connected in the A.C.

lines supplying the A.C. power for the inverter circuit.

Disadvantageously, these known snubbing circuits necessarily involved the undesirable dissipation of energy and the consequent lowering of efficiency of the inverter circuit.

It has been found that satisfactory snubbing of the reverse voltage spikes due to commutation can be achieved without the use of such resistorcapacitor circuits, by substituting for the aforesaid non-saturating reactors other reactors which are designed to saturate at the appropriate instantaneous current magnitude.

According to the present invention a thyristor bridge incorporates a saturable reactor in series with an associated thyristor in a commutation loop circuit of the bridge.

Each such reactor is preferably designed and constructed so as to be almost saturated at the peak reverse current of its associated thyristor.

An electrical bridge circuit according to the present invention may comprise part of an electrical inverter unit for supplying variable frequency A.C. power to a load from a D.C. supply source. Alternatively, such a bridge circuit may comprise part of an electrical rectifier unit for supplying variable voltage D.C. power to a load from an A.C. supply source.

Other features of the present invention will appear from the following description, with reference to the accompanying drawings, of one example of an electrical converter unit supplying a three phase squirrel cage induction motor, which converter unit incorporates an inverter unit having an electrical bridge circuit according to the present invention.

In the drawings: Figure 1 shows the principal circuit connections of the converter unit and its motor load circuit; Figures 2 and 3 show on the relevant parts only of the circuit of Figure 1 the load current path at two successive stages just before and just after initiating commutation of the motor load current from one thyristor to another when the latter is rendered conductive; and Figures 4 and 5 each show oscillograms of the reverse voltage appearing across and the reverse current flowing in the thyristor from which the load current is being transferred during commutation, Figure 4 showing the conditions in a prior art bridge circuit arrangement having only non-saturating reactors associated with the thyristors, and Figure 5 showing the conditions in the bridge circuit arrangement of Figure 1 with saturable reactors having the hysterisis curve of Figure 6.

Referring now to the Figure 1, a squirrel cage induction motor 10 is supplied with three phase alternating current of variable voltage and variable frequency from a three phase A.C. supply source 12 of fixed voltage and frequency via a line contactor 14, series line reactors 1 6 and a converter unit 18. That unit incorporates a variable output voltage rectifier unit 20 of which the D.C. output circuit 22 includes a D.C. line choke 24 and is connected to the D.C. input circuit 26 of a variable output frequency inverter unit 28 which also constitutes part of the converter unit. A three phase output circuit 30 of the inverter unit is connected to the input terminals of the motor 10.

The rectifier unit 20 takes the form of a singleended, fully-controlled thyristor bridge circuit having associated therewith the necessary control gear (not shown) for controlling the output voltage of the rectifier unit at a deisred value, which value is adjustable.

The inverter unit 28 comprises a bridge circuit having three similar branch circuits 32, 34 and 36 connected in parallel to said D.C. input circuit 26.

These branch circuits have connected at their respective central points 38 the respective lines constituting the said output circuit 30 of the inverter unit.

The upper half (as seen in Figure 1) of each such branch circuit includes in series a saturable reactor 40, a thyristor 42, and at least one diode 44. The output terminals of those thyristors are inter-connected as shown by three deltaconnected commutating capacitors 46, 48 and 50 (referred to hereafter as the "capacitor system"). Each diode 44 has connected in parallel therewith a protective resistor-capacitor circuit 52.

Likewise, the lower half of each said branch circuit includes in series at yeast one diode 54, a thyristor 56, and a saturable reactor 58, the diode having connected in parallel therewith a series resistor-capacitor circuit 60, and the input terminals of the thyristors 56 being interconnected as shown by three delta-connected commutating capacitors 62, 64 and 66.

The inverter unit also includes (not shown) the necessary control gearforfiring the thyristors 42 and 56 in proper sequence so as to deliver three phase alternating current to the motor 10 at the desired frequency, which frequency is adjustable.

The purpose, mod us operandi and design of the saturable reactors 40 and 58 will appear from what follows.

Commutating current from one inverter thyristor to the next involves a process which will be described briefly by way of example with reference to the commutation of current from the upper right hand thyristor 42 (referred to hereafter as the thyristor 42c) to the adjacent upper central thyristor (referred to hereafter as the thyristor 42b).

Figure 2 shows only the relevant parts of the inverter unit 28 of Figure 1, at the instant when the thyristor 42c is conducting current to the motor, which current returns from the motor via the branch circuit which includes the lower left hand thyristor 56 (referred to hereafter as the thyristor 56a). The path of that current flow is shown in Figure 2 by the heavy dotted line, and the charge on the capacitor system 46, 48 and 50 is indicated.

On firing the thyristor 42b the capacitor system 46, 48 and 50 discharges around a loop circuit which is constituted by the reactors 40c and 40b and the thyristors 42c and 42b, the rate of rise of the capacitor discharge current circulating in the loop circuit being determined by the initial voltage (VcO) on the capacitors 48 and 50 and being limited by the inductance of the reactors 40b and 40c and any stray inductance.

This loop circuit current has the effect of very rapidly reducing the current flow in the extinguishing or outgoing thyristor 42c to zero value, so that the motor current is transferred to the incoming thyristor 42b. However, little charge is drained from the capacitor system during the commutation so that the residual capacitor voltage then appears across the extinguishing thyristor 42c as a reverse bias during the recovery period of that thyristor.

The inductance of the said loop circuit (i.e.

predominantly that of the saturable reactors) needs to be high enough to limit the rate of rise of current in the incoming or firing thyristor 42b to a prescribed safe value suited to that thyristor during this period of circulating current in the loop circuit.

In principle, the peak forward and reverse voltages to which the outgoing thyristor 42c is subjected in operation should be equal in magnitude, and approximately equal to the said voltage Vac0' The outgoing thyristor 42c should ideally cease to carry current at the current zero instant, at which instant the energy stored in the loop circuit inductance should be of zero value. However, the stored charge in that thyristor allows a substantial reverse current to develop before the cut-off finally occurs. As cut-off occurs the small junction capacitance of the thyristor rings with the loop circuit inductance to produce a large voltage spike of reverse polarity across the thyristor 42c, which spike can damage the thyristor unless specific steps are taken to prevent the spike voltage reaching an unsafe value.

It has been found that by making the reactors 40 and 58 saturable, and designing those reactors such that the reverse current peak value achieved is less than the saturation current of those reactors, substantial reductions in the reverse polarity voltage spikes can be satisfactorily achieved. The saturable reactors are thus required to operate in the saturated mode to limit the rate of rise of current through the incoming thyristor, and in the unsaturated mode to limit the magnitude of the reverse polarity voltage spikes across the outgoing thyristor.

The reductions in those voltage spikes are achieved through (i) a limitation of the actual peak value of the reverse current, the rate of growth of that current being severely limited by the relatively high inductance of the reactors when unsaturated, and (ii) the introduction by the saturable reactors of a coupled hysteresis loss during cut-off, which loss is sufficient to damp out the ringing effect that would otherwise occur.

The beneficial results achieved by the use of such saturable reactors are demonstrated, for a particular inverter unit, in the oscillograms of the Figures 4 and 5. In each of those figures, the upper trace depicts the variations in thyristor reverse voltage, whilst the lower trace depicts the variations in thyristor reverse current, to a base of time. Figure 4 shows the voltage and current variations for an inverter unit as described above but in which the reactors 40 and 58 were of the non-saturating, air-cored type. The reverse voltage rose to approximately-i 000V, the reverse current ir having reached a peak of approximately --50A at time T.

By way of contrast, Figure 5 shows corresponding waveforms for a similar inverter unit having saturable reactors in accordance with the present invention. In that case the reverse voltage rose to approximately600V and settled at a value of approximately --500V ( a value substantially greater than the corresponding value of Figure 4). This indicates the effectiveness of the saturable reactors in controlling the reverse voltage spikes, even under the more arduous operating conditions of Figure 5.

The saturable reactors of the inverter unit of Figure 5 had ferro-magnetic cores the hysteresis curve of which is shown in Figure 6. The inductance of each such saturable reactor was (i) unsaturated -0.5 mH, and (ii) partially saturated -0.05 mH. The points at which the inductance switches between 0.5 mH to 0.05 mH are defined by points T in the hysteresis curve at currents of +50A as indicated. The residual 0.05 mH inductance is due to the inherent inductance of the windings, which behave as an air-cored reactor when the core is saturated. Each saturable reactor suitably comprises an annular core of suitable material, wound with an appropriate number of turns.

The currents +iSat should be only slightly greater than the peak reverse curents ir of the thyristors in order to maximise hysteresis losses at the reverse current peaks.

The following analysis derives the peak reverse curernts in terms of the reactor and thyristor characteristics and thereby enables suitable values of isat to be achieved.

If the charge stored in the thyristor is "q" and the unsaturated inductance of the loop circuit is Lu, the initial loop current growth rate is given by

the reverse current is given by

where V00 is the capacitor voltage available for establishing current flow around the loop circuit for extinguishing the outgoing thyristor (as shown in Figure 2).

The charge "q" is given by

Thus

where T is the time at cut-off.

Thus T is given by

at which time the reverse current is

i sat/ir is suitably between 1.0 and 1.5, thus:

The charge q may be calculated from the capacitance of the thyristor and the peak reverse voltage V,,.

In addition to choosing the appropriate reactor core characteristic, it may be necessary to use a few resistive turns on the core.

It will be appreciated that each saturable reactor is connected in series with its associated thyristor in a position in which it forms part of the commutation loop circuit for that thyristor, which loop circuit controls the rate of both the growth and the subsequent decline of current in that thyristor.

Claims (12)

1. A thyristor bridge incorporating a saturable reactor in series with an associated thyristor in a commutation loop circuit of the bridge.

2. A thyristor bridge according to Claim 1 wherein said saturable reactor is constructed so as to be almost saturated at the peak reverse current of said thyristor.

3. A thyristor bridge according to Claim 2 wherein the magnitude of the saturation current li sat of said saturable reactor is within a range given by:

where V00 is the cut-off voltage applied to commutate said thyristor, q is the charge stored in the thyristor immediately before commutation and Lu is the inductance of said saturable reactor in its unsaturated condition.

4. A thyristor bridge according to Claim 2 or Claim 3 wherein the inductance of said saturable reactor when unsaturated is between 3 and 20 times its inductance in the saturated condition.

5. A thyristor bridge according to any preceding Claim wherein said saturable reactor is connected between a main electrode of said thyristor and D.C. line of the bridge.

6. Afully controlled thyristor bridge as claimed in any preceding Claim.

7. A thyristor bridge as claimed in any preceding Claim wherein said saturable reactor incorporates a wound resistance.

8. A thyristor bridge substantially as described hereinabove with reference to Figures 1 to 5 of the accompanying drawings.

9. A thyristor bridge as claimed in any of claims 1 to 8 wherein the hysteresis loop of said saturable reactor is substantially as shown in Figure 6 of the accompanying drawings.

1 0. An inverter unit incorporating a thyristor bridge as claimed in any preceding Claim.

11. A rectifier unit incorporating a thyristor bridge as claimed in any of Claims 1 to 9.

12. A motor control system incorporating a thyristor bridge as claimed in any of Claims 1 to 9.