GB2128022A

GB2128022A - Integrated transistors protected against overvoltages

Info

Publication number: GB2128022A
Application number: GB08321237A
Authority: GB
Inventors: Felice Versiglia; Paolo Ferrari
Original assignee: ATES Componenti Elettronici SpA; SGS ATES Componenti Elettronici SpA
Current assignee: STMicroelectronics SRL
Priority date: 1982-08-05
Filing date: 1983-08-05
Publication date: 1984-04-18
Also published as: FR2531573A1; JPS5963761A; GB2128022B; GB8321237D0; IT1210916B; FR2531573B1; IT8222745A0; DE3328246A1

Abstract

A planar transistor of bipolar type 7,3,2 is protected against overvoltages by a second emitter region 8, connected ohmically to base 3, and a second base region 4 which is not directly connected to any electrode of the transistor and is therefore floating with respect to the potentials applied thereto. The second emitter region and the second base region form, together with the collector 2,1 of the transistor, an auxiliary protection transistor. The resistivity of the second base region is suitably regulated such that the collector-emitter breakdown voltage of the protection transistor, with the base of that transistor unconnected, has a lower value than that between the collector and the first base region or first emitter region. The protected transistor may be integrated in a Darlington type amplifier. <IMAGE>

Description

SPECIFICATION Improvements in or relating to integrated transistors protected against overvoltages The present invention relates to a monolithic semiconductor device, and in particular to an integrated transistor which is protected against overvoltages, which may be used to control switching of inductive loads, for example motors of electrical household appliances or electronic automobile ignition systems.

In general, a transistor may be damaged, or even destroyed, if an excessive reverse biasing voltage is applied to the base-collector junction.

Dangerous overvoltage conditions may be present in particular when the transistor drives the switching of an inductive load connected in series with the collector: during the switching-off or quenching of the transistor the abrupt variation of current in the load induces a counterelectromotive force which reverse biases the basecollector junction with relatively high voltage values.

Since, in general, in order to reduce the switch-off transient of a transistor, charge extraction is carried out from the base by means of suitable circuit means, the transistor is then subject to power conditions which are even more dangerous, called "reverse secondary breakdown" (Es/b), in which the formation of zones having a high current density and therefore a high temperature, may easily cause the destruction of the transistor itself.

A known solution designed to prevent these destructive breakdown effects consists in providing a transistor having an auxiliary emitter shortcircuited to the base, with which it forms a PN junction, by means of a metal electrode which constitutes a base contact.

In reverse biasing conditions, the base-collector junction may be emptied of charge in the auxiliary emitter region, thereby profiting from the so-called "punchthrough" phenomenon, in which the transition region of the collector junction extends up to the emitter region across the base, for sufficiently high voltage: the current flows from the collector region in the base region via the auxiliary emitter and the base contact.

In order to obtain this result, the auxiliary emitter is formed such that the punchthrough takes place before a possible reverse breakdown of the base-collector junction.

There are, however, problems of reliability due to the fact that, during manufacture or even during operation at high temperatures, it is possible to form from the layer of metal of the base contact, which shortcircuits the base and auxiliary emitter, metal spots which extend into the underlying semiconductor regions and also through the PN junction between the base and the auxiliary emitter, thereby compromising the operation of the protection.

A further solution known to persons skilled in the art and designed to protect a transistor from overvoltages is the conventional solution involving the connection of an external diode between the collector and base terminals.

Since it may be produced with discrete elements but is disadvantageous from an economic point of view, this solution may be more suitably used by integrating the diode in the semiconductor device as well.

A Zener diode, integrated with a transistor in a monolithic semiconductor, may be formed by a first semiconductor region which is strongly doped for a base contact and located below the base electrode of the transistor, this first region forming a PN junction with the emitter of the transistor, and by a second region which is strongly doped with impurities of the same type as those of the collector of the transistor, but which have a higher concentration, which second region has its upper surface in contact with the lower surface of the first region and its lower surface in contact with the collector and forms a PN junction both with the first region and with the base region of the transistor.

By suitably regulating the concentrations of the impurities, the breakdown voltage Vz of the Zener diode formed in this way may be determined such that the diode is conductive for a reverse biasing voltage of the basecollector junction of the transistor which is lower than that causing the breakdown of the junction itself.

The use of a Zener diode in order to protect the transistor enables the drawbacks relating to instability and reliability of the first solution to be avoided.

However it should be noted that conventional techniques for the integration of a transistor in a monolithic semiconductor body involve inevitable manufacturing tolerances. The thickness and the resistivity of the collector are particularly subject to variations corresponding to non-negligible variations of the breakdown voltages which are typical of the transistor itself.

The breakdown voltage of the Zener protection diode is determined by suitably selecting the doping and the thickness of the regions of the diode itself. The regulation of this voltage as a function of the actual breakdown voltage of the transistor to be protected is not simple to perform and is not advantageous from an economic point of view.

According to the invention, there is provided an integrated transistor protected against overvoltages, comprising a collector region having a first type of conductivity, a first base region having a second type of conductivity, opposite to the first type, adjacent the collector region with which it forms at the interface a base-collector PN junction, and a first emitter region having conductivity of the first type, adjacent the base region with which it forms at the interface a base-emitter PN junction, a second emitter region having conductivity of the first type and a second base region having conductivity of the second type, the second base region being adjacent the second emitter region and the collector region, with each of which it forms at the interface a respective PN junction, the second emitter region being ohmically connected to the first base region by means of an electrode, the second base region not being connected directly to any electrode of the transistor so that it is floating with respect to the potentials applied to the transistor, the open base breakdown voltage between the collector region and the second emitter region having a lower value than that of the breakdown voltage of the PN junction between the collection region and the first base region.

It is thus possible to provide an integrated transistor which is protected against overvoltages, which may be used to control inductive load switching and may be produced in a simple and economic manner, the protection of this transistor being ensured by the actual structure of the transistor independently of manufacturing tolerances.

The invention will be further described, by way of example, with reference to the accompanying drawing, which is a view, on a very enlarged scale, of a section portion of the structure of an integrated transistor protected against overvoltages constituting a preferred embodiment of the invention.

In the drawing, the actual geometrical proportions of the device have not been respected in order to make the drawing more comprehensible, the actual thickness of the device being much less than its surface dimensions.

The structure of a transistor shown in the drawing may be achieved by means of one of the known processes for the manufacture of power planar transistors.

A substrate, designed by 1, of doped semiconductor material, for example N-type silicon having a low resistivity (approx. 0.01 ohm/cm) has grown upon it an epitaxial layer 2 of N-type, having a higher resistivity than thatofthesubstrate (approx. 50 ohm/cm) andathickness of aprox. 50 pm.

Two regions 3 and 4 of P-type having a low resistivity and a substantially equal depth of diffusion (= 10 pm) are formed in the first instance in the layer 2 using known masking and diffusion techniques. The surface resistivity of the region 4 is maintained suitably lowerthan that of the region 3 (with surface concentrations of the doping agent of approx. 1015 and 5.1017 ions/cm3, respectively).

In the drawing the lesser or greater resistivities, corresponding to greater or lesser concentrations of impurities with which the various regions are doped, are indicated by appending the respective symbols "+" and "- " to the letters P and N which show the type of conductivity.

One method of obtaining an equal depth and a different resistivity is for example to deposit a suitable concentration of impurities in the first instance solely in the surface portion of the semiconductor associated with region 4, to diffuse these impurities up to an intermediate depth, and then to deposit a higher concentration of impurities, at the required amount, solely in the surface portion associated with region 3, following this with a subsequent diffusion stage until both regions have reached a substantially equal depth.

The regions 3 and 4form with the layer 2, in which they are embedded, two PN type junctions, shown by 5 and 6 respectively in the drawing.

Two regions of N-type, shown respectively by 7 and 8 and having a low resistivity (with a surface concentration of doping agent of approx. 1020 ions/cm3) and having substantially equal doping depths and profiles are then formed in the regions 3 and 4 still using known masking and diffusion techniques. The regions 7 and 8 form with the regions 3 and 4 two PN-type junctions, shown in the drawing by 9 and 10, respectively.

A silicon dioxide layer 11 formed on the semiconductor after the final diffusion operation is lastly provided with apertures via which, using conventional metallization techniques, there are provided metal contacts for the regions 3 and 7, designated by 12 and 13, respectively, and a metal contact 14 whch provides an ohmic contact between the regions 3 and 8. A metal contact 15 is applied in a similar manner to the free surface of the substrate.

The combined regions 1 and 2 and the regions 3 and 7 of the structure shown in the drawing form a planar transistor of which they respectively constitute the collector (1,2) the base (3) and the emitter (7), the contacts 12, 13 and 15 being the base, emitter and collector electrodes respectively of the transistor itself.

This transistor is provided with integrated protection means, constituted by a second base region 4 and a second emitter region 8 which, for the sake of simplicity and clarity of explanation, may be considered as the emitter and base respectively of an auxiliary protection transistor, integrated together with the main power transistor and having its collector (1,2) common with the latter. This protection transistor has its emitter 8 connected ohmically by means of the metal contact 14 to the base 3 of the main transistor and has its base 4 floating as this is not connected to any electrode of the main transistor.

The base region 4 of the protection transistor is doped with a concentration of impurities which is suitably lower than that of the base region 3 of the main transistor.

By suitably regulating, using known methods, the difference in the concentration of impurities, and thus the resistivity, between the two bases 3 and 4, it is possible to obtain a collector-emitter breakdown voltage value with the base of the transistor open which is lower, to exactly the required extent, than that of the breakdown voltage of the collector-base junction of the main transistor.

Examining the structure of a device, the protection obtained in this way is not subject to manufacturing tolerances, linked essentially to the epitaxial growth of the collector, whose thickness may vary in a non-negligible manner from component to component. The auxiliary protection transistor, since it has the same collectorasthe main transistor, will automatically have, as a function of the manufacturing tolerances, identical variations of the breakdown characteristics.

Particular consideration is now given to the operation of the protection of the transistor when it is subject to an overvoltage, assuming for example that the transistor is in a switching-off phase during the control of an inductive load in series with the collector.

The base-collector junction of the transistor is reverse biased by a relatively high voltage which would be sufficient, if there were no protection, to damage the device, as there is simultaneously a current for extracting charge from the base in order to accelerate switching.

However, as soon as the voltage at the base-collector junction equals the open base collector-emitter breakdown voltage of the transistor designated as the protection transistor, which is lower than the breakdown voltage of the junction itself, the protection transistor starts to conduct in a reverse manner, injecting charge according to the main transistor and thus eliminating the possibility of its dangerous "reverse secondary breakdown" (Es/b). If the input base current increases, the power transistor may conduct in a reverse manner without any destructive power phenomena.

The protection transistor is not, however, subject to damage even if there is a collector-emitter breakdown, since its base is floating and there is no base current.

making it quite reliable.

Moreover, the current which this transistor has to support is solely that current which is sufficient to cause the conduction of the main transistor, therefore in the case of a planar structure its integration is economic in terms of the occupation of area as well as being easy and simple, as has been mentioned, to produce in terms of processing technology.

During particularly difficult rapid switching conditions, with intense charge extraction currents from the base of the power transistor during switching-off, the abovementioned conditions relating to the breakdown voltages may possibly not ensure the action of the protection before possible damages.

In this case technical reliability tests have shown that the power transistor is protected when the open base collector-emitter breakdown voltage of the protection transistor is lower than the open base collector-emitter breakdown voltage of the main transistor itself. It is adequate in this respectto regulate suitably the difference in concentration of impurities, and therefore resistivity, between the two base regions. A transistor protected against overvoltages having the structure shown in the drawing is particularly suitable to be integrated in an amplifier device of the Darlington type as a final power transistor controlled by an input transistor having its emitter and collector connected respectively to the base and the collector of the final transistor and having the same type of conductivity.

Although a single embodiment of the invention and a single manufacturing process example have been described and illustrated, various modifications may be made within the scope of the invention.

For example, instead of producing the transistor with the second base region 4 doped to a lesser extent than the first region 3, it is possible to obtain the same result by forming a second emitter region 8 which is deeper than the first 7 having an equal surface concentration of doping agents.

One method of obtaining this different depth is, for example, to deposit impurities at a suitable concentration in the first instance solely in the surface portion of the semiconductor associated with the region 8, to diffuse these impurities up to an intermediate depth and then to deposit further impurities on the surface of region 7, following this with a subsequent diffusion phase enabling the formation of the region 7 and the final penetration to a greater depth of the region 8.

Claims

1. An integrated transistor protected against overvoltages, comprising a collector region having a first type of conductivity, a first base region having a second type of conductivity, opposite to the first type, adjacent the collector region with which it forms at the interface a base-collector PN junction, and a first emitter region having conductivity of the first type, adjacent the base region with which it forms at the interface a base-emitter PN junction, a second emitter region having conductivity of the first type and a second base region having conductivity of the second type, the second base region being adjacent the second emitter region and the collector region, with each of which it forms at the interface a respective PN junction, the second emitter region being ohmically connected to the first base region by means of an electrode, the second base region not being connected directly to any electrode of the transistor so that it is floating with respecttothe potentials applied to the transistor, the open base breakdown voltage between the collector region and the second emitter region having a lower value than that of the breakdown voltage of the PN junction between the collector region and the first base region.

2. An integrated transistor protected against overvoltages as claimed in claim 1, in which the open base breakdown voltage between the collector region and the second emitter region has a lower value than that of the open base breakdown voltage between the collector region and the first emitter region.

3. An integrated transistor protected against overvoltages as claimed in claim 1 or 2, in which the surface concentration of doping agent of the second base region is lower than that of the first base region.

4. An integrated transistor protected against overvoltages, as claimed in claim 1 or2, in which the thickness of the second base region is less than that of the first base region.

5. An integrated transistor protected against overvoltages substantially as hereinbefore described with reference to and as illustrated in the accompanying drawing.

6. A monolithic semiconductor planar device, comprising at least a first and a second transistor which are directly coupled together in order to form a Darlingtontype amplifier, the first and the second transistors being the input transistor and the output transistor respectively, of the amplifier, the second transistor comprising a transistor protected against overvoltages as claimed in any one of the preceding claims.