GB2121235B - Method for manufacturing an insulated gate field effect transistor device - Google Patents
Method for manufacturing an insulated gate field effect transistor deviceInfo
- Publication number
- GB2121235B GB2121235B GB08314946A GB8314946A GB2121235B GB 2121235 B GB2121235 B GB 2121235B GB 08314946 A GB08314946 A GB 08314946A GB 8314946 A GB8314946 A GB 8314946A GB 2121235 B GB2121235 B GB 2121235B
- Authority
- GB
- United Kingdom
- Prior art keywords
- manufacturing
- field effect
- effect transistor
- insulated gate
- transistor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 230000005669 field effect Effects 0.000 title 1
- 238000004519 manufacturing process Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
- H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
- H01L21/2251—Diffusion into or out of group IV semiconductors
- H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
- H01L21/2257—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US38379482A | 1982-06-01 | 1982-06-01 |
Publications (3)
Publication Number | Publication Date |
---|---|
GB8314946D0 GB8314946D0 (en) | 1983-07-06 |
GB2121235A GB2121235A (en) | 1983-12-14 |
GB2121235B true GB2121235B (en) | 1986-03-19 |
Family
ID=23514751
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB08314946A Expired GB2121235B (en) | 1982-06-01 | 1983-05-31 | Method for manufacturing an insulated gate field effect transistor device |
Country Status (4)
Country | Link |
---|---|
EP (1) | EP0110956A4 (en) |
CA (1) | CA1198226A (en) |
GB (1) | GB2121235B (en) |
WO (1) | WO1983004342A1 (en) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS618916A (en) * | 1984-06-21 | 1986-01-16 | インタ−ナシヨナル・ビジネス・マシ−ンズ・コ−ポレ−シヨン | Method of forming doped region |
US4653173A (en) * | 1985-03-04 | 1987-03-31 | Signetics Corporation | Method of manufacturing an insulated gate field effect device |
IT1197523B (en) * | 1986-10-30 | 1988-11-30 | Sgs Microelettronica Spa | PROCESS FOR THE MANUFACTURE OF FIELD-EFFECT TRANSISTORS WITH "GATE" ISOLATED WITH JOINTS HAVING EXTREMELY REDUCED DEPTH |
EP0417457A3 (en) * | 1989-08-11 | 1991-07-03 | Seiko Instruments Inc. | Method of producing field effect transistor |
EP0505877A2 (en) * | 1991-03-27 | 1992-09-30 | Seiko Instruments Inc. | Impurity doping method with adsorbed diffusion source |
US5959357A (en) * | 1998-02-17 | 1999-09-28 | General Electric Company | Fet array for operation at different power levels |
Family Cites Families (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US2953486A (en) * | 1959-06-01 | 1960-09-20 | Bell Telephone Labor Inc | Junction formation by thermal oxidation of semiconductive material |
US3418180A (en) * | 1965-06-14 | 1968-12-24 | Ncr Co | p-n junction formation by thermal oxydation |
US3617824A (en) * | 1965-07-12 | 1971-11-02 | Nippon Electric Co | Mos device with a metal-silicide gate |
US3664896A (en) * | 1969-07-28 | 1972-05-23 | David M Duncan | Deposited silicon diffusion sources |
US3798752A (en) * | 1971-03-11 | 1974-03-26 | Nippon Electric Co | Method of producing a silicon gate insulated-gate field effect transistor |
US3808060A (en) * | 1972-07-05 | 1974-04-30 | Motorola Inc | Method of doping semiconductor substrates |
US3928095A (en) * | 1972-11-08 | 1975-12-23 | Suwa Seikosha Kk | Semiconductor device and process for manufacturing same |
DE2449688C3 (en) * | 1974-10-18 | 1980-07-10 | Siemens Ag, 1000 Berlin Und 8000 Muenchen | Method for producing a doped zone of one conductivity type in a semiconductor body |
US4182023A (en) * | 1977-10-21 | 1980-01-08 | Ncr Corporation | Process for minimum overlap silicon gate devices |
GB2021861B (en) * | 1978-05-26 | 1982-09-29 | Rockwell International Corp | Field effect transistors |
US4277881A (en) * | 1978-05-26 | 1981-07-14 | Rockwell International Corporation | Process for fabrication of high density VLSI circuits, having self-aligned gates and contacts for FET devices and conducting lines |
DE2964810D1 (en) * | 1978-07-29 | 1983-03-24 | Fujitsu Ltd | A method of coating side walls of semiconductor devices |
US4274892A (en) * | 1978-12-14 | 1981-06-23 | Trw Inc. | Dopant diffusion method of making semiconductor products |
US4354309A (en) * | 1978-12-29 | 1982-10-19 | International Business Machines Corp. | Method of manufacturing a metal-insulator-semiconductor device utilizing a graded deposition of polycrystalline silicon |
US4319395A (en) * | 1979-06-28 | 1982-03-16 | Motorola, Inc. | Method of making self-aligned device |
US4355454A (en) * | 1979-09-05 | 1982-10-26 | Texas Instruments Incorporated | Coating device with As2 -O3 -SiO2 |
US4389255A (en) * | 1980-01-14 | 1983-06-21 | Burroughs Corporation | Method of forming buried collector for bipolar transistor in a semiconductor by selective implantation of poly-si followed by oxidation and etch-off |
US4356040A (en) * | 1980-05-02 | 1982-10-26 | Texas Instruments Incorporated | Semiconductor device having improved interlevel conductor insulation |
-
1983
- 1983-05-04 CA CA000427418A patent/CA1198226A/en not_active Expired
- 1983-05-13 WO PCT/US1983/000731 patent/WO1983004342A1/en not_active Application Discontinuation
- 1983-05-13 EP EP19830902037 patent/EP0110956A4/en not_active Withdrawn
- 1983-05-31 GB GB08314946A patent/GB2121235B/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
EP0110956A4 (en) | 1984-07-03 |
GB8314946D0 (en) | 1983-07-06 |
GB2121235A (en) | 1983-12-14 |
WO1983004342A1 (en) | 1983-12-08 |
CA1198226A (en) | 1985-12-17 |
EP0110956A1 (en) | 1984-06-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PCNP | Patent ceased through non-payment of renewal fee |