GB2114833A

GB2114833A - Signal processing

Info

Publication number: GB2114833A
Application number: GB08203133A
Authority: GB
Inventors: Trevor Richardson
Original assignee: Tatung UK Ltd
Current assignee: Tatung UK Ltd
Priority date: 1982-02-03
Filing date: 1982-02-03
Publication date: 1983-08-24
Also published as: GB2114833B

Abstract

A d.c. biasing signal 10 which varies periodically is added to a video signal (Figure 2B) which has noise superposed thereon. Normally, the noisy video signal would have significant excursions (3, 4, 5, 6, 7, 8) which lie outside the input range (0 to 100%) of an analogue-to-digital converter. However, addition of the biasing signal 10 gives a composite signal (Figure 4B) of which the noise excursions lie better within the range of the analogue-to-digital converter. Subsequent processing of the digital signal compensates for the d.c. biasing signal 10. Basic circuits are disclosed, for carrying out the addition of the biassing signal 10 and video signal. <IMAGE>

Description

SPECIFICATION Signal processing This invention relates to signal processing methods and apparatus, and is particularly although not exclusively concerned with analogue to digital conversion of video signals.

At the present time, video signal processing equipment, including in particular domestic television receivers, still relies to a large degree on the processing of video signals as analogue signals. Research is continuing into the processing of video signals as digital signals, but one of the fundamental problems to be overcome satisfactorily is the conversion of an analogue video signal into a digital video signal in the first place.

In studios and the like, this need not be too much of a problem, as video signals in such environments are invariable clean signals, with a minimum of noise. However, the video signal which is detected in a domestic television receiver is often subjected to an appreciable amount of noise, which presents problems for analogue to digital conversion circuitry. This will be explained in some more detail later.

Preferred embodiments of the present invention aim to provide methods and apparatus for the analogue to digital conversion of video signals, which may be improved in the foregoing respect. Although preferred embodiments of the invention are concerned principally with video signals, the invention may nevertheless be applicable to the processing of other signals.

More generally, according to a first aspect of the present invention, there is provided a method of processing a signal with periodic properties comprising the steps of adding to the signal a d.c.

biasing signal which varies periodically, and processing the bias signal thus obtained in such a manner as to correct for the d.c. bias.

Preferably, the signal is a video signal.

Preferably, the method includes the step of converting the bias signal from an analogue signal to a digital signal. With advantage, the biasing signal may then be arranged to distribute the video signal more uniformly about the centre of an input range of an analogue to digital converter.

In a preferred arrangement, the biasing signal varies between two d.c. levels, to bias the video signal positively during the line and field blanking periods thereof, and to bias the video signal negatively during the active line periods thereof.

(In this specification, a "positive" video signal i.e. with negative syncs-is assumed, for convenience. Complementary arrangements will of course apply to "negative" video signals). The method may include the preliminary step of attenuating or amplifying the signal, as may be required.

According to a second aspect of the present invention, there is provided a method of converting an analogue signal to a digital signal, incuding the preliminary step of adding to the analogue signal a d.c. biasing signal which varies periodically, to distribute the analogue signal more uniformly about the centre of an input range of an analogue to digital converter.

Such a method preferably includes the subsequent step of processing the digital signal in such manner as to correct for the d.c. bias.

In accordance with a third aspect of the present invention, there is provided signal processing apparatus comprising first means for generating a d.c. biasing signal which varies periodically, second means for adding the biasing signal to a signal with periodic properties and third means for subsequently processing the biased signal in such a manner as to correct for the d.c. bias.

Preferably, the signal is a video signal.

Preferably, said third means includes an analogue to digital converter, and the biasing signal is arranged to distribute the video signal more uniformly about the centre of an input range of the analogue to digital converter.

The biasing signal may vary between two d.c.

levels, being arranged to bias the video signal positively during its line and field blanking periods, and negatively during its active line periods. The apparatus may include means for attenuating the video signal.

In accordance with a fourth aspect of the present invention, there is provided signal processing apparatus including an analogue to digital converter, means for generating a d.c.

biasing signal which varies periodically, and means for adding the biasing signal to an analogue input signal to distribute the analogue signal more uniformly about the centre of the input range of the analogue digital converter.

For a better understanding of the invention and to show how the same may be carried into effect, reference will now be made, by way of example, to the accompanying diagrammatic drawings, in which: Figure 1 is a waveform diagram of a video colour bar signal, of studio quality; Figure 2A is a waveform diagram similar to Figure 1, but showing a colour bar video signal as may be obtained from the l.F. stage of a domestic television receiver; Figure 2B shows the signal of Figure 2A, with superimposed noise; Figure 3 shows a d.c. biasing signal which varies periodically; Figure 4A shows a waveform derived from the linear addition of the signals shown in Figures 2A and 3; Figure 4B shows the waveform of Figure 4A with superimposed noise; Figure 5 illustrates one example of a circuit for shifting the d.c. level of a video signal; and Figure 6 shows another example of such a circuit.

The studio quality video signal shown in Figure 1 has a sync tip to peak white value of 1 volt, peak-to-peak in accordance with normal T.V.

standards. The overall peak-to-peak value of the colour bar signal is approximately 1.23 volts, and being of studio quality, the signal carries negligible noise.

In order to convert the analogue signal of Figure 1 into a digital signal, it may simply be fed to an analogue to digital converter, and because of the absence of noise, subsequent processing would be relatively straight forward. To maximize resolution of the A/D converter, the full peak-to peak value of the analogue signal corresponds to 100% of the dynamic input range of the converter. The percentage figures shown at the lefthand side of Figure 1 correspond to the percentages of the input range of the AID converter.

Figure 2A shows the more usual form of colour bar signal that may be obtained from the l.F. stage of a domestic television receiver, and in which the chroma level may be reduced by about 3dB.

Again, therefore, the sync pulses 1 have an amplitude of -0.3 volts, and peak white 2 has a level of 0.7 volts, to give a sync tip to peak white value of 1 volt. Because of the reduced chroma level, however, the overall peak-to-peak value of the signal in Figure 2A is only 1.14 volts. Again, in the absence of noise, this signal may be converted to a digital signal simply by feeding it to an A/D converter, such that the maximum peak value 1.14 volts corresponds to 100% of the input range of the A/D converter. In this case, the black level 3 of the illustrated signal would be clamped to about 26.2% (or nearest convenient digital value), for subsequent digital processing.

In practice, however, signals in a domestic television receiver often have noise superimposed thereon, and particularly where the signals are weak, the noise can be quite appreciable. In Figure 2B, the basic colour bar signal is similar to that of Figure 2A, but has noise superimposed thereon, typical of a weak signal.

If the signal shown in Figure 2B were to be converted to a digital signal by an A/D converter as discussed above with reference to Figure 2A, it will be seen that an appreciable amount of the noise would iie outside the input range (0 100%) of the input range of the converter. Thus, the noise peaks will be outside the input range of the A/D converter during the sync pulse 3, the peak white, yellow, cyan and green signals 4, 5, 6 and 7, and also to a small degree during the blue signal 8. These noise excursions will be clipped off by the A/D converter, and the resulting asymmetry of the noise will change the mean value of the signal, which will have the effect of compressing the relevant video components.The white, yellow, cyan, green and blue signals will be reduced in intensity, the colours desaturated and the synchronising performance of the television receiver degraded. The severity of the synchronisation problem will depend upon the design of the sync separator in the receiver, but experience has shown that even with sophisticated circuits using adaptive sync separation techniques, the clipping of noise pulses can render the receiver unusable on weak signals, particularly if the received signals also suffer from ghosting or other defects.

The most simple way to overcome this problem would be to attenuate the whole input signal to the AID converter, perhaps by 3dB.

However, this would give a corresponding reduction in the resolution of the digitised signal.

As a satisfactory degree of resolution is a significant design problem in the first place, such reduction in resolution is highly undesirable.

In order to alleviate this problem, we convert an analogue signal to a digital signal by feeding to an A/D converter a video signal of such amplitude that, when of the form shown in Figure 2A, it has a peak-to-peak value corresponding to the full input range of the A/D converter. However, in addition to this, we generate a d.c. biasing signal which varies periodically, as shown in Figure 3.

This signal is conveniently derived from a time base circuit in a television receiver. The signal as shown in Figure 3 is added to the video signal prior to the input of the A/D converter, as will now be described in some more detail.

Referring to Figure 3, it may be seen that the biasing signal 10 varies between a high level 11 and a low level 12. The high level 11 is present during the line and field blanking periods of the video signal, whilst the low level 12 is present during the active line periods of the video signal.

In the numerical example illustrated in the drawings, the low level 12 is set at 0 volts, and the high level 11 at +0.407 volts. With reference to the numerical values given by way of example in Figure 2A, the value 0.407 volts corresponds to approximately 35.7% of the input range of the A/D converter.

When the d.c. biasing signal of Figure 3 is added to the video signal of Figure 2A, it will be appreciated that the black level of the video signal is increased by 0.407 volts during the line and field blanking periods. In addition to superimposing the d.c. biasing signal of Figure 3 on to the video signal of Figure 2A, the black level of the composite signal is clamped to be at about 55% of the input range of the A/D converter, during the blanking periods.

The net effect of these modifications is that, during the line and field blanking periods, the black level of the video signal is altered to 55% of the input range of the A/D converter, and during the active line periods, the black level is reduced to about 19.3%. The composite signal thus obtained is illustrated in Figure 4A. It will immediately be apparent that the differential shifting of d.c. level of the video signal produces a signal that is more uniformly distributed about the centre of the input range of the A/D converter.

(Figure 4A also illustrates in dotted lines the possibility of doubling the amplitude of the colour burst 9, to improve resolution in the AID conversion, and thus improve phase lock loop performance).

Figure 4B shows the composite signal of Figure 4A, but with noise superimposed thereon, to a level comparable to that shown in Figure 2B. The consequence of the modification of the video signal is immediately apparent, in that nearly all of the noise lies within the input range of the A/D converter. In the specific example illustrated, only a very small amount of noise clipping will occur during the yellow and cyan signals 5 and 6, and there will be a small increase in clipping during the blue signal 8 (which will of course occur only on fully saturated, bright blue).

The amplitude of the signal in Figure 4A, during both the field and line blanking periods and the active line periods, considered separately, is the same as in Figure 2A. However, in terms of the numerical values illustrated by way of example, the signal in Figure 4A allows negative noise pulses of up to 28.8% of the peak-to-peak amplitude of the original video signal to be processed linearly, during the field and line blanking periods. During the peak chroma signal, positive noise pulses of up to 7% may be processed linearly. Such noise pulses could not be processed at all with previous systems.

If a still greater noise margin is required, the video signal may be attenuated, in addition to the superposition of the d.c. biasing signal of Figure 3.

However, in such a case, the attenuation of the video signal can still be appreciably less than that which may be required without the addition of the signal of Figure 3, so that any loss in resolution will be reduced.

It will be appreciated that the percentages and voltages quoted above are given only by way of example, to illustrate the described methods.

Practical systems may use different values, and achieve similar results. The methods may be used with video signals which have other levels of chroma, but greater benefits will tend to be obtained with signals having reduced chroma.

It may also be appreciated that the illustrated methods may be relatively easy to implement in a digital video processing system. In the context of the numerical examples given above, it is necessary in subsequent digital processing simply to regard the black level of the video signal as 55% during field and line blanking periods, and 1 9.3% during active line periods.

Figure 5 illustrates one example of a circuit for implementing a method as described above. The circuitry shown in Figure 5 may be best suited to construction with discrete components.

An operational amplifier 20 receives on its non-inverting input a reference voltage Vref. The video signal shown in Figure 2A is fed, inverted and via an input resistor Rin, to the inverting input 22 of the amplifier 20. A feedback resistor Rf is connected between the output and the inverting input 22 of the amplifier 20. The output of the amplifier 20 is fed to the input of an A/D converter 23.

In order to obtain the d.c. biasing signal of Figure 3, a switching transistor 24 is controlled by a signal Vt derived from the time base circuit of the associated television receiver. The signal Vt is applied to the base of the transistor 24 via two base resistors Rb, and the collector of the transistor 24 is connected to the inverting input 22 of the amplifier 20, via a resistor Rx.

The ratio of the resistors Rf/Rin is set to give the desired amplification of the amplifier 20. For example, Rf may have a value of 2 kQ and the resistor Rin may have a value of 1 kQ, to give an amplification factor of 2.

The value of the resistor Rx is calculated to give the desired offset voltage at the input to the A/D converter 23. For example, for a 35.7% offset (as in Figure 3), the offset voltage at the input to the A/D converter 23 will be 0.357 Vad. Then, the offset current=Vref/Rx=0.357 Vad/Rf. Thus, for example, where Rf=2 kQ, Vref=5 volts, and Vad=2 volts, Rx=14.0 kS2.

The alternative circuit shown in Figure 6 may be suitable for construction as part pf an integrated circuit. Here, the video signal of Figure 2A is fed to the non-inverting input 31 of an operational amplifier 30. A reference voltage Vref is fed to the inverting input 32 via a resistor Ra. A feedback resistor Rb is connected between the output and the inverting input 32 of the amplifier 30. The output of the amplifier 30 is connected to the input of an A/D converter 33, via a resistor Ry.

A constant current source 34 is also connected to the input of the A/D converter 33, via an electronic switch 35, which is controlled by a signal Vt derived from the time base circuit of the television receiver. As shown in Figure 6, the switch 35 is open during positive pulses of the signal Vt.

The resistors Ra and Rb are selected to give the desired gain for the amplifier 30. For example, if both Ra and Rb have the value 1 kQ, then the amplification factor will be 2.

The value of the resistor Ry is calculated to give the desired offset voltage of the A/D converter. For example, for a 35.7% offset (as in Figure 3), I.Ry=0.357 Vad, where I is the current supplied by the constant current source 34, and Vad is the input voltage of the A/D converter 33.

Thus, for example, where 1=1 mA and Vad=2 volts, Ry=714Q.

In both Figures 5 and 6, the A/D converter 23 or 33 includes a clamping circuit for clamping the black level at approximately 19.3% of the input range of the A/D converter, during active line periods.

Although the above methods are described in relation to the processing of video signals, where they may be used with particular advantage, it may be appreciated that the methods may in principle be applied to the analogue to digital conversion of various signals with periodic properties, particularly with a view to centralizing an input signal about the centre of an input range of an A/D converter.

Claims (Filed on 3.2.83) 1. A method of processing a first signal with periodic properties, comprising the steps of adding to the signal a d.c. biasing signal which varies periodically, and processing the biased signal thus obtained in such manner as to correct for the d.c. bias.

**WARNING** end of DESC field may overlap start of CLMS **.

Claims

**WARNING** start of CLMS field may overlap end of DESC **. signal is immediately apparent, in that nearly all of the noise lies within the input range of the A/D converter. In the specific example illustrated, only a very small amount of noise clipping will occur during the yellow and cyan signals 5 and 6, and there will be a small increase in clipping during the blue signal 8 (which will of course occur only on fully saturated, bright blue). The amplitude of the signal in Figure 4A, during both the field and line blanking periods and the active line periods, considered separately, is the same as in Figure 2A. However, in terms of the numerical values illustrated by way of example, the signal in Figure 4A allows negative noise pulses of up to 28.8% of the peak-to-peak amplitude of the original video signal to be processed linearly, during the field and line blanking periods. During the peak chroma signal, positive noise pulses of up to 7% may be processed linearly. Such noise pulses could not be processed at all with previous systems. If a still greater noise margin is required, the video signal may be attenuated, in addition to the superposition of the d.c. biasing signal of Figure 3. However, in such a case, the attenuation of the video signal can still be appreciably less than that which may be required without the addition of the signal of Figure 3, so that any loss in resolution will be reduced. It will be appreciated that the percentages and voltages quoted above are given only by way of example, to illustrate the described methods. Practical systems may use different values, and achieve similar results. The methods may be used with video signals which have other levels of chroma, but greater benefits will tend to be obtained with signals having reduced chroma. It may also be appreciated that the illustrated methods may be relatively easy to implement in a digital video processing system. In the context of the numerical examples given above, it is necessary in subsequent digital processing simply to regard the black level of the video signal as 55% during field and line blanking periods, and 1 9.3% during active line periods. Figure 5 illustrates one example of a circuit for implementing a method as described above. The circuitry shown in Figure 5 may be best suited to construction with discrete components. An operational amplifier 20 receives on its non-inverting input a reference voltage Vref. The video signal shown in Figure 2A is fed, inverted and via an input resistor Rin, to the inverting input 22 of the amplifier 20. A feedback resistor Rf is connected between the output and the inverting input 22 of the amplifier 20. The output of the amplifier 20 is fed to the input of an A/D converter 23. In order to obtain the d.c. biasing signal of Figure 3, a switching transistor 24 is controlled by a signal Vt derived from the time base circuit of the associated television receiver. The signal Vt is applied to the base of the transistor 24 via two base resistors Rb, and the collector of the transistor 24 is connected to the inverting input 22 of the amplifier 20, via a resistor Rx. The ratio of the resistors Rf/Rin is set to give the desired amplification of the amplifier 20. For example, Rf may have a value of 2 kQ and the resistor Rin may have a value of 1 kQ, to give an amplification factor of 2. The value of the resistor Rx is calculated to give the desired offset voltage at the input to the A/D converter 23. For example, for a 35.7% offset (as in Figure 3), the offset voltage at the input to the A/D converter 23 will be 0.357 Vad. Then, the offset current=Vref/Rx=0.357 Vad/Rf. Thus, for example, where Rf=2 kQ, Vref=5 volts, and Vad=2 volts, Rx=14.0 kS2. The alternative circuit shown in Figure 6 may be suitable for construction as part pf an integrated circuit. Here, the video signal of Figure 2A is fed to the non-inverting input 31 of an operational amplifier 30. A reference voltage Vref is fed to the inverting input 32 via a resistor Ra. A feedback resistor Rb is connected between the output and the inverting input 32 of the amplifier 30. The output of the amplifier 30 is connected to the input of an A/D converter 33, via a resistor Ry. A constant current source 34 is also connected to the input of the A/D converter 33, via an electronic switch 35, which is controlled by a signal Vt derived from the time base circuit of the television receiver. As shown in Figure 6, the switch 35 is open during positive pulses of the signal Vt. The resistors Ra and Rb are selected to give the desired gain for the amplifier 30. For example, if both Ra and Rb have the value 1 kQ, then the amplification factor will be 2. The value of the resistor Ry is calculated to give the desired offset voltage of the A/D converter. For example, for a 35.7% offset (as in Figure 3), I.Ry=0.357 Vad, where I is the current supplied by the constant current source 34, and Vad is the input voltage of the A/D converter 33. Thus, for example, where 1=1 mA and Vad=2 volts, Ry=714Q. In both Figures 5 and 6, the A/D converter 23 or 33 includes a clamping circuit for clamping the black level at approximately 19.3% of the input range of the A/D converter, during active line periods. Although the above methods are described in relation to the processing of video signals, where they may be used with particular advantage, it may be appreciated that the methods may in principle be applied to the analogue to digital conversion of various signals with periodic properties, particularly with a view to centralizing an input signal about the centre of an input range of an A/D converter. Claims (Filed on 3.2.83)

1. A method of processing a first signal with periodic properties, comprising the steps of adding to the signal a d.c. biasing signal which varies periodically, and processing the biased signal thus obtained in such manner as to correct for the d.c. bias.

2. A method as claimed in Claim 1, wherein the

first signal is a video signal.

3. A method as claimed in Claim 1 or 2, including the step of converting the biased signal from an analogue signal to a digital signal.

4. A method as claimed in Claim 3, wherein the biasing signal is arranged to distribute the first signal more uniformly about the centre of an input range of an analogue to digital converter.

5. A method as claimed in Claim 2, or Claim 3 or 4 as appendant to Claim 2, wherein the biasing signal varies between two d.c. levels, to bias the video signal positively during the line and field blanking periods thereof, and to bias the video signal negatively during the active line periods thereof.

6. A method according to any preceding claim, including the preliminary step of attenuating or amplifying the first signal.

7. A method of converting an analogue signal to a digital signal, including the preliminary step of adding to the analogue signal a d.c. biasing signal which varies periodically, to distribute the analogue signal more uniformly about the centre of an input range of an analogue to digital converter.

8. A method as claimed in Claim 8, including the subsequent step of processing the digital signal in such manner as to correct for the d.c.

bias.

9. Signal processing apparatus comprising first means for generating a d.c. biasing signal which varies periodically, second means for adding the biasing signal to a first signal with periodic properties, and third means for subsequently processing the biased signal in such a manner as to correct for the d.c. bias.

10. Apparatus as claimed in Claim 9, wherein the first signal is a video signal.

1 Apparatus as claimed in Claim 9 or 10, wherein said third means includes an analogue to digital converter, and the biasing signal is arranged to distribute the first signal more uniformly about the centre of an input range of the analogue to digital converter.

12. Apparatus as claimed in Claim 10 or Claims 10 and 11, wherein the biasing signal varies between two d.c. levels, and is arranged to bias the video signal positively during its line and field blanking periods, and negatively during its active line periods.

1 3. Apparatus as claimed in Claim 9, 10, 11 or 12, including means for attenuating or amplifying the first signal.

14. Signal processing apparatus including an analogue to digital converter, means for generating a d.c. biasing signal which varies periodically, and means for adding the biasing signal to an analogue input signal to distribute the analogue signal more uniformly about the centre of the input range of the analogue digital converter.

15. A method of processing a signal with periodic properties, the method being in accordance with Claim 1 or 7, and substantially as described herein.

1 6. Signal processing apparatus substantially as hereinbefore described with reference to Figure 5 or 6 of the accompanying drawings.