GB2114341A - Monitoring system - Google Patents

Monitoring system Download PDF

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Publication number
GB2114341A
GB2114341A GB08202706A GB8202706A GB2114341A GB 2114341 A GB2114341 A GB 2114341A GB 08202706 A GB08202706 A GB 08202706A GB 8202706 A GB8202706 A GB 8202706A GB 2114341 A GB2114341 A GB 2114341A
Authority
GB
United Kingdom
Prior art keywords
converter
parallel
electrical switch
state
parallel combinations
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB08202706A
Other versions
GB2114341B (en
Inventor
John Malcolm Morrison
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ferranti International PLC
Original Assignee
Ferranti PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ferranti PLC filed Critical Ferranti PLC
Priority to GB08202706A priority Critical patent/GB2114341B/en
Priority to US06/456,694 priority patent/US4580138A/en
Priority to CH128/83A priority patent/CH661137A5/en
Priority to DE19833300964 priority patent/DE3300964A1/en
Priority to IT47627/83A priority patent/IT1197552B/en
Priority to FR8301312A priority patent/FR2520878B1/en
Publication of GB2114341A publication Critical patent/GB2114341A/en
Application granted granted Critical
Publication of GB2114341B publication Critical patent/GB2114341B/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M11/00Coding in connection with keyboards or like devices, i.e. coding of the position of operated keys
    • H03M11/22Static coding
    • H03M11/24Static coding using analogue means, e.g. by coding the states of multiple switches into a single multi-level analogue signal or by indicating the type of a device using the voltage level at a specific tap of a resistive divider
    • GPHYSICS
    • G08SIGNALLING
    • G08BSIGNALLING OR CALLING SYSTEMS; ORDER TELEGRAPHS; ALARM SYSTEMS
    • G08B25/00Alarm systems in which the location of the alarm condition is signalled to a central station, e.g. fire or police telegraphic systems
    • G08B25/01Alarm systems in which the location of the alarm condition is signalled to a central station, e.g. fire or police telegraphic systems characterised by the transmission medium
    • G08B25/018Sensor coding by detecting magnitude of an electrical parameter, e.g. resistance
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01HELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H9/00Details of switching devices, not covered by groups H01H1/00 - H01H7/00
    • H01H9/16Indicators for switching condition, e.g. "on" or "off"
    • H01H9/167Circuits for remote indication

Description

1 GB 2 114 341 A 1
SPECIFICATION
Measurement-expressing apparatus This invention relates to measurement-expressing apparatus, for monitoring the state of activity of a plurality of stations.
It is an object of the present invention to provide novel and advantageous measurement-expressing apparatus, for monitoring the state of activity of a plurality of stations.
According to the present invention measurementexpressing apparatus for monitoring the state of activity of a plurality (n) stations, the arrangement being such that the state of activity of each station is to be represented by the state, comprising either the opening or the closing, of an electrical switch of the apparatus, and individually associated with the station, in the apparatus each electrical switch is in parallel with a resistor, and the plurality (n) resistors have different resistances which are binary related to each other, the parallel combinations each of an electrical switch and a resistor are connected in series, a source is connected to the series of parallel combinations to supply a constant current thereto, the current flow being directed through an electrical switch if the switch is closed, and the series of parallel combinations is connected to the input of a common, n- bit, analogue-to-digital converter, hav- ing (n) outputs, each output individually being associated with a parallel combination, different parallel combinations being associated with different converter outputs, the converter being arranged to be capable of determining, in each consecutive period (t) associated with the repetitive operation of the converter, an instantaneous voltage drop, if any, across each parallel combination, in response to the converter receiving an input signal representative of an instantaneous sum of the voltage drops across the plurality (n) parallel combinations, in response there being obtained on each of the corresponding converter outputs a signal of one of two possible forms, and representative of the state of the corresponding electrical switch, and each converter output is connected individually to a counter to accumulate the number of signals received from the associated converter output of one of the two possible form in each of consecutive intervals (mt), where (m) is an integer greater than one, and the apparatus includes means to record and/or to indicate the number accumulated in any of the (n) counters in such an interval.
The period (t) associated with the repetitive operation of the converter comprises the quantisation period associated with the converter, the signal representative of the instantaneous sum of the voltage drops across the plurality (n) parallel combinations at the start of each of the consecutive quantisation periods solely being operated upon by the converter in the corresponding quantisation period, in the known manner for conventional analog ue-to-dig ita 1 converters.
Thus, there can be obtained from the apparatus a representation of the approximate proportion or proportions of each interval (mt), in which propor- tion or proportions any of the (n) electrical switches is either open, or closed.
This arrangement for measurement-expressing apparatus is advantageously simple, because the stations to be monitored are connected together by a single wire, and there is only one input to the common analogue-to-digital converter.
Conveniently, there is recorded and/or indicated the number accumulated in each of the (n) counters in an interval (mt).
The apparatus may include data processor means, possible comprising a digital computer, and arranged to operate, in any required manner, upon the numbers accumulated in any counter in a plurality of consecutive intervals (mt), the apparatus also including means to record and/or to indicate the corresponding output signals of the data processor means. The data processor means may be arranged to operate, in any required manner, upon the numbers accumu ' lated simultaneously in each of the (n) counters, in each of a plurality of consecutive intervals.
The present invention will now be described by way of example with reference to the accompanying drawings, comprising a block circuit diagram of one embodiment of measurement-expressing apparatus in accordance with the present invention.
The illustrated measurement-expressing apparatus is to monitor the state of activity of a plurality (n) stations. The state of activity of each station is to be represented by the state, comprising either the opening or the closing, of an electrical switch included in the apparatus, and individually associated with the station. The stations are not illustrated.
Thus, two possible states of activity of each station can be monitored, the arrangement being such that the associated electrical switch is closed when the station is in one of the two possible states, and is open when the station is in the other state.
The apparatus also includes a plurality (n) resistors, having different resistances which are binary related to each other. In the illustrated arrangement eight resistors, and eight switches 10, are provided, and the resistors are indicated as R, 2R.... 64R 12811.
Each resistor, individually, is in parallel with a switch 10. The parallel combinations, each of a resistor and a switch are connected in series with each other. In the illustrated arrangement the resistors are connected together in an order in accordance with their resistances, but this is not essential.
A constant current source, not shown, is connected to the series of parallel combinations of switches and resistors. If a switch is closed, the current flow is directed through the switch, and there is no significant voltage drop across the parallel combination. If a switch is open, there is a voltage drop across the parallel combination, there being different, possible, binary-related, voltage drops across the different parallel combinations.
The series of parallel combinations is connected to the input of a conventional, n-bit, analogue-to-digital converter 14. Conveniently, the constant current source is provided within the converter 14. The series of parallel combinations comprises a loop circuit extending from the converter. Thus, there are 2 GB2114341 A 2 provided at the input of the converter voltage input signals, each representative of the complement of a sum of the voltage drops across the plurality (n) parallel combinations, and the converter is capable of operating upon each such voltage input signal to provide a corresponding output comprising a binary digital representation thereof. Such an output signal is provided at (n) outputs of the converter, these outputs being indicated by lines 16 in the Figure.
Hence, each converter output 16 individually is associated with a corresponding one of the binary related resistances, different outputs being associ ated with different corresponding resistances. Furth er, each converter output 16 individually is associ ated with a corresponding switch 10, and, conse quently, with a corresponding station.
In the operation of the apparatus, if a switch is closed, a signal, representative of either a binary'l', or a binary'O', and representative of this state, is obtained at the corresponding converter output, and if the switch is closed the other possible binary signal form is obtained at the converter output.
Thus, there is obtained a binary signal representa tive of the state of activity of the corresponding station. Such binary signals are obtained simul taneously on each of the converter outputs, repre sentative of the states of activity of the correspond ing (n) stations.
In the known manner of operation of an analogue to-digital converter there is a quantisation period (t), and the converter operates in a repetitive manner, performing the required digitisation step in each of consecutive periods (t). At the start of each quantisa tion period the instantaneous voltage input signal to the converter is sampled, and it is this voltage which is converted into (n) binary signals from the conver ter outputs.
The apparatus also includes (n) counters 18 to accumulate the binary'l "s or'O"s, on each of the converter outputs 16, in an interval (mt), where m is an integer greater than one. For example, the period (t) is 1 second, and m is 60, each consecutive interval being 1 minute. Hence, counters each with at least sixty stages are provided, capable of counting up to sixty binary signals, of one of the two possible forms from the converter outputs. Thus, the number accumlated in each counter, in each interval (mt), is a representation of the approximate proportion of the interval which the corresponding switch is either open, or closed, the complement of this number being representative of the approximate proportion of the interval the corresponding switch is in the other of its two possible states. A signal representa tive of one such proportion is obtained from one output of the counter, indicated by a lead 20. Such signals are obtained simultaneously from the (n) counter outputs 20, and correspond to the (n) stations.
The apparatus also includes conventional means to record and/or to indicate the proportions repre sented by the counter output signals. Such means is not illustrated, but conveniently common such means is provided, connected to the (n) counter outputs 20 via multiplexing means, indicated gener ally at 22. The output of the multiplexing means 22 is130 on a line 24, and the multiplexing means is controlled by signals received on a line 25 from the means connected to the multiplexing means. Synchronising signals, to control the operation of the means connected to the multiplexing means, are provided on lines 26 extending from points between the converter outputs 16 and the counters 18, only one line 26 being illustrated.
Possibly only one counter is provided, the multi- plexing means 22 being provided between the converter outputs and the counter.
The apparatus may also include data processor means, for example, comprising a digital computer, and arranged to operate, in any required manner, upon the numbers accumulated in any counter in a plurality of consecutive intervals (mt), and the apparatus also including means to record and/or to indicate the corresponding output signals of the data processor means. Conveniently, the data processor means is arranged to operate, in any required manner, upon the numbers accumulated simultaneously in each of the (n) counters, in each of a plurality of consecutive intervals. Thus, the data processor means is connected to the output 24 from the multiplexing means 22, and signals from the data processor means are supplied to control the multiplexing means on the line 25.
Data storage means may be included, where appropriate, within the apparatus in accordance with the present invention, the data processor means being connected to the data storage means, to receive data to be operated upon therefrom, instead of the data processor means being connected, for example, to the multiplexing means 22.
The stations may comprise machines, the manners of operation of which machines are required to be monitored. There may be more than one station included in a machine to be monitored.

Claims (5)

1. Measurement-expressing apparatus for monitoring the state of activity of a plurality (n) stations, the arrangement being such that the state of activity of each station is to be represented by the state, comprising either the opening or the closing, of an electrical switch of the apparatus, and individually associated with the station, in the apparatus, each electrical switch being in parallel with a resistor, and the plurality (a) resistors having different resistances which are binary related to each other, the parallel combinations each of an electrical switch and a resistor being connected in series, a source being connected to the series of parallel combinations to supply a constant current thereto, the current flow being directed through an electrical switch if the switch is closed, and the series of parallel combinations being connected to the input of a common, n-bit, analogue-to-digital converter, having (n) out- puts, each output individually being associated with a parallel combination, different parallel combinations being associated with different converter outputs, the converter being arranged to be capable of determining, in each consecutive period (t) associated with the repetitive operation of the converter, 1 3 GB 2 114 341 A 3 an instantaneous voltage drop, if any, across each parallel combination, in response to the converter receiving an input signal representative of an instantaneous sum of the voltage drops across the plural- ity (n) parallel combinations, in response there being obtained on each of the corresponding converter outputs a signal of one of two possible forms, and representative of the state of the corresponding electrical switch, and with each converter output being connected individually to a counter to accumulate the number of signals received from the associated converter output of one of the two possible forms in each of consecutive intervals (mt), where (m) is an integer greater than one, and the apparatus including means to record and/or to indicate the number accumulated in any of the (n) counters in such an interval.
2. Apparatus as claimed in claim 1 in which there is recorded and/or indicated the number accumu- lated in each of the (n) counters in an interval (mt).
3. Apparatus as claimed in claim 1 or claim 2 including data processor means arranged to operate upon the numbers accumulated in any counter in a plurality of consecutive intervals (mt), and means to record and/or to indicate the corresponding output signals of the data processor means.
4. Apparatus as claimed in claim 3 in which the data processor means comprises a digital computer.
5. Measurement-expressing apparatus substan- tially as described herein with reference to the accompanying drawing.
Printed for Her Majesty's Stationery Office, by Croydon Printing Company limited, Croydon, Surrey, 1983. Published by The Patent Office, 25 Southampton Buildings, London, WC2A lAY, from which copies may be obtained.
GB08202706A 1982-01-30 1982-01-30 Monitoring system Expired GB2114341B (en)

Priority Applications (6)

Application Number Priority Date Filing Date Title
GB08202706A GB2114341B (en) 1982-01-30 1982-01-30 Monitoring system
US06/456,694 US4580138A (en) 1982-01-30 1983-01-10 Measurement-expressing apparatus
CH128/83A CH661137A5 (en) 1982-01-30 1983-01-11 MEASUREMENT RESULT OF THE DEVICE.
DE19833300964 DE3300964A1 (en) 1982-01-30 1983-01-13 MEASURING DEVICE
IT47627/83A IT1197552B (en) 1982-01-30 1983-01-28 APPARATUS TO EXPRESS MEASUREMENTS, IN PARTICULAR TO CONTROL THE OPERATIONAL STATE OF A MULTIPLE OF STATIONS, CONSTITUTED BY MACHINES AND SIMILAR
FR8301312A FR2520878B1 (en) 1982-01-30 1983-01-28 MEASUREMENT TRANSLATOR

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB08202706A GB2114341B (en) 1982-01-30 1982-01-30 Monitoring system

Publications (2)

Publication Number Publication Date
GB2114341A true GB2114341A (en) 1983-08-17
GB2114341B GB2114341B (en) 1985-04-11

Family

ID=10527999

Family Applications (1)

Application Number Title Priority Date Filing Date
GB08202706A Expired GB2114341B (en) 1982-01-30 1982-01-30 Monitoring system

Country Status (6)

Country Link
US (1) US4580138A (en)
CH (1) CH661137A5 (en)
DE (1) DE3300964A1 (en)
FR (1) FR2520878B1 (en)
GB (1) GB2114341B (en)
IT (1) IT1197552B (en)

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NL8500203A (en) * 1985-01-25 1986-08-18 Ericsson Paging Systems REMOTE CONTROL SYSTEM.
US4652876A (en) * 1985-09-03 1987-03-24 Mobil Oil Corporation Remote switch position determination using constant current signaling
US4695840A (en) * 1985-09-03 1987-09-22 Mobil Oil Corporation Remote switch position determination using duty cycle modulation
US5166678A (en) * 1987-08-11 1992-11-24 Rosemount Inc. Dual master implied token communication system
US4884070A (en) * 1988-04-04 1989-11-28 California Institute Of Technology Method and apparatus for multiplexing switch signals
US4939511A (en) * 1988-12-27 1990-07-03 Grumman Aerospace Corporation DC bus for discrete signals
DE8909649U1 (en) * 1989-08-11 1990-12-06 Siemens Ag, 1000 Berlin Und 8000 Muenchen, De
US5146172A (en) * 1990-08-15 1992-09-08 Sundstrand Corp. Engine identification system
US5619196A (en) 1995-12-28 1997-04-08 Universal Electronics Inc. Single wire keyboard encode and decode circuit
US6577250B1 (en) * 2000-05-19 2003-06-10 Microsoft Corporation Resistance based keyboard key discrimination
DE10044087A1 (en) * 2000-09-07 2002-04-04 Bosch Gmbh Robert Device for activating a control device
DE10052908C1 (en) * 2000-10-25 2002-08-29 Siemens Ag Method and device for recognizing the switching position of a plurality of switches connected to a common input of an electronic unit
US6813524B2 (en) * 2001-08-06 2004-11-02 Emerson Electric Co. Appliance control system with auxiliary inputs
FR2897968B1 (en) 2006-02-24 2008-11-21 Airbus France Sas FIRE DETECTION SYSTEM AND AIRCRAFT EQUIPPED WITH SUCH A SYSTEM
DE102007010591B4 (en) * 2007-03-05 2011-06-22 Texas Instruments Deutschland GmbH, 85356 Switch state detector
US20100066567A1 (en) * 2008-09-18 2010-03-18 Microsoft Corporation Resistive switch matrix
US10502786B2 (en) * 2016-11-18 2019-12-10 GM Global Technology Operations LLC Vehicle including multiple analog switch monitoring system with simultaneous switch-state detection

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Publication number Priority date Publication date Assignee Title
US3599091A (en) * 1969-10-24 1971-08-10 Computer Synectics Inc System utilization monitor for computer equipment
US3922490A (en) * 1973-06-18 1975-11-25 Charles D Pettis Alarm and utility meter reading system employing telephone lines
US4050062A (en) * 1975-08-14 1977-09-20 The United States Of America As Represented Bythe Secretary Of The Air Force System for digitizing and interfacing analog data for a digital computer
US4118700A (en) * 1977-05-31 1978-10-03 Rca Corporation Single wire transmission of multiple switch operations
JPS553238A (en) * 1978-06-22 1980-01-11 Nippon Gakki Seizo Kk Reception frequency display system
DE2935335C2 (en) * 1979-08-31 1985-08-08 Siemens AG, 1000 Berlin und 8000 München DC alarm system
GB2095932B (en) * 1981-03-28 1984-05-31 Ferranti Ltd Line disturbance monitor

Also Published As

Publication number Publication date
GB2114341B (en) 1985-04-11
IT1197552B (en) 1988-12-06
FR2520878A1 (en) 1983-08-05
FR2520878B1 (en) 1986-10-03
US4580138A (en) 1986-04-01
IT8347627A0 (en) 1983-01-28
DE3300964A1 (en) 1983-08-11
CH661137A5 (en) 1987-06-30

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PCNP Patent ceased through non-payment of renewal fee