GB2092782A - Regulated DC-to-DC Converter - Google Patents

Abstract

A feedback-regulated DC-to-DC converter, for use as a power supply, has a transformer (T) whose primary circuit is energized in push-pull operation to direct current pulses alternately in opposite directions through the primary winding (P). The rectified output from the secondary winding (S) of the transformer, when applied to a load (R) controls regulator (REG2) as a function of the voltage drop across the load. The regulator controls the time periods of conductivity of at least one pair of alternately conductive electronic switches (Q6-Q9) in the primary circuit of the transformer, while the time periods of conductivity of one electronic switch of the or each pair overlap with time periods of conductivity of the other electronic switch of the same pair. Voltage stabilization is achieved in that the time periods of overlap increase with decreasing voltage drop across the load and vice versa. <IMAGE>

Description

SPECIFICATION DC-to-DC Converter The invention relates to feedback-regulated DC-to-DC converters for use as power supplies, in which the output voltage is regulated against changes in load or input voltage. Such a power supply is often used to provide a high voltage, direct current output when only a low voltage, direct current source is available.

A typical DC-to-DC converter of this type comprises an input section for changing low voltage, direct current to alternating current, a transformer having its primary winding connected to the output of the input section, and a rectifier circuit connected between the secondary winding of the transformer and output terminals to which a load can be connected. The input section, which is an inverter, usually utilizes a primary circuit designed for push-pull operation, usually implemented by switching transistors which alternate the direction of the current through the primary winding. In such known converters, feedback regulation is accomplished by a regulating circuit which senses the output voltage when applied to a load and controls the switching operation of an additional control transistor in the primary circuit.

The input section of such known converters typically includes a separate pre-regulator circuit utilizing an inductor connected between the DC source and the parallel arrangement of the control transistor and a capacitor. The capacitor performs a smoothing function, which is necessary because of the pulsed operation of the control transistor.

The control transistor is rendered conductive for pulses of time periods whose length is an inverse function of the voltage drop across a load.

This operation controls the quantity of energy first stored by the inductor during such controlled pulse length and then-during intervals between periods of conductivity of the control transistor- released as current pulses through the primary winding of the transformer. Thus, the on-time of the control transistor in the pre-regulator is adjusted by the regulating circuit in response to the output voltage across the load, so that the output voltage is maintained constant.

Power supplies using such DC-to-DC converters have a number of disadvantages. The use of the control transistor with the inductor generates substantial electromagnetic interference in the form of disturbances for other equipment. It is also necessary that the transistors of the inverter circuit which switch the current in alternate directions through the primary winding have no conduction overlap because such overlap would provide a short-circuit of the input capacitor through the switching transistors, resulting in exceedingly high peak currents which tend to damage or destroy the switching transistors. Thus, a period of dead time must be left between current pulses in alternate directions.

This dead time causes a loss of power between the input and the output. In addition, it enlarges the output voltage ripple.

The present invention is based upon the recognition that an improved DC-to-DC converter, useful as a power supply, with push-pull operated primary circuit whose output is regulated by means of a feedback loop, can be obtained by the incorporation of two specific features which, when combined, cooperate to eliminate the shortcomings of known converters of this type.

Of these two features which, in accordance with the invention, contribute to the desired effect, one is the condition that the regulator, which is controlled by the voltage drop across a load, in turn controls the time periods of conductivity of one and the other of at least one pair of electronic switches, usually transistors, instead of the provision of a control transistor of known arrangements, as discussed above. The second feature, which contributes in cooperation with the first feature, is based upon the concept that the time periods of conductivity of the electronic switches,. i.e. transistors, control the operation such that the periods of conductivity overlap.

As a result of the introduction of the overlapping time periods of conductivity of switching transistors, these time periods of overlapping eliminate the dead time in the operation of known circuits. As will be seen from the detailed description of suitable embodiments further below, one of the main results of this concept is that, as there is no dead time period, current is continuously drawn from the DC source applied to the inverter during operation. This reduces the power loss in the transistors and, at the same time, reduces, or practically eliminates, electromagnetic interference with other electrically operated equipment in the vicinity.

4s a further result of the combination of the two features of the invention presently discussed, the number of circuit components is reduced, inasmuch as the control transistor, the smoothing capacitor and the blocking diode, needed in known circuits previously used for the same purpose, can be omitted.

Thus, as will be seen from the detailed description further below, the invention, when compared to the prior art, provides a simplified circuit which, in addition to the simplification, operates under conditions of reduced, or frequently practically eliminated, disturbance of other equipment in the vicinity and with drastically reduced power loss during operation.

In accordance with a broad aspect of the invention, there is provided a feedback-regulated DC-to-DC converter, for use as a power supply, having a transformer whose primary circuit is energized in push-pull operation to direct current pulses alternately in opposite directions through the primary winding, wherein the rectified output from the secondary winding of the transformer, when applied to a load, controls a regulator as a function of the voltage drop across the load, and wherein the regulator controls the time periods of conductivity of at least one pair of alternately conductive electronic switches in the push-pull energized primary circuit of the transformer, the time periods of conductivity of one electronic switch of the or each pair of electronic switches overlapping with time periods of conductivity of the other electronic switch of the same pair.

In accordance with features of specific embodiments of the invention, the time periods of overlap increase with decreasing voltage drop across the load and the time periods of overlap decrease with increasing voltage drop across the load. For high power-handling capability, it was found suitable to use two pairs of transistors constituting the electronic switches.

In preferred implementations of the invention, an inductor used in the primary circuit constitutes the only circuit element which stores energy during each period of overlap.

As will be seen from the detailed description below, the invention provides a simpler, more compact circuit which is capable of functioning under improved operating conditions.

The invention will become better understood from the following detailed description of two embodiments thereof, when taken in conjunction with the drawings, wherein: Figure 1 is a circuit diagram of a prior art DC to-DC converter, with waveform diagrams which graphically illustrate the sequence of operation of switching transistors thereof; Figure 2 is a circuit diagram of a first embodiment of a DC-to-DC converter constructed in accordance with the invention, with waveform diagrams which graphically illustrate the sequence of operation of the switching transistors and simultaneous current conditions; and Figure 3 is a circuit diagram of a second embodiment of a DC-to-DC converter contructed in accordance with the invention, with waveform diagrams which graphically illustrate the sequence of operation of the switching transistors.

In Figure 1 is shown a prior art DC-to-DC converter useful as a power supply. In the circuit shown in Figure 1, a DC input voltage S1 is connected to an input section known as a preinverter circuit which includes an inductor L, a switch referred to as the control transistor 01, a diode CR1, and a smoothing and storage capacitor C1.The transistor Q1 is pulse-operated to periodically connect the inductor L in series with the DC voltage input from source S1, and disabied to allow the energy stored in the inductor L to charge the capacitor C1 through the diode CR. The on-time of the control transistor Q1 is adjusted by a regulator circuit REG, well known in the prior art, which is operable to render transistor Q1 conductive for periods of time whose length is a function of the voltage drop across a load, so that the current through the inductor L increases or decreases, thereby to maintain the output of the converter constant.

This feedback regulation is implemented by a signal applied by the regulator REG via line FB to the base of the control transistor 01. Connected across the capacitor C1 is an inverter circuit including switching transistors Q2, 03. Q4 and 05, the primary winding P of a transformer T, and an impedance Z. Connected across the secondary winding S of the transformer T is a full wave rectifying circuit FWR, which supplies DC voltage to a capacitor C2 and a load resistor R,. The voltage drop across the load resistor R, is sensed at the input of the regulator REG.

In operation, the DC voltage, such as 100 volts, from source S1 is applied to the input section.

During the time that transistor Owl is switched on, under control of the regulator REG, a current pulse flows through the inductor L due to the short circuit provided through the transistor Q1. During this period, energy is stored in the inductor. At the end of the pulse, as shown in the on-off graph for Q1 in Figure 1, when the transistor Q1 is switched off, the energy stored in inductor L causes a current pulse through the diode CR1, to charge the capacitor C1, and flowing through pairs of switching transistors 02, Q3 or 04, or of the inverter section of the circuit. The regulator REG also controls the on-time of the transistors Q2, 03, Q4 and 05.This occurs in such a manner that transistors 02 and Q3 are conducting while the transistors Q4 and OS are "off", i.e. non -conducting and vice versa. Consequently, the voltage across the capacitor C1 as applied by the inductor L causes a current pulse through the primary winding P and the impedance Z in one direction when transistors Q2 and Q3 are conducting and in the opposite direction when transistors Q4 and OS are conducting.

As can be seen in the graphs of on-off times for the transistors Q2, 03, Q4 and Q5 in Figure 1, a period, termed a dead period, is provided in which neither pair of transistors of the inverter section is conducting. Without this dead period, all of the transistors 02, 03, Q4 and Q5 would be conducting simultaneously. Then, the total power available from the input section would be shortcircuited through the transistors 02, or and 04, Q3. This would normally lead to currents of sufficient strength to destroy the switching transistors 02, 03, 04 and Q5.The necessity for providing this dead period between the conducting times of the transistor pairs of the inverter circuit reduces the power available at the output The dead period is also means that the current through the transformer is pulsed, which causes substantial ripple in the output voltage.

Since voltages are applied to the inverter circuit : from the inductor L and stored by the capacitor C1, large peak currents may be driven through the transistors Q2, 03, 04 and Q5 during each switching phase. It is therefore necessary to include the impedance Z in series with the primary winding P for power levels above 100 watts, in order to control the ratio of peak-toaverage current. In a typical circuit, the impedance Z is selected to limit the peak current to approximately twice the average current. Thus, the transistors Q2, Q3, Q4 and Q5 must be selected to withstand stronger currents and accordingly heavier duty and more expensive transistors must be used.

Referring now to Figure 2, there is shown a circuit diagram of a DC-to-DC converter for use as a power supply constructed in accordance with the invention. In the circuit of Figure 2, a DC voltage source S1 is connected in series with an inductor L2 across an inverter circuit including switching transistors Q6, Q7, 08 and 09. The switching transistor Q6 through Q9 are connected for push-pull operation such that they provide a path through the primary winding P of a transformer T having a secondary winding S. The secondary winding S is connected to a full wave rectifier FWR, which supplies DC power to a load resistor R, when connected in parallel with a filter capacitor C2.The voltage across the load resistor RL is sensed by a regulator REG2 which provides switching inputs to the bases of the switching transistors Q6 through 09, thereby to provide feedback regulation of the push-pull operation.

As can be seen from the graphical waveform illustrations of Figure 2, the pairs of switching transistors Q6, 07 and 08, Q9 are conducting during overlapping intervals. However, whereas in the circuit of the prior art, as shown in Figure 1, such simultaneous on-time of pairs of switching transistors would short-circuit the input source and allow damaging peak currents through the switching transistors, in the present invention the inductor L2 acts to constrain a rapid increase in current, thereby eliminating the possibility of destroying the switching transistors 06 through 09, even though they are conducting simultaneously.Moreover, due to the omission of capacitor C1 of the circuit of Figure 1, the level of power through the transistors Q6 through Q9 remains comparatively low.

In operation, the voltage of the source S1 is applied across the switching transistors 06 through 09 to the primary winding P, first in one direction and then in the other direction. For example, if the transistors Q6 and Q7 are switched on by regulator REG2, a current pulse flows from ths source S1 through transistor 06, through the primary winding P and through transistor 07 in a first direction. When the transistors of the pair 08, 09 are turned on, a current pulse flows through the primary winding P in the opposite direction.During each period of overlap in which the regulator REG2 simultaneously turns on both pairs of switching transistors, two short circuits are provided and current flow, limited by the inductor L2, is divided between the two paths, so that the current through any one of the switching transistors essentially is halved, as illustrated in the bottom portion of Figure 2 for the path through the transistors 06 and Q7. The feature of an overlapping intermediate period, shown by the uppermost waveforms in Figure 2, serves the function performed by transistor Q1 in the circuit of Figure 1, allowing a buildup of energy stored in the inductor L2.The length of the overlap period is adjusted by the regulator REG2 as an inverse function of the sensed voltage drop across the load resistor R,. Thus, the length of overlap increases to provide more current through the inductor L2 or it decreases to provide less current through the inductor L2 such that it maintains the load voltage constant.

The circuitry of the regulator REG2 is not shown because it is of a type well known in the art for providing enabling pulses to switching transistors as a function of the magnitude of the output voltage. The switching pulses have two control criteria. Firstly, they must overlap, and suitably, as a second criterion, the length of the periods of overlap must increase, whenever the output voltage is to be increased, to compensate for changes which otherwise would tend to cause the output voltage to decrease, thereby to achieve the desired stabilization. The increase in length of overlap causes the inductor L2 to store energy over a longer period of time, so that the voltage applied to the load is higher.

As can be seen from Figure 2, the circuit thereof is substantially reduced in complexity and is consequently, more compact than that shown in Figure 1. For example, the control transistor 01, the diode CR1, and the capacitor C1 are all eliminated. Elimination of control transistor Ol substantially reduces the electromagnetic interference generated, as compared to that encountered with prior art circuits. In addition, the impedance Z shown in Figure 1 is no longer necessary, because the peak currents through the transistors are limited by the inductor L2.

Accordingly, the transistors Q6 through 09 may be selected to carry only the average current flowing therethrough, and less expensive transistors can be used.

A particular circuit as shown in Figure 2 constructed in accordance with the invention may utilize components of the folowing values: S1--100 v L2-1 mh O6-SVT 250-SB Q7--SVT 250-58 Q8--SVT 250--5B 09-SVT 250-SB C20.1 microfarads, 5 kv RL32 K ohms The circuit shown in Figure 2 is most suitable for use with relatively higher input voltages, since the maximum voltage applied to the transistors 06 through Q9 does not exceed the level of the input voltage from source S1. For comparatively lower input voltages, the embodiment shown in Figure 3 may be preferable.

The schematic circuit shown in Figure 3 includes the DC voltage source S3 connected via the inductor L3 to the center tap of the primary winding P of the transformer T having the secondary winding S. the two terminals of the primary winding P are connected via the collector/emitter path of switching transistors Q10 and 011 to the source S3. The secondary winding S is connected over the full wave rectifier FWR to the load resistor R, which is connected in parallel with a filter capacitor C2. The voltage across the load resistor RL is sensed by the regulator REG3 which controls the on-time of the switching transistors Q10 and Q11 in the same manner as the regulator REG2 controls pairs of transistors in the circuit of Figure 2.As can be seen from the on-off time graphs representing waveforms, provided in Figure 3, the switching transistors Q10 and 011 are turned alternately on and off, with intermediate periods of overlap, as explained above in connection with the pairs of switching transistors in Figure 2. Since a relatively lower voltage (28V) is assumed to be provided by the source S3, it is possible to use a single transistor Q10 or Q1 1 in each of the two current paths. Then, the transistors Q10 and 011 are exposed to a voltage equal to twice the voltage supplied by source S3, but this will not exceed the voltage capacity of the transistors because the voltage from source S3 is a low voltage.As is the case with the circuit of Figure 2, the regulator REG3 provides switching inputs to the transistors Q10 and 011, to maintain these transistors in the on or in the off condition, with regulated length of overlap periods, thereby to compensate for fluctuating operating conditions, such as changes in voltage supply from the source S3 or changes in load resistance.

As with the circuit of Figure 2, elimination of the pre-inverter in the input section, i.e. of the control transistor Q1, reduces electromagnetic interference, elimination of the dead time reduces the output voltage ripple, and reduction of peak currents through the inverter transistors Q10 and Q11 improves the peak-to-average current ratio, allowing the use of less expensive transistors and eliminating the impedance Z.

In summary, subsequent to the above explanations of known converters from which the present invention started out, illustrated in Figure 1, and of converters implementing the present invention, Figures 2 and 3, some further comparison and analysis may assist in the understanding of the underlying principles upon which the invention is based.

Attention is directed again to the control transistor Q1 in Figure 1 which, as shown in the uppermost waveform in Figure 1 just below the circuit diagram, is rendered conductive for short periods of time to produce current pulses during which energy is stored in the inductor L. It will be recognized that this type of operation of the input section of the converter is of the nature to which the literature frequently refers as a "chopper" circuit, inasmuch as an otherwise substantially uniformly constant DC current is periodically interrupted to become a pulsating current.The pulse operation can be seen to be the source of electromagnetic interference which disturbs the operation of other electrically operated equipment in the vicinity and, in addition, it can be expected that the pulse operation is associated with power losses, particularly in transistors, but also in other circuit components.

It is believed that at least the majority, if not all of DC-to-DC converters used heretofore and available on the market made use of chopper circuits in the input section, usually by employing control transistors corresponding to transistor Q1 in the circuit of Figure 1 which figure thus illustrates a typical example of known converters.

In view of the power losses, the electromagnetic interference and other shortcomings of known converters, the present invention emerged from the thought that the pulsating waveform of current flow in the input section of the converter should be avoided. This thinking led to the finding that the overlapping of waveforms of the switching transistors in the inverter circuit, as explained in detail above in connection with Figure 2, can be used as a substitute for the current pulses resulting from the operation of the control transistor 01. The achieved effect can directly be read off the bottom line waveform in Figure 2, which illustrates the current through the inductor L2 of the circuit shown in Figure 2.It can be seen that the current increases during the period of overlap, as described above, thereby storing energy in inductor L2, with this energy then being released through one or the other of the two pairs of transistors Q6, Q7 or Q8, Q9, but the magnitude of current through inductor L2 never reaches the zero level, i.e. the flow of current is not interrupted during operation. Apparently, electromagnetic interference and power losses, believed to be two of the more important shortcomings of prior art converters, are avoided by the inventive concept of combining the feature of overlapping periods of conductivity of the switching transistors in the inverter with the feature that it is the regulator which adjusts the overlap of the time periods of conductivity of the switching transistors, so that no control transistor is needed.

For completeness, it can be mentioned that suggestions have been made in the literature to use overlapping time periods in various developments of electronic equipment, including converter circuits. However, it is presently believed that the overlapping feature was invariably incorporated into converter circuits whose input sections were operable as chopper circuits, i.e. which included a control transistor corresponding to the transistor Q1 of Figure 1.

These converters included complex circuitry with a relatively great number of components, so that they exhibited unreasonable space requirements and comparatively high costs, aside from the fact already mentioned above, namely the presumed power losses and the generation of electromagnetic interference.

Thus, from the preceding comparison and analysis, it can be seen that the specific manner of implementing a converter without a chopper unit section by combining the features of overlapping periods of conductivity of the switching transistors of the inverter with regulation of the converter output by means of controlling the switching transistors of the inverter, instead of employing the control transistor Q1 of Figure 1, leads to a converter whose operational characteristics are quite different from those used heretofore, inasmuch as current through the inductor L2 or L3 in the input section never ceases to flow during operation, with these characteristics leading to an improved product, associated with a reduced number of circuit components employed, as compared to known converters of the same category or similar design.

Obviously, other arrangements might be used to provide a DC-to-DC power supply such as that described herein. For example, various changes might be made in the form of the rectifying circuitry included in the circuit of the secondary winding S of the transformer T to provide voltage doubling or other output characteristics. Thus, while there have been shown two suitable embodiments, it is to be understood that various other adaptations and modifications may be made which fall within the scope of the invention.

Claims (5)

Claims

1. A feedback-regulated DC-to-DC converter, for use as a power supply, having a transformer whose primary circuit is energized in push-pull operation to direct current pulses alternately in opposite directions through the primary winding, wherein the rectified output from the secondary winding of the transformer, when applied to a load, controls a regulator as a function of the voltage drop across the load, characterized by the combination of the following features: (A) the regulator controls the time periods of conductivitv of at least one pair of alternately conductive electronic switches in the push-pull energized primary circuit of the transformer, and (B) the timer periods of conductivity of one electronic switch of the or each pair of electronic switches overlap with time periods of conductivity of the other electronic switch of the same pair.

2. DC-to-DC converter according to Claim 1 characterized in that the time periods of overlap increase with decreasing voltage drop across the load and the time periods of overlap decrease with increasing voltage drop across the load.

3. DC-to-DC converter according to Claim 1 or Claim 2, characterized by two pairs of transistors constituting the electronic switches.

4. DC-to-DC converter according to Claim 1, Claim 2 or Claim 3, characterized by an inductor in the primary circuit, the inductor constituting the only circuit element which stores energy during each period of overlap.

5. DC-to-DC converter substantially as hereinbefore described with reference to the accompanying drawings.