GB2088162A

GB2088162A - Processing Electrical Signals

Info

Publication number: GB2088162A
Application number: GB8037819A
Authority: GB
Original assignee: British Gas Corp
Current assignee: British Gas Corp
Priority date: 1980-11-25
Filing date: 1980-11-25
Publication date: 1982-06-03
Also published as: GB2088162B

Abstract

To reduce the effect of noise on a slowly changing signal, the signal is sampled and average of several digitized values of the sampled signal is obtained. The sampled signals are compared with a previously stored standard and rejected if they differ by more than a predetermined amount. Optionally, an interference detector may be included to inhibit measurements whilst interference is present. <IMAGE>

Description

SPECIFICATION Method of and Apparatus for Detecting and Processing Electrical Interference Signals This invention relates to noise filters, and, in particular is concerned with the reduction of the effects of noise on the signals from transducers associated with microprocessor controlled gas appliances.

Where remote analogue transducers were connected to an analogue/digital converter and amplifier over a line, problems were experienced due to noise picked up in the cable and amplifier.

Particularly deleterious were voltage spikes caused by switching of other consumer units. The induced noise signal was interpreted as valid data giving rise to a spurious reading. For example, in a temperature sensor circuit for a heating control system, voltage spikes of the order of twenty volts were induced by a spark generator used for ignition of a gas cooker. The normal d.c. signal level from the transducer was two volts and the noise signal in this case was equivalent to a temperature reading of 2000 C. A further disadvantage of high voltage spikes is that they can cause destruction of metaloxide-semiconductor devices used in the control system.

One method of overcoming the effects of noise is to incorporate a low-pass filter network in the analogue circuits. However, such a network may cause instability and, if it has a low dynamic impedance, give rise to overshoot and hunting in the d.c. level. In order to overcome this difficulty micro-processor-based apparatus which stores a succession of readings and takes an average has been devised. Readings which deviate from the expected value by more than a preset amount are rejected and not included in the sample.

According to the present invention there is provided apparatus for attenuating a rapidly fluctuating component in a constant or slowly changing electrical signal comprising signal input means, analogue to digital conversion means cyclically to produce a series of digital signals corresponding to instantaneous values of said electrical signal, counter means for producing a sum of said series of digital signals and divider means for producing a further digital signal corresponding to the average value of said series of digital signals.

An embodiment of the invention will now be described by way of example with reference to the accompanying drawings in which: Figure 1 is a diagrammatic representation of a system incorporating a plurality of transducers Figure 2 shows the connection of a temperature sensor to an operational amplifier Figure 3 shows a low-pass filter network for reduction of noise signals Figure 4 is a trace showing the effects of a noise impulse on a received signal level; and Figure 5 shows the circuit of an interference detector.

Referring now to Figure 1 of the drawings, a plurality of temperature sensors 1 was connected by ten-metre lengths of unscreened mains cable 2 to a multiplexer 3. The multiplexer was coupled through an operational amplifier 4 to an analogue-to-digital converter 5. The output data lines of the A/D converter fed the input ports 6 of a microprocessor 7. The analogue signal input arrangement is shown in greater detail in Figure 2. A constant current temperature sensor 8 type AD590 was connected to a 1 2V negative power supply. An operational amplifier 9 compared the input signal with a reference voltage set by a zener diode DZi. An adjustable zero point was set by a variable resistor RV1 and gain by a second variable resistor RV2 in a feedback loop.This permitted a two-point setting of the temperature scale at the triple point and at 200 C. Gain was set to 10 giving a O to 5V swing to correspond to a 500C temperature range. An analogue-to-digital converter type RS8703 sampled the output of the operational amplifier and fed an eight-bit parallel data line to the input/output ports of an SDK85 microprocessor development board. This board, which is based on an Intel 8085 8-bit microprocessor includes random access memory which can be loaded with a program to read data from the input ports and convert it to an optical signal by means of an integral seven segment lightemitting diode array.

Conventionally, noise signals are attenuated using a low-pass filter such as that comprising resistors R31 R32 R33 R34 and capacitors C31 C32 in the signal path as shown in Figure 3. However, the dynamic response of such a filter when stimulated by a voltage spike at instant S exhibits hunting for a time interval T before it again settles down to a steady value.

This difficulty is overcome by storing the instantaneous value of the measured parameter and comparing it with subsequent samplings. If the difference between successive values exceeds a predetermined limit (conveniently in the present case, that corresponding to a temperature change rate greater than 0.40 C/sec) then the measurements are rejected until they again become steady.

Further refinement is obtained by employing an interference detector of which a simple embodiment is illustrated in Figure 5. A pick-up coil L feeds an input of a monostable M which provides an inhibit signal to the microprocessor circuit so long as a noise signal is being induced in the pick-up coil.

A suitable program for attenuating noise signals using a control system based on the Intel 8085 microprocessor is depicted in Table 1.

Although the embodiment described relates to a temperature measuring apparatus, it will be apparent to those skilled in the art that the techniques involved are equally applicable to other apparatus in which it is necessary to measure steady signals in the presence of high-frequency noise.

Although a program applicable to an 8085 8-bit microprocessor has been given, other microprocessor based systems could equally well have been employed.

Table I 1 $ MOD85 TITLE ("RS ADC CONTROL # MEASURE ROUTINE") 2 $ PAGE WIDTH (100) NOPAGING MACROFILE 3 ; 4 ; 5 ; ************************************ * ************************************ 6 ; 7 ; 8 ; RS ADC CONNECTED TO SDK-85 9 ; PROGRAM INITIATES CONVERSION, READS DATA # DISPLAYS ON SDK-85.

10 ; CONTAINS SPARK DETECT FOR IGNORING DATA, AVERAGING OF 256 VALUES 11 ; AND CONTROLS A 4 WAY MULTIPLEXOR, WHICH IS USED TO SELECT 12 ; 4 ANALOGUE SIGNALS SUCCESSIVELY.

13 ; 14 ; 15 ; 16 ; 17 ; 18 ASEG ; ABSOLUTE SEGMENT 19 ; #A## 20 ORG #A##H ; ADDRESS OF EXPANSION 8755A FROM 21 ; 22 ; 23 ; 24 ; 25 ; I/O PORT DEFINITIONS # PROGRAM EQUATES 26 ; 27 ; ##21 28 PORTA EQU 21H ; BASIC 8155 PORT A ##22 29 PORTB EQU 22H ; BASIC 8155 PORT B ##23 30 PORTC EQU 23H ; BASIC 8155 PORT C ##2# 31 CMNDP EQU 2#H ; BASIC 8155 COMMAND/STATUS PORT 19## 32 DCNTRL EQU 19##H ; MEMORY MAPPED I/O ADDRESS OF 8279 33 ; #### 34 KMODE EQU # ; KBD/DSP MODE (2 KEY RLOVR, 8 CHAR LEFT ENT) ##CC 35 KBNIT EQU #CCH ; CNTRL CHAR TO SET DSP Q/P TO 15 FOR BLANKING 36 ; 37 ; ###1 38 BUSYB EQU #######1B ; BUSY BIT TO PORT B BIT # ###2 39 DATAV EQU ######1#B ; DATA VALID TO PORT B BIT 1 ###4 40 SPKDET EQU #####1##B ; SPARK DETECT TO PORT B BIT 2 41 ; Table I (contd.) ##1# 42 SPEKR EQU #1####B ; SPEAKER TO PORT C BIT 4 ###8 43 INHIB EQU ##1###B ;MLPXR INHIBIT (#=ENABLE) ###6 44 CHANL EQU ###11#B ; CHANNEL SELECT BITS ###1 45 INITC EQU #####1B ; INITIATE CONVERSION TO PORT C BIT # 46 ; 2#C2 47 STCK EQU 2#C2H ; STACK AREA BELOW MONITOR RAM AREA 48 ; #36E 49 UPDDT EQU #36EH ; SDK-85 MONITOR DISPLAY ON DATA FIELD #363 50 UPDAD EQU #363H ; SDK-85 MONITOR DISPLAY ON ADDRESS FIELD #5F1 51 DELAY EQU #5F1H ; SDK-85 MONITOR DELAY ROUTINE 52 ; FFFF 53 WAIT EQU #FFFFH ; DELAY PARAMETER FOR WAIT BTWN CHANL SELECTS ##8# 54 DPAR EQU ###8#H ; SECOND DELAY PARAMETER FOR BUZZ ROUTINE ##4# 55 NBUZR EQU 64 ; NBR OF TIMES BUZZER SOUNDS WHEN SPARK DETECTED 56 ; ###1 57 DIFFR EQU 1 ; DIFFERENCE FOR COMPARISON IN COMPAE 58 ; 61 ; 62 ; MAIN PROGRAM STARTS HERE 63 ; 64 ; #A## 31C22# 65 START:LXI SP,STCK ; SET STACK POINTER 66 ; 67 ; DISABLE MULTIPLEXOR, AND SET UP CHANNEL SELECT FOR CHAN ZERO 68 ; INITIALIZE 8155 I/O PORTS (A, B=I/P C=O/P) 69 ; #A#3 3E#8 70 MVI A, INHIB ; INHIBIT MLPXR BIT #A#5 D323 71 OUT PORTC ; SET O/P PORT #A#7 32##2# 72 STA CSAVE ; AND SAVE IN MEMORY BYTE #A#A #1#### 73 LXI B;####H ; SET CHANNEL ZERO #A#D C5 74 PUSH B ; AND SAVE CHANNEL &num; ON STACK #A#E 3E## 75 MVI A, KMODE ; SET KBD/DSP MODE #A1# 32##19 76 STA DCNTRL ; AND PROGRAM 8279 77 ; 78 ; LOOP HERE ON THE 4 CHANNELS 79 ; #A13 3E#C 80 LOOP:MVI A, #CH ; I/O PORT COMMAND CODE #A15 D32# 81 OUT CMNDP ; O/P TO 8155 COMMAND PORT 82 ; 83 ; START BY GETTING A STABLE VALUE FOR THIS CHANNEL 84 ; #A17 C1 85 POP B ; GET CHANNEL NUMBER TO REG C Table I (contd.) #A18 C5 86 PUSH B ; AND SAVE ON STACK #A19 CD 15#B 87 CALL SELECT ; AND SELECT THIS CHANNEL ON MLPXR 88 ; 89 ; GET AVERAGE OF 256 READINGS TO REG A 90 ; #A1C CD4A#A 91 CALL MZ256 ; MEASUREMENT ROUTINE 92 ; 93 ; DISABLE MULTIPLEXOR, DISPLAY CHANNEL NBR ON DATA FIELD OF SDK-85, 94 ; CONVERT AVERAGE READING TO BCD, AND DISPLAY ON ADDRESS FIELD OF SDK-85 95 ; #A1F 4F 96 MOV C, A ; SAVE AVERAGE READING IN REG C #A2# CD29#B 97 CALL DESEL ; DISABLE MULTIPLEXOR #A23 3E## 98 MVI A, KMODE ; REPROGRAM 8279 MODE #A25 32##19 99 STA DCNTRL ; IN CASE RFI HAS UPSET #A28 3ECC 100 MVI A, KBNIT ; SET DSP FOR BLANKING #A2A 32##19 101 STA DCNTRL ;O/P TO 8279 CNTRL PORT #A2D CDBB#A 102 CALL BINBCD ; CONVERT AVERAGE IN REG C TO BCD IN REG-PAIR HL #A3# EB 103 XCHG ; GET BCD TO REG-PAIR DE #A31 CD63#3 104 CALL UPDAD ; AND DISPLAY ON ADDRESS FIELD OF SDK-85 #A34 C1 105 POP B ; GET CURRENT CHANNEL NBR #A35 79 106 MOV A, C ; GET CHAN NBR TO ACC #A36 C5 107 PUSH B ; SAVE CURR CHAN NBR ON STACK #A37 CD6E#3 108 CALL UPDDT ; DISPLAY CHANNEL NBR ON DATA FIELD OF SDK-85 #A3A 11FFFF 109 LXI D, WAIT ; SET DELAY PARAMETER #A3D CDF1#5 110 CALL DELAY ; AND WAIT A WHILE #A4# C1 111 POP B ; GET CHANNEL NBR #A41 #C 112 INR C ; INCREMENT TO NEXT CHANNEL #A42 79 113 MOV A, C ; GET CHAN NBR #A43 E6#3 114 ANI ######11B ; MASK OFF ALL BUT LEAST 2 BITS #A45 4F 115 MOV C,A ; PUT CHAN NBR TO REG C #A46 C5 116 PUSH B ; AND SAVE ON STACK #A47 C313#A 117 JMP LOOP ; AND LOOP FOREVER 118 ; 119 ; 122 ; 123 ;MZ256-TAKE 256 READINGS FROM THE ADC TO GET AN AVERAGE VALUE 124 ; 125 ; INPUT: NONE. OUTPUT:A.

126 ; USES: A,B,C,D,E,H,L STACK:1 LEVEL.

127 ; CALLS: MEZUR, BUZZ, COMPAE.

128 ; 129 ; Table I (contd.) #A4A 11#### 130 MZ256: LXI D,# ; ZERO ADDING REG-PAIR #A4D CD8C#A 131 LP#: CALL MEZUR ; GET A VALUE FROM ADC #A5# D259#A 132 JNC LP1 ; CONTINUE IF SPARK NOT DETECTED #A53 CDEB#A 133 CALL BUZZ ; SOUND BUZZER #A56 C34D#A 134 JMP LP# ; AND TRY AGAIN #A59 5F 135 LP1: MOV E, A ; SAVE GOOD VALUE #A5A CD8C#A 136 LP2: CALL MEZUR ; GET ANOTHER VALUE #A5D D266#A 137 JNC LP3 ; CONTINUE IF SPARK NOT DETECTED #A6# CDEB#A 138 CALL BUZZ ; SOUND BUZZER #A63 C35A#A 139 JMP LP2 ; AND TRY AGAIN #A66 CDAE#A 140 LP3: CALL COMPAE ; COMPARE NEW VALUE WITH LAST VALUE MEASURED #A69 DA59#A 141 JC LP1 ; TOO DIFFERENT, SO TRY AGAIN 142 ; 143 ; ONE GOOD VALUE MEASURED, SO SAVE IN SUM, 144 ; AND GET ANOTHER 255 GOOD VALUES.

145 ; #A6C 21#### 146 LXI H,# ; ZERO RESULT TO START #A6F #EFF 147 MVI C, 255 ; SET REG C FOR ANOTHER 255 VALUES #A71 19 148 DAD D ; ADD VALUE TO SUM #A72 CD8C#A 149 LP5: CALL MEZUR ; GET A VALUE #A75 D27E#A 150 JNC LP6 ; CONTINUE IF NO SPARK DETECTED #A78 CDEB#A 151 CALL BUZZ ; SOUND BUZZER #A7B C372#A 152 JMP LP5 ; TRY AGAIN #A7E CDAE#A 153 LP6: CALL COMPAE ; IS NEW VALUE VERY DIFFERENT TO LAST VALUE #A81 DA72#A 154 JC LP5 ; YES, TRY AGAIN #A84 5F 155 MOV E, A ; SAVE NEW VALUE #A85 19 156 DAD D ; ADD INTO SUM #A86 #D 157 DCR C ; DECREMENT LOOP COUNTER #A87 C272#A 158 JNZ LP5 ; AND LOOP TILL 256 VALUES READ #A8A 7C 159 MOV A, H ; GET AVERAGE READING OF 256 VALUES #A8B C9 160 RET ; AND RETURN TO CALLER 161 ; 162 ; 163 ; 164 ; 165 ; 166 ; SUBROUTINE "MEZUR" TO MEASURE A VALUE FROM THE RS ADC 167 ; RETURNS WITH THE CY FLAG SET IF A SPARK IS DETECTED 168 ; INPUT:NONE. OUTPUT:A OR CY.

169 ; USES:A, B. STACK:1 LEVEL.

170 ; CALLS:NONE.

171 ; Table I (contd.) #A8C E5 172 MEZUR: PUSH H ; SAVE HL ON STACK #A8D 21##2# 173 LXI H, CSAVE ; GET ADDR OF PORT C DATA #A9# 7E 174 MOV A, M ; GET PORT C DATA #A91 F6#1 175 ORI INITC ; SET BIT FOR HIGH O/P #A93 D323 176 OUT PORTC ; O/P TO SET "INIT CONV" HIGH #A95 E6FE 177 ANI NOT INITC ; CLEAR BIT TO ZERO #A97 77 178 MOV M, A ; SAVE AS PORT C DATA #A98 D323 179 OUT PORTC ; O/P TO SET "INIT CONV" HIGH #A9A E1 180 POP H ; RESTORE REG-PAIR HL 181 ; 182 ; WAIT UNTIL BUSY LINE GOES LOW 183 ; #A9B DB22 184 MZLP#: IN PORTB ; GET STATUS INFO #A9D 47 185 MOV B, A ; SAVE TEMPORARILY #A9E E6#4 186 ANI SPKDET ; HAS SPARK BEEN DETECTED ? #AA# CAA5#A 187 JZ MZLP1 ; NO, CONTINUE WITH ROUTINE #AA3 37 188 STC ; YES, SET THE CY FLAG #AA4 C9 189 RET ; AND RETURN 190 ; #AA5 78 191 MZLP1: MOV A, B ; GET THE INPUT DATA #AA6 E6#1 192 ANI BUSYB ; MASK OFF "BUSY" BIT #AA8 C29B#A 193 JNZ MZLP# ; AND LOOP TILL READY 194 ; 195 ; INPUT DATA AND RETURN 196 ; #AAB DB21 197 IN PORTA ; GET DATA #AAD C9 198 RET ; RETURN WITH CY CLEAR FROM "ANI" INST 199 ; 200 ; 201 ; 202 ; 203 ; 204 ; SUBROUTINE "COMPAE" TO COMPARE REGISTERS A # E 205 ; RETURNS WITH CY SET IF (A)±DIFFR=(E) 206 ; INPUT: A,E OUTPUT: CY.

207 ; USES: A,B,E. STACK: NONE.

208 ; CALLS: NONE.

209 ; #AAE #6#3 210 COMPAE: MVI B,(2#DIFFR+1); SET FOR A-DIFFR,...A,...A+DIFFR #AB# D6#1 211 SUI DIFFR ; SET A TO A-DIFFR #AB2 BB 212 CAELP#: CMP E ; ARE THE 2 REGS EQUAL ? #AB3 C8 213 RZ ; YES, SO RETURN WITH CY CLEAR FROM 'CMP' INST Table I (contd.) #AB4 3C 214 INR A ; INCREMENT A #AB5 #5 215 DCR B ; DECREMENT LOOP COUNT #AB6 C2B2#A 216 JNZ CAELP# ; AND LOOP TILL DONE #AB9 37 217 STC ; SET CY FLAG #ABA C9 218 RET ; AND RETURN TO CALLER 219 ; 220 ; 221 ; 222 ; 223 ; 224 ; SUBROUTINE "BINBCD" TO CONVERT FROM BINARY TO BCD 225 ; INPUT: C. OUTPUT: H, # L 226 ; USES: A,C,H,L STACK: NONE.

227 ; CALLS: NONE 228 ; #ABB 21#### 229 BINBCD: LXI H,# ; ZERO RESULT TO START #ABE 79 230 MOV A, C ; GET INPUT VALUE #ABF FE8# 231 CPI 128 ; IS NBR > 128 ? #AC1 FAC7#A 232 JM BB1 ; NO, CONTINUE CHECK #AC4 D664 233 SUI 1## ; YES, SUBTRACT 100 #AC6 24 234 INR H ; AND INCREMENT MOST SIG NIBBLE #AC7 FE64 235 BB1: CPI 1## ; IS NBR > 100 ? #AC9 FACF#A 236 JM BB2 ; NO, CONTINUE CHECK #ACC D664 237 SUI 1## ; YES, SUBTRACT 1## #ACE 24 238 INR H ; AND INCREMENT MSN #ACF 4F 239 BB2: MOV C, A ; SAVE POSSIBLY ALTERED VALUE #AD# 79 240 BB3:MOV A, C ; GET VALUE #AD1 FE#A 241 CPI 1# ; IS NBR > 10 ? #AD3 FAE##A 242 JM BB4 ; NO, CONTINUE CHECK #AD6 D6#A 243 SUI 1# ; YES, SUBTRACT 1# #AD8 4F 244 MOV C, A ; SAVE NEW VALUE OF NBR #AD9 7D 245 MOV A, L ; GET LOW BYTE OF RESULT #ADA C6 1# 246 ADI 1#H ; ADD 1 TO HI NIBBLE #ADC 6F 247 MOV L, A ; RESTORE RESULT #ADD C3D##A 248 JMP BB3 ; AND LOOP TILL NBR < 10 #AE# 79 249 BB4: MOV A, C ; GET NBR #AE1 B7 250 ORA A ; SET STATUS FLAGS IN CPU #AE2 CAEA#A 251 BB5: JZ BB6 ; IF ZERO THEN FINISHED #AE5 2C 252 INR L ; INCREMENT LOW NIBBLE OF RESULT #AE6 #D 253 DCR C ; DECREMENT NBR #AE7 C3E2#A 254 JMP B85 ; AND LOOP TILL NBR=# Table I (contd.) #AEA C9 255 BB6: RET ; AND RETURN TO CALLER 256 ; 257 ; 258 ; 259 ; 260 ; 261 ; SUBROUTINE "BUZZ" TO SOUND THE BUZZER FOR A SHORT WHILE 262 ; INPUT: NONE. OUTPUT: NONE.

263 ; USES: B. STACK 3 LEVELS.

264 ; CALLS: DELAY.

265 ; #AEB E5 266 BUZZ: PUSH H ; SAVE REG-PAIR HL AS USED FOR MEM PTR #AEC D5 267 PUSH D ; SAVE DATA AS DELAY USES THIS REG-PAIR #AED #64# 268 MVI B,NBUZR ; SET NUMBER OF TIMES TO LOOP #AEF 21##2# 269 LXI H,CSAVE ; SET ADDR OF PORT C SAVE DATA #AF2 7E 270 BZLP#: MOV A, M ; GET PORT C DATA #AF3 F618 271 ORI SPEKR OR INHIB ; SET SPEAKER BIT HIGH AND INHIBIT MLPXR #AF5 77 272 MOV M, A ; SAVE IN PORT C DATA #AF6 D323 273 OUT PORTC ; OUTPUT TO SPKR PORT #AF8 118### 274 LXI D,DPAR ; SET A DELAY PARAMETER #AFB CDF1#5 275 CALL DELAY ; AND WAIT A WHILE #AFE 7E 276 MOV A, M ; GET PORT C DATA #AFF E6EF 277 ANI NOT-SPEKR ; SET SPEKR BIT TO ZERO #B#1 77 278 MOV M, A ; AND SAVE PORT C DATA #B#2 D323 279 OUT PORTC ; OUTPUT TO SPKR PORT #B#4 118### 280 LXI D,DPAR ; SET A DELAY PARAMETER #B#7 CDF1#5 281 CALL DELAY ; WAIT A WHILE #B#A #5 282 DCR B ; DECREMENT COUNT #B#B C2F2#A 283 JNZ BZLP# ;AND LOOP AROUND SEVERAL TIMES #B#E 7E 284 MOV A, M ; GET PORT C DATA #B#F E6F7 285 ANI NOT INHIB ; ENABLE MLPXR #B11 77 286 MOV M,A ; AND SAVE PORT C DATA #B12 D1 287 POP D ; RESTORE REGISTER DE #B13 E1 288 POP H ; # HL 290 ; 291 ; 292 ; 293 ; 294 ; 295 ; SUBROUTINE "SELECT" TO TURN MLPXR ON TO A CERTAIN CHANNEL Table I (contd.) 296 ; INPUT: C. OUTPUT: NONE.

297 ; USES: A, C. STACK: 1 LEVEL.

298 ; CALLS: NONE.

299 ; #B15 E5 300 SELECT: PUSH H ; SAVE REG-PAIR HL #B16 21##2# 301 LXI H,CSAVE ; SET ADDR OF PORT C SAVE #B19 79 302 MOV A,C ; GET CHANL NBR #B1A E6#3 303 ANI ######11B ; MASK OFF ALL BUT LEAST 2 BITS #B1C #7 304 RLC ; ROTATE TO PUT IN CORRECT BIT POSITION #B1D 4F 305 MOV C,A ; SAVE IN REG C TILL PORT C MASK RDY #B1E 7E 306 MOV A,M ; GET PORT C DATA #B1F E6F9 307 ANI NOT CHANL ; SET CHANL BITS TO ZERO #B21 E6F7 308 ANI NOT INHIB ; SET INHIBIT LOW TO ENABLE MLPXR #B23 B1 309 ORA C ; SET CHANL SELECT BITS FROM CHANL &num; #B24 77 310 MOV M,A ; SAVE PORT C DATA #B25 D323 311 OUT PORTC ; AND SELECT CHANL ON MPLXR #B27 E1 312 POP H ; RESTORE REG-PAIR HL #B28 C9 313 RET ; AND RETURN 314 ; 315 ; 316 ; 317 ; 318 ; SUBROUTINE "DESEL" TO DESELECT THE MULTIPLEXOR 319 ; INPUT: NONE. OUTPUT: NONE.

320 ; USES: A. STACK: 1 LEVEL.

321 ; CALLS: NONE.

322 ; 323 ; #B29 E5 324 DESEL: PUSH H ; SAVE REG-PAIR HL #B2A 21##2# 325 LXI H,CSAVE ; SET ADDR OF PORT C SAVE DATA #B2D 7E 326 MOV A,M ; GET PORT DATA #B2E F6#8 327 ORI INHIB ; SET INHIBIT HIGH TO DISABLE MLPXR #B3# 77 328 MOV M,A ; SAVE NEW PORT C DATA #B31 D323 329 OUT PORTC ; AND TURN OFF MLPXR #B33 E1 330 POP H ; RESTORE REG-PAIR HL #B34 C9 331 RET ; AND RETURN 332 ; 333 ; 334 ; 335 ; 336 ; 337 ; DATA AREA IN 8155 RAM SPACE Table I (contd.) 338 ; 2### 339 ORG 2###H ; BASE ADDRESS OF BASIC 8155 RAM 340 ; 341 ; 2### ## 342 CSAVE: DB # ; SAVE AREA FOR PORT C DATA 343 ; 344 ; 345 ; 346 ; 347 ; #A## 348 END START ; END OF PROGRAM

Claims

1. Apparatus for attenuating a rapidly fluctuating component in a constant or slowly changing electrical signal comprising signal input means, analogue to digital conversion means cyclically to produce a series of digital signals corresponding to instantaneous values of said electrical signal, counter means for producing a sum of said series-of digital signals and divider means for producing a further digital signal corresponding to the average value of said series of digital signals.

2. Apparatus for attenuating a rapidly fluctuating component in a constant or slowly changing electrical signal as claimed in claim 1 incorporating means for storing an instantaneous value of a measured parameter or a digital signal derived therefrom and means for comparing it with a previously stored reference value, together with means for rejecting the stored instantaneous value if it differs from the stored value by more than a predetermined amount.

3. Apparatus for attenuating a rapidly fluctuating component in a constant or slowly changing electrical signal as claimed in either claim 1 or claim 2 further including interference detector means together with inhibitor means coupled thereto to inhibit the further processing of measured signals whilst interference signals are being received.

4. Attenuating apparatus as claimed in claim 3 wherein said interference detector means comprises a pickup coil.

5. Attenuating apparatus as claimed in either claim 3 or claim 4 wherein said inhibitor means comprises a monostable.

6. Apparatus for attenuating a rapidly fluctuating component in a constant or slowly changing electrical signal substantially as herein described with reference to and as shown in the accompanying drawings.