GB2086111A

GB2086111A - Analogue Control Systems

Info

Publication number: GB2086111A
Application number: GB8130906A
Authority: GB
Original assignee: Northern Engineering Industries PLC
Current assignee: Rolls Royce Power Engineering PLC
Priority date: 1980-10-23
Filing date: 1981-10-13
Publication date: 1982-05-06
Also published as: GB2086111B

Abstract

An analogue control system has control circuitry (producing test signals) and fault-detection circuitry for repeatedly performing fault-detection tests. The fault-detection circuitry passes pairs of the test signals through multiple-to-single channel analogue switching devices 82, 84, the single channels of which are connected to a differential amplifier 80. The amplifier output is connected to a voltage level detector 86 which is switchable to give logic 0 or logic 1 signals for different tests when the voltage is within a window and the reverse signal when it is outside the window. The detector is connected to a single-to-multiple channels analogue switching device 88. Corresponding channels of devices 82, 84, 88 are switched simultaneously with one another. The multiple channels of device 88 are connected to a fault- latch section 90 which feeds a diagnostic section 94. Typically, the system is used to control the position of a steam valve in a steam turbine, the control circuitry controlling the valve position in response to control signals modified in response to feed-back signals. <IMAGE>

Description

SPECIFICATION Analogue Control Systems The invention relates to analogue control systems.

A typical application for an analogue control system is the control of the positions of the steam valves of a steam turbine in a power-generating unit. Each valve of such a turbine is opened against the action of a spring by a power piston which is, in turn, operated by a pilot valve.

Operation of the pilot valve is controlled by a servo valve which, in turn, operates in response to a control signal from the turbine governing system. That control signal is processed in an analogue control system to take in account the positions of the pilot valve and power piston by means of feedback loops.

In such an analogue control system, it has been the practice to provide fault-detection circuits for each of each of the following functions: a) power-piston fault; b) pilot-valve fault; c) servo-valve fault; d) servo-valve amplifier fault; e) control signal check; and f) check the validity of the feedback loop for the power piston.

Such multiplicity of fau It-detection circuits in the control system may result in spurious faults and turbine shut-downs.

It is an aim of the present invention to reduce the circuitry involved in fault-detection in an analogue control system.

According to the invention, an analogue control system comprises a control circuit from which test signals are derivable and a fault-detection circuit for repeatedly performing a series of faultdetection tests, the fault-detection circuit comprising a differential amplifier, first and second multiple-to-single channel analogue switching devices, the single channels being connected to respective inputs of the amplifier and corresponding ones of the multiple channels being switchable simultaneously, the multiple channels being connected to the outputs of a test signal conditioning section for receiving signals from the control circuit, the section conditioning the test signals such that they are processable by the amplifier, an output of the amplifier being connected to an input of a voltage level detector which is switchable to give an output signal of logic 0 for some tests and of logic 1 for other tests when the detected voltage is within a voltage window and the reverse output when the detected voltage is outside the window, the tests being arranged such that, for a series of tests, all logic 0 or all logic 1 output signals from the detector indicates a fault in the fault-detection circuit, a third multiple-to-single channel switching device, the single channel being connected to the output of the detector and the multiple channels being switchable simultaneously with said corresponding multiple channels of the first and second devices and being connected to input channels of a fault-latch section, the fault-latch section having capacitors, chargeable or dischargeable in response to a logic signal from the detector, and latches, each operable in response to the discharge of the respective capacitor in a fault situation and a diagnostic section connected to the output channels of the fault-latch section to receive fault signals upon operation of any of the latches, the diagnostic section being able to process fault signals to indicate faults and/or to generate alarm or other signals.

Preferably, the control circuit controls the position of a steam valve of a steam turbine, the circuit comprising power-piston positionindicating means connected to a first phaseconscious rectifier, pilot-valve position-indicating means connected to a second phase-conscious rectifier, a first summing junction having a first input for receiving a valve control signal and a second input connected to the first rectifier, a second summing junction having a first input connected to the output from the first summing junction and a second input connected to the second rectifier and two servo-valve amplifiers each having an input connected to the output from the second summing junction and outputs connected to drive means for the servo valve.

A steam turbine control system will now be described to illustrate the invention by way of example only with reference to the accompanying drawings, in which: Figure 1 is a block diagram of the overall system; Figure 2 is a block diagram of the analogue control circuit for one of the steam valves; Figure 3 is a block diagram of the faultdetection circuit associated with the circuit shown in Figure 2; Figure 4 is a diagram showing the timing pulses used in the circuit; Figure 5 is a block diagram of the tests performed; and Figure 6 is a block diagram of the action taken upon a fault being detected.

The steam turbine 10 (Figure 1) drives a generator 12. The turbine 10 typically has four steam inlet valves 14 (only one shown). Each valve 14 is held shut by a spring 16 and is opened against the action of the spring 1 6 by a power piston 1 8. Operation of the power piston 1 8 is regulated by a pilot valve 20 which is, in turn, regulated by a servo valve 22. The servo valve 22 is of the type operated by a magnetic torque device 24.

Control signals for positioning the valves 14 are derived from the turbine speed and the demand on the turbine. The control signals are derived in three separate but parallel channels.

The turbine speed is typically determined by a toothed wheel mounted on the turbine shaft and a magnetic probe unit, there being three such units 26a, 26b and 26c. The outputs of the probes 26a, 26b and 26c are each connected to a respective signal processing unit 28a, 286 and 28c. The speed signal is compared with a control signal from a manual controller 30 by means of an analogue or digital signal processing technique the controller 30 being set in accordance with the demand placed on the generator 12. The resultant signal is then processed in accordance with the operational mode of the turbine which is selected by a controller 34.The controller 34 supplies signals determining whether the turbine is to be operated in a throttle-governing mode, i.e. all the valves are altered according to demand, or a nozzle-governing mode, i.e. two valves are maintained fully open and the turbine is controlled by altering the remaining valves. The throttlegoverning mode is preferred during start-up of the turbine in order to minimise temperature effects but the nozzle-governing mode is preferred following start-up due to a greater efficiency being achieved in that mode. However, in some systems the turbine may be always operated in one or other mode and the unit 34 could be omitted.

The units 28a, 286 and 28c each have an output for each valve 14 connected to an analogue control system 36 for each valve 14.

Thus, three control signals, in the form of analogue signals which should be substantially identical, for a particular valve 14 are fed into the system 36 for that valve 14.

The analogue control system 36 are identical and only one need be described (see Figures 2, 3, 4 and 5).

Figure 2 shows the control circuit of the system 36. A 2kHz oscillator 38 is connected to a timing pulse generator 40, to a power-piston transducer driver 42 and to a pilot-valve transducer driver 44. The drivers 42 and 44 respectively power a power-piston position transducer 46 and a pilot-valve position transducer 48, the transducers 46 and 48 being of the differential transformer type. The outputs of the transducers 46 and 48 are connected to respective phase-conscious rectifiers 50 and 52.

The outputs of the rectifiers 50 and 52 are connected to respective summing junctions 54 and 56. The outputs from the transducer 46 are also connected, in parallel to a third phase conscious rectifier 58, the output of which is connected to a LED display 60 for showing the position of the valve. The output can also be led to other display, control or recording equipment.

The summing junction 54 also has an input connected to the output of a majority voter unit 62 of, for example, the type described in UK Patent Specification No. 1555123. The three inputs of the majority voter unit 62 are connected to the outputs of the units 28a, 286 and 28c for the valve 14 under consideration. The output signal of the majority voter unit 62 is: a) the average of the three input signals when the signals do not differ markedly from one another, for example when the signals are within 5% of full scale value of one another; b) is the average of the two closer signals when one of the signals differs markedly from the other two, for example when the difference of said one signal is greater than 5% of full scale value; or c) if the discrepancies are greater than 5% of full scale value, then the median signal will be selected.

The output of the summing junction 54 is connected to an input of the summing junction 56 via a non-linear amplifier 64. The output signal from the summing junction 54, which is the error between the required-position signal from the majority voter unit 62 and the actual-position feedback signal from the rectifier 50 of the power piston 18, is modified by the amplifier 64 to take into account the fact that the ports of the pilot valve 20 are circular which results in a flow which varies non-linearly upon movement of the pilot valve spool.

The output of the summing junction 56 is connected in parallel to two servo-valve amplifiers 66 and 68 which control the current to the coils of the magnetic torque device 24 of the servo-valve 22 which are arranged to act equally and in the same sense upon the servo-valve operating member. The output signal from the summing junction 56 is the error between the incoming error signal from the summing junction 54 and the feedback signal from the rectifier 52.

The feedback signal relating to the pilot valve 20 is required to limit movement of the pilot valve 20 beyond the fully-open position in either sense, i.e.

to pressurise or de-pressurise the power piston 18.

An on-load test (OLT) facility consists of an O.L.T. ramp generator 70 the output of which is connected to the summing junction 54. The output can also be led to other display, control or recording equipment. The signal provided by the generator 70 overrides the error signal produced by the summing junction 54 and initiates a close signal which causes the valve 1 4 to close slowly, for example in about 6 seconds. The generator 70 is started and cancelled by logic 1 signals through an OR gate 72 and direct on line 74, respectively.

The timing pulse generator 40 provides timing signals as shown in Figure 4. The generator 40 provides a CLOCK signal for various functions in the circuitry. The CLOCK signal can be either as generated, i.e. CLK in Figure 4, or the generated signal can be inverted, i.e. CLK in Figure 4. The output DITHER is connected to an input of the summing junction 56 to produce a cyclic drive signal to the servo valve 22 in order to overcome static friction. The outputs A,, A1 and A2 are used to provide sequence switching signals as discussed more fully below. The logic signals produced by the outputs A,, A, and A2 have been indicated in Figure 4, i.e. 000; 100 etc.

Test signals for the fault-detection circuit (Figure 3) are derived as follows:- lines a, b and c-equal to inputs 1,2 and 3 from the units 28a, 286 and 28c, respectively; lines dand e-equal to outputs from the rectifiers 50 and 58 respectively; lines /, m, n and p-equal to the inputs of rectifiers 50 and 58; lines r, s, t and v-equal to the inputs of rectifier 52; lines y and x-equal to the outputs of servo valve amplifiers 66 and 68, respectively; and reference voltage supply 76 (see Figure 3).

The lines of the test signals are connected to the inputs of a test signal conditioning section 78 which conditions the signals such that a differential amplifier 80 can process pairs of the signals. The inputs and the outputs of the section 78 have been labelled to indicate the ingoing signals and the outgoing signals. The differential amplifier 80 has two inputs, one being connected to the single channel output of a first multiple-tosingle channel switching device 82 of the type DG508 (or equivalent) and the other being connected to the single channel output of a second device 84 identical to the device 82. The outputs of the conditioning unit 78 are connected to the inputs of the two devices 82 and 84 as shown in Figure 3.

The devices 82 and 84 also each receive the timing pulses A,, A1 and A2 which are used to simultaneously switch corresponding ones of the multiple channels of the devices 82 and 84 to their respective single channels to present eight pairs of signals in series to the differential amplifier 80. The pairs of signals presented to the amplifier 80 represent tests 1 to 8 listed in Figure 5.

The output of the amplifier 80 is connected to the input of a voltage level detector 86. The detector 86 is arranged to give a first logic signal if the detected voltage is within a window of say +7v to -7v and to give a second, opposite logic signal if the detected voltage is outside the window. The detector 86 is also switched by timing pulse A2 so the first logic signal is logic 0 for tests 1 to 4 and is logic 1 for tests 5 to 8. That arrangement ensures that failure of the faultdetection circuit will be indicated since, in that situation, the output from the detector 86 will be all logic 0 or 1 and certain patterns of faults will be detected accordingly.

Tests 1 to 5 and 8 require the detected voltage to be within the window whereas tests 6 and 7 require the detected voltage to be outside the window. Consequently, when no faults are present, tests 1 to 8 require a pattern of logic signalsO,O,O,O, 1, O, O, and 1.

The output of the detector 86 is connected to a third switching device 88 identical with the devices 82 and 84. However, the device 88 has its single channel acting as an input and its multiple channels as outputs in contrast with the devices 82 and 84. The timing pulses A,, A, and A2 are also fed to the device 88 so that its multiple channels are switched to its single channel simultaneously with the switching of the corresponding paired multiple channels of the devices 82 and 84. The device 88 also receives a CLOCK signal which delays the outputs for half of the test period in order to allow the signal to stabilise.

A fault-latch section 90 has its inputs connected to the outputs of the switching device 88. The fault-latch section 90 consists of capacitor/resistor combinations which are connected to C-MOS dual type-D FLIPFLOPS wired as R-S latches. The latches are operated by a logic 1 signal being passed by the capacitor/resistor combination. For the particular pattern of logic signals described above for tests 1 to 8, when no fault condition is present, the capacitor/resistor combinations receiving logic 0 are charged and the capacitor/resistor combinations receiving logic 1 are also charged.

In the latter cases, the logic 1 signal is inverted to logic 0 prior to reaching the latch. When a fault arises, logic 1 instead of logic 0 allows discharge of the capacitor/resistor combination and a logic 1 signal is passed to the appropriate latch and logic 0 instead of logic 1 also causes discharge of the capacitor/resistor combination and the resultant logic 0 signal is inverted to operate the appropriate latch.

In addition to operating the latches, some of the fault signals are used directly for certain operations. The lines F,, F2 and F3 connect logic 1 fault signals for tests 1, 2 and 3 to analogue switches 96, 98 and 100 as well as to the latches so that the switches 96, 98 or 100 open to disconnect the appropriate input from the majority voter unit 62 in the event of a fault. If the fault is transient the logic 1 signal disappears and the switch 96, 98 or 100 re-closes although the fault is still latched, for indication and alarm, until a reset signal is received. The fault signal for test 4 energises a double-pole-doublethrow (DPDT) relay 104 to cause a trip test solenoid (TTS) to operate. The TTS causes loss of hydraulic fluid from the power piston 1 8 when the servo-valve 22 sticks and partial closure of the steam valve 14 is required.Consequently, valve 14 closes and causes an opposite, opening signal to be generated by the governing system to cause opposite actuation of the servo-valve 22 which may then free itself. The fault signal for test 4 is also delayed for 200 ms before the latch is operated.

The fault-latch section 90 is resettable through an OR gate 92 which passes a logic 1 signal to the reset terminals of the latches upon either power-on or manual reset or external fault reset.

The outputs from the fault-latch section 90 are connected to the inputs of a diagnostic logic section 94 consisting of C-MOS gates which process incoming latched logic 1 fault signals and the logic 1 signals from lines Ft, F2 and F3 to give an indication of the fault and/or to generate an alarm or other signal (see Figures 3 and 6).

In fault situations, the diagnostic logic section 94 operates relays as follows:- a) relay 102-a double-pole-double-throw (DPDT) relay which is de-energised to provide a trip signal for the overall governing system which would decide whether a trip has to be actuated depending on the overall requirements; b) relay 106--one-form 'A' reed relay deenergised (open contacts) upon detection of an electrical fault (ensures an electrical fault is simulated in the event of the unit 36 being removed from the governing system); and c) relay 108 one-form 'A' reed relay energised (closed contacts) upon detection of an hydraulic fault.

The section 94 also operates a fault LED display 110 (the fault indicated by the LED's 1 to 10 are indicated in Figure 6), provides an output F0 connected to the summing junction 54 to give a fast closure (i.e. 0.1 to 0.2 second) signal to the servo-valve amplifiers and provides an output (logic 1) or OR gate 112 which has an output F4 (logic 1) to the gate 72 for starting the OLT generator 70. The gate 11 2 also receives an output logic 1 upon power-on to ensure that initial opening of the valve 14 is a controlled OLT procedure. When a test 4 fault has resulted in the OLT generator 70 being started, the generator 70 causes the servo-valve amplifiers 66 and 68 to be saturated and the test 4 fault to be maintained.

The OLT cancel signal on line 74 overrides the test 4 fault so that the generator 70 produces an increasing opposite signal to remove the saturation of the amplifiers 66 and 68 and to allow the TTS to close and the steam valve 14 to re-open.

Although the fault-detection circuit has been specifically described in the context of a specific turbine control system, it will be appreciated that it can also be used in other types of turbine control systems. For example, some systems do not use pilot valves or do not utilise the pilot-valve position for control functions. The fault-detection circuit can also be used in other forms of high integrity analogue control systems.

Claims

1. An analogue control system comprising a control circuit from which test signals are derivable and a fault-detection circuit for repeatedly performing a series of fault-detection tests, the fault-detection circuit comprising a differential amplifier, first and second multiple-tosingle channel analogue switching devices, the single channels being connected to respective inputs of the amplifier and corresponding ones of the multiple channels being switchabie simultaneously, the multiple channels being connected to the outputs of a test signal conditioning section for receiving signals from the control circuit, the section conditioning the test signals such that they are processable by the amplifier, an output of the amplifier being connected to an input of a voltage level detector which is switchable to give an output signal of logic 0 for some tests and of logic 1 for other tests when the detected voltage is within a voltage window and the reverse output when the detected voltage is outside the window, the tests being arranged such that, for a series of tests, all logic 0 or all logic 1 output signals from the detector indicates a fault in the fault-detection circuit, a third multiple-to-single channel switching device, the single channel being connected to the output of the detector and the multiple channels being switchable simultaneously with said corresponding multiple channels of the first and second devices and being connected to input channels of a fault-latch section, the fault-latch section having capacitors, chargeable or dischargeable in response to a logic signal from the detector, and latches, each operable in response to the discharge of the respective capacitor in a fault situation and a diagnostic section connected to the output channels of the fault-latch section to receive fault signals upon operation of any of the latches, the diagnostic section being able to process fault signals to indicate faults and/or to generate alarm or other signals.

2. A control system according to claim 1, in which the control circuit controls the position of a steam valve of a steam turbine, the circuit comprising power-piston position-indicating means connected to a first phase-conscious rectifier, pilot-valve position-indicating means connected to a second phase conscious rectifier, a first summing junction having a first input for receiving a valve control signal and a second input connected to the first rectifier, a second summing junction having a first input connected to the output from the first summing junction and a second input connected to the second rectifier and two servo-valve amplifiers each having an input connected to the output from the second summing junction and outputs connected to drive means for the servo valve.

3. An analogue control system according to claim 1, substantially as hereinbefore described with reference to the accompanying drawings.