GB2082355A

GB2082355A - Microprocessor watchdog system

Info

Publication number: GB2082355A
Application number: GB8120185A
Authority: GB
Original assignee: Canadian General Electric Co Ltd; General Electric Canada Co
Current assignee: General Electric Canada Co
Priority date: 1980-08-20
Filing date: 1981-06-30
Publication date: 1982-03-03
Also published as: IT1137930B; AU7212181A; CA1160753A; IT8122558A0; GB2082355B

Abstract

A watchdog system for a microprocessor (14) uses the primary AC power source to initiate restart signals for the microprocessor (14). The microprocessor (14) has an internal checking system. If a check is satisfactory, the microprocessor (14) provides a reset signal (18) at regular intervals to a counter (15) coupled to the primary AC power source which counts the pulses it receives until a predetermined count is reached. The counter (15) then provides a restart signal (16). The counter (15) is reset by the reset signal (18) from the microprocessor (14) when the check is satisfactory, and the time interval between reset signals is shorter than the time required for the counter to count to the predetermined count. The microprocessor (14) may check that a predetermined valve is present is a specified memory location therein. <IMAGE>

Description

SPECIFICATION Microprocessor watchdog system This invention relates to a microprocessor watchdog system, and seeks to provide a reliable and inexpensive system for monitoring and resetting a microprocessor.

Watchdog systems for large computers are well known. These systems detect faults or failures in the power supply or in the actual computer operation and either place the computer in a condition which is tolerable for shutdown or perform some other function to correct or circumvent the fault. These systems tend to be complex and are not always suitable for small computers, for example, for microcomputers and microprocessors. Inaddition, if a problem occurs, there is normally someone available who can investigate the problem or fault in a large computer, but this is not necessarily so for microcomputers.

The use of microprocessors to operate or to control functions in appliances, industrial apparatus, and various other equipment, is becoming increasingly more common. The present invention is primarily concerned with providing a watchdog system suitable for such microprocessors. If the microprocessor should develop an operating fault, there should be a watchdog system that detects the fault and restarts the microprocessor. If the power supply fails, or if the microprocessor is disturbed by electrical noise, the restart should be automatic and not require the attention of any technical personnel.

One form of the prior art watchdog system which is frequently a part of the computer it is associated with, makes a regular periodic check of some parameter or parameters of computer operation. If the test is satisfactory, a reset signal is applied to a single shot multivibrator. The time intervals between reset signals is less than the time required for the multivibrator to return to its set or stable condition. Thus the single shot multivibrator is maintained in its reset condition until a fault is detected. When the fault is detected, the multi-vibrator is not reset and it returns to its stable condition thereby giving an output pulse which can be used to initiate a computer shut down or a computer restart. It will be seen that a fault detection results in only one output from the multivibrator and therefore only one restart signal is available.This is not suitable for a microprocessor where there are no skilled people available and the system must reset without any attention.

Another form of prior art watchdog is connected to monitor the DC supply for the computer. An oscillator is energized by the same DC supply, and it is the oscillator which provides restart signals. If there is a power failure the computer is shut down in some manner. When the power again becomes available the oscillator becomes energized and when it starts to oscillate it provides a restart signal. However, if the DC supply is restored very gradually, it has been found that oscillators do not always start immediately. It is, of course, desirable to have a microcomputer or microprocessor start as soon as possible.

According to one aspect of the present invention, there is provided a watchdog system for a microprocessor having means to provide a reset signal at regular predetermined intervals when the microprocessor operation is normal, comprising counter means having a first input for receiving pulses to be counted and having an output providing a restart signal when the count of pulses reaches a predetermined count, said counter means having a second input connected to said microprocessor for receiving said reset signal and responsive thereto to reset said counter means to start said count again, and coupling means connected between a primary AC power source and said first input to provide pulses to be counted, said predetermined intervals being shorter than the time required for said counter means to count to said predetermined count.

Said coupling means may include a diode for providing unidirectional pulses or it may include an opto-coupler.

According to another aspect of the present invention there is provided in a microprocessor system having an integral checking means to check at least one predetermined microprocessor memory location for a predetermined value and providing a reset signal at regular predetermined intervals when said predetermined value is present, a rectifier receiving AC power from a primary source and providing operating DC power to said microprocessor, and the microprocessor having an input for receiving a restart signal to initiate a restart procedure including a check of said predetermined memory location for said predetermined value inserting at least said predetermined value at said predetermined location, a watchdog system comprising: a counter having a first input for receiving pulses and having an output providing a restart signal to said input of said microprocessor system when the count of pulses reaches a predetermined count, said counter having a second input connected to said microprocessor system for receiving said reset signal and responsive thereto to reset said count of pulses, and coupling means connected between said primary source and said first input to provide pulses to be counted, said predetermined intervals being shorter than the time required for said counter to count to said predetermined count.

Preferably the said counter is connected to said rectifier to receive therefrom operating DC power and the said coupling means may include a diode for providing unidirectional pulses to said counter.

The said counter may be integral with the said microprocessor.

A preferred embodiment of the present invention may make use of the primary supply, that is the AC electrical power source to control the restart pulses for a microprocessor.

It does not relay on an oscillator. In the event of a fault, a series of restart signals are provided in response to the primary power source. Very briefly, a counter receives as a clock input the AC signal of the power source which in North America is a 60 Hz signal.

When the counter counts to a predetermined number it outputs a restart signal to the microprocessor. The microprocessor provides a counter reset signal to the counter when it is operating normally, and the time interval between the counter reset signals is shorter than the time required by the counter to count to the predetermined number, i.e. to the predetermined count. Consequently, in the absence of a fault the counter is reset repeatedly before it reaches the predetermined count and no restart signal is provided. If a fault should occur, the counter will not receive the next counter reset signal, the counter will reach its predetermined count and provide a restart signal to the microprocessor. The microprocessor restart procedure will then be initiated.

The microprocessor restart procedure will then be initiated. The microprocessor will receive repeated restart signals until such time as the microprocessor provides counter reset signals.

If there should be a power failure the microprocessor will shut down. Unlike a computer, a microprocessor does not require a complex shutdown procedure to place it in shutdown condition before power is completely lost. If the power supply stops so does the microprocessor. The microprocessor does, however, have to go through a restart procedure after a power failure, and it does this when it receives a restart signal.

In a preferred embodiment of the present invention two restart procedures are provided.

These are referred to as a soft start and a hard or complete start. The microprocessor must determine if a short restarting procedure will be satisfactory or if a complete restart is necessary.

The present invention seeks to provide a novel and inexpensive watchdog system for microprocessors that uses a primary power source to control restart procedures.

It also seeks to provide a simple and novel watchdog system for microprocessors which give repeated restart signals following a fault and it seeks to provide a watchdog system that requires no attention from technical personnel following a fault.

The invention will be described, merely by way of example, with reference to the accompanying drawings, in which: Figure 1 is a simplified block schematic diagram showing the invention, Figure 2 is a simplified microprocessor flow diagram useful in explaining the operation of the invention, Figure 3 is a simplified schematic diagram showing one form of the invention, and Figure 4 is a simplified schematic diagram showing another form of the invention.

Referring to Fig. 1, the simplified block schematic diagram shows a rectifier 10 which is connected to a source of AC power 11, such as a 60 Hz power system, and which provides DC power over conductor 12 to a microprocessor 14. The microprocessor 14 may be designed to control an appliance such as a washing machine, an electric stove, or a microwave oven,or it may be used to control industrial apparatus such as switchgear, prod~ uction equipment or other apparatus. Micro processors for controlling various apparatus are known. The microprocessors normally require a start signal after they have the nieces sary power applied, to initiate operation. The start signal (or restart signal if it is not the first start) normally may insert some operating data in the microprocessor memory and it may test to ensure it is there, or it may initialize the microprocessor in other ways.Inasmuch as a "start" and a "restart" signal are identical, they are referred to herein as "restart" signals for convenience.

The present invention uses a counter 15 which is connected to power source 11 to receive as an input the AC power waveform.

The counter 15 is powered by DC from conductor 12 and after counter 15 counts to a predetermined number it provides a restart signal on conductor 16. The restart signal on conductor 16 may be amplified by driver 17, and applied to the restart terminal of microprocessor 14. The microprocessor 14 provides at regular time intervals a counter reset signal on conductor 18. The time interval between counter reset signals is less than the time required for counter 15 to the predetermined number.

When microprocessor 14 is operating normally it provides counter reset signals at regular time intervals over conductor 1 8. Each counter reset signal resets the counter so that it starts its count again, and before it reaches the predetermined count it is again reset.

Thus, the counter 15 does not generate any restart signal.

If the AC power should fail the counter 15 and the microprocessor 14 will both stop. A microprocessor of the type contemplated by this invention, unlike a computer, does not require a complex shutdown procedure. When the AC is again available, the counter 15 and the microprocessor 14 will be provided with DC power and will become functional. Counter 15, receiving no counter reset signals, provides a restart signal to microprocessor 14.

A delay may be incorporated to ensure the microprocessor is fully functional before a restart signal is generated. The microprocessor goes through its restart procedure and if it is satisfactory it provides a counter reset signal and normal operation resumes. The system is automatic. The counter 15 will continue trying to restart the microprocessor 14 until it succeeds. If the microprocessor breaks down completely, the watchdog will keep trying to restart it.

A typical restart procedure for microprocessor 14 might be summarized as follows.

When a restart signal is received, a specific predetermined memory location is checked. If the memory location has a predetermined number or code stored there, then a counter reset signal is provided to the counter. If the predetermined memory location does not have the predetermined code number, then that number is placed in the predetermined location (and any other numbers are placed in other memory locations and other registers as required). Now the predetermined number is in the predetermined memory location and a counter reset signal is provided. In this procedure only one memory location is checked as a health" location. The watchdog system is intended to be simple and reliable and a check of one memory location for a predetermined number is adequate for most microprocessor systems.However, if a system requires it, a more complex restart procedure can be used and still have the simplicity and reliability of a watchdog responsive to the primary power source. A It will be seen that the restart procedure just described may be used for a soft (or warm start) or a hard start ( or cold start). If a restart signal is received by microprocessor 14, and it finds the required number in the predetermined memory location, it can start to provide counter reset signals and begin operating. This is a soft start or warm start involving only part of the procedure. It might occur, for example, following a transient which prevented a counter reset signal from generated but which did not affect the microprocessor memory.On the other hand, if the required number is not found in the predetermined memory location, then the microprocessor restart procedure places the required number there as well as placing other required numbers or updated data in other memory locations and other registers before initiating counter reset signals. This is a cold start or complete start.

While it is not thought to form part of the present invention, the restart procedure is described in more detail with reference to Fig.

2. This will provide a more complete background.

Fig. 2 is a simplified flow diagram of a microprocessor restart procedure suitable for use with the present invention. A restart signal from counter 1 5 (Fig. 1) is received at input 50 and it initiates a check of memory integrity, that is it initiates a check of one or more "health" locations in the RAM memory (random access memory) of the microproces sor. This is indicated by block 51 in the flow diagram. A restart signal is only provided by counter 15 (Fig. 1) when the reset signal did not reset counter 15 (Fig. 1) indicating a power failure had taken place, a transient had momentarily disrupted microprocessor opera tion, or something else had interfered with the reset.If the memory integrity check shows the required code or codes in the predetermined memory locations, it proceeds with the warm start as represented by block 52. In other words, if the required code or codes are present in the predetermined memory loca tions, it is a good indication that nothing has happened to interfere with the memory. On the other hand, if the memory integrity check of block 51 fails to find the required code or codes, it proceeds with the cold start repre sented by block 53.

While various warm start and cold start procedures are known in the art, suitable ones will be described briefly to ensure a complete understanding of the invention. A warm start, following a momentary disruption for exam ple, might include the following steps: (1) Reset the programme to the begin ning, (2) Set the stack pointer to its base posi tion (3) Initialize the microprocessor input/out ,But channels to the required states (4) Initialize the interrupt logic to its re quired state.

A cold start following an initial power-on or following a severe disruption for example as represented by block 53, might include the following steps: (1) Reset the programme to the beginning (2) Prepare the memory by storing re quired constants and other material to be used during the operation of the programme, (3) Set the stack pointer to its position (4) Initialize the microprocessor input/out put channels to the required states, (5) Initialize the interrupt logic to its required state, (6) Store in the memory, at the predeter mined memory locations, the integrity check ing code or codes.

When the warm start or cold start procedure has been completed, the microprocessor is placed in its operational loop (or operating condition) as represented by the broken line 54. A reset signal is provided at output 55 to counter reset input in counter 15 (Fig. 1) as represented by block 56 in the flow diagram.

Then the microprocessor continues with its programmed tasks as represented by block 57. These programmed tasks are momentarily interrupted at predetermined intervals to cause a reset signal to be provided at output 55. This is represented by the line 58 forming a loop back to block 56.

Referring now to Fig. 3, the simplicity of the system can be seen in the embodiment shown. The microprocessor 14, counter 15, and conductors 16 and 18 are numbered as in Fig. 1. A transformer 20 has its primary connected to the AC power source 11 and its secondary 21 is connected to a bridge rectifier 22. The output of the bridge rectifier 22 is on conductors 23 and 24 across capacitor 25.

Conductor 24 is the common or ground conductor. A regulator 26 is connected to the output, that is to conductors 23 and 24, to provide a regulated DC supply. This type of supply is well known. The conductors 27 and 24 provide a regulated DC supply for microprocessor 14 and counter 15. A regulator 26 is connected to the output, that is to conductors 23 and 24, to provide a regulated DC supply. This type of supply is well known. The conductors 27 and 24 provide a regulated DC supply for microprocessor 14 and counter 15.

A diode 30 and a resistance 31 are series connected between secondary 21 and the clock input of counter 15, and a diode 32 is connected from the clock input of counter 15 and conductor 27 carrying the regulated DC voltage. This simple arrangement requiring two diodes and a resistor change the sinusoidal waveform to a pulse waveform and provides these pulses to the block input for counter 15.

The counter 15 may conveniently be a 4024 chip or similar chip which may, with a 60 Hz input, provide a selectable count corresponding to time intervals between 16 m s and just over one second, approximately. The output, at the selected count, is provided, as before on conductor 16, buffered by some device such as inverter 33 and connected to the restart input of microprocessor 14. The operation is as described in connection with Fig. 1.

Fig. 4 is a schematic diagram of another form of the invention which uses an optocoupler 35 having a light emitting diode 36 and a light sensitive diode 37. A diode 38 provides reverse protection for the opto-diode 36. The diodes 36 and 38 are connected in an opposing parallel arrangement and the arrangement is connected in series with a current limiting resistor 40 across secondary 21. The photo-diode 37 and resistor 41 are series connected across the regulated DC supply on conductors 24 and 27, and the junction of photodiode 37 and resistor 41 is connected to the clock input of the counter 15.

The operation of the circuitry of Fig. 4 is the same as that of Fig. 3. The opto-coupler 35 provides isolation between the AC and the clock input of counter 15.

While it is not believed necessary for an understanding of the invention, an operable circuit has been constructed using the following components: Counter 15 4024 integrated circuit opto coupler MCT 2 diode 38 IN 5061 resistor 40 4K ohms (selectable, depending on AC voltage) resistor 41 1 K ohms inverter 33 2N 3417 It will be apparent that many other circuits could be used to provide pulses from the AC supply to a counter to provide a restart signal dependent upon the primary power source.

Claims

1. A watchdog system for a microprocessor having means to provide a reset signal at regular predetermined intervals when the mi-: croprocessor operation is normal, comprising counter means having a first input for received ing pulses to be counted and having an output providing a restart signal when the count of pulses reaches a predetermined count, said counter means having a second input connected to said microprocessor for receiving said reset signal and responsive thereto to reset said counter means to start said count again, and coupling means connected between a primary AC power source and said first input to provide pulses to be counted, said predetermined intervals being shorter than the time required for said counter means to count to said predetermined count.

2. A watchdog system as defined in claim 1, in which said coupling means includes a diode for providing unidirectional pulses.

3. A watchdog system asdefined in claim 1, in which said coupling means includes an opto-coupler.

4. In a microprocessor system having an integral checking means to check at least one predetermined microprocessor memory loca tion for a predetermined value and providing a reset signal at regular predetermined inter vals when said predetermined value is pre sent, a rectifier receiving AC power from a primary source and providing operating DC power to said microprocessor, and the micro processor having an input for receiving a restart signal to initiate a restart procedure including a check of said predetermined mem ory location for said predetermined value in serting at least said predetermined value at said predetermined location, a watchdog sys tem comprising: a counter having a first input for receiving pulses to be counted and having an output providing a restart signal to said input of said microprocessor system when the count of pulses reaches a predetermined count, said counter having a second input connected to said microprocessor system for receiving said reset signal and responsive thereto to reset said counter to start said count of pulses, and coupling means connected to derive pulses from the said primary source and to supply the pulses to the first input of the counter means said predetermined intervals being shorter than the time required for said counter to count to said predetermined count.

4. In a microprocessor system having an integral checking means to check at least one predetermined microprocessor memory location for a predetermined value and providing a reset signal at regular predetermined intervals when said predetermined value is present, a rectifier receiving AC power from a primary source and providing operating DC power to said microprocessor, and the micro- processor having an input for receiving a restart signal to initiate a restart procedure including a check of said predetermined memory location for said predetermined value inserting at least said predetermined value at said predetermined location, a watchdog system comprising: a counter having a first input for receiving pulses and having an output providing a restart signal to said input of said microprocessor system when the count of pulses reaches a predetermined count, said counter having a second input connected to said microprocessor system for receiving said reset signal and responsive thereto to reset said counter to start said count of pulses, and coupling means connected between said pri mary source and said first input to provide pulses to be counted, said predetermined in tervals being shorter than the time required for said counter to count to said predeter mined count.

5. The system as defined in claim 4 in which said counter is connected to said recti fier to receive therefrom operating DC power.

6. The system as defined in claim 4 or 5 in which said coupling means includes a di ode for providing unidirectional pulses to said counter.

7. The system as defined in claim 4, 5 or 6 in which said counter is integral with said microprocessor.

8. A watchdog or microprocessor system substantially as hereinbefore described with reference to and as shown in the accompany ing drawings.

r CLAIMS (5 Nov 1981)

1. A watchdog system for a microproces sor having means to provide a reset signal at regular predetermined intervals when the mi croprocessor operation is normal, comprising counter means having a first input for receiv ing pulses to be counted and having an output providing a restart signal when the count of pulses reaches a predetermined count, said counter means having a second input connected to said microprocessor for receiving said reset signal and responsive thereto to reset said counter means to start said count again, and coupling means con nected to derive pulses from a primary AC power source and to supply the pulses to the said first input of the counter means said predetermined intervals being shorter than the time required for said counter means to count to said predetermined count.