GB2061571A - Elapsed time recorder - Google Patents

Abstract

An elapsed time recorder or chronograph comprises electronic timing circuitry feeding electrical pulses to an operating coil (S) of an electromechanical counter. The recorder is arranged to be energised from a d.c. supply 1, 2 which may be at one of a wide range of output voltage values. To accommodate such variations in supply voltage without requiring different operating coils, a low-power pulse generating stage (X1, I.C.I.) including a crystal controlled oscillator and frequency divider counters of the timing circuitry, is energised via a voltage regulator comprising a zener diode D2, diode D1, R5 and C4 such that the pulse generating stage outputs pulses of substantially constant magnitude independently of the d.c. supply voltage. These pulses are fed to a high-power driver stage formed by a VMOS power transistor T1 arranged to produce constant current pulses through the operating coil (S) dependent upon the zener voltage and independently of the supply voltage. The pulse generator stage includes a crystal oscillator (X1) to give temperature stability and accuracy, and may produce one pulse every one hundredth of an hour. Application to the measurement of running time of vehicles is suggested. <IMAGE>

Description

SPECIFICATION Elapsed time recorder The present invention relates to an electromechanical elapsed time recorder capable of being powered from various different external d.c. supplies of widely different nominal voltages.

As used herein, the term "widely different nominal voltages" is intended to mean voltages ranging from a minimum value up to maximum value which is several times said minimum value.

Recorders for measuring vehicle running time are well known and generally incorporate a solenoid-operated electro-mechanical counter counting pulses produced by timing circuitry. Such recorders are powered from the vehicle's D.C.

supply. Since the supply voltage value may lie anywhere between 6 v and 48 volts depending on the vehicle type, it has proved necessary to wind the driving solenoid of the counter with several coils, each appropriate for a particular part of the range of supply voltages from which the recorder may be required to operate. Not only is the provision of several coils an added expense in itself, but it also adds to the complexity of installation of the recorder and increases the risk of an error being made.

According to the present invention there is provided an electro-mechanical elapsed time recorder capable of being powered from various different external d.c. supplies of widely different nominal voltages without the need for internal circuitry changes within the recorder, said recorder comprising d.c. supply terminals for connection to an external d.c. supply, an electromechanical counter with an operating coil, and timing circuitry arranged to supply current pulses to the operating coil of the counter at regular intervals, said timing circuitry comprising a high-power driver stage'in the form of a power transistor electrically connected in series with said operating coil across said d.c. supply termainals, a low-power pulse generating stage arranged to supply pulses to a control electrode of said power transistor, and a voltage regulator operative for all said various different d.c. supplies to regulate the voltage supplied to said pulse generating stage such that the magnitude of the pulses fed from that stage to the power transistor is substantially constant, the power transistor being arranged to convert said constant magnitude pulses at its control electrode into constant current pulses through the operating coil of the counter.

The arrangement of the power transistor allows the recorder to be used with d.c. supplies of widely different nominal values without the need to change the operating coil of the electromechanical counter or to go to the expense of regulating the whole of the d.c. supply to the recorder.

Preferably the pulse generating stage comprises a crystal oscillator and an electronic counter arranged to divide the oscillator output frequency. Advantageously, the electronic counter is a CMOS integrated circuit and the power transistor is a VMOS field effect transistor.

An elapsed time recorder embodying the invention will now be particularly described, by way of example, with reference to the accompanying drawing the sole Figure of which is a diagram of timing circuitry of the recorder.

The recorder to be described is arranged to measure elapsed time in one hundredth of an hour intervals and comprises electronic timing circuitry producing regular timing pulses, and an electromechanical counter provided with a solenoid connected to receive said timing pulses and to increment the counter accordingly. Such electromechanical counters are well known and will not be further described hereinafter.

The timing circuitry of the recorder comprises four parts, namely a voltage regulator, a crystal oscillator, an electronic counter (divider), and a power driver for energising the solenoid of the electro-mechanical counter. The electronic counter is implemented by a CMOS integrated circuit l.C. 1 and the remaining parts of the timing circuitry are appropriately designed to interface with this integrated circuit í.C.1 In the present example, the counter circuit í.C. 1 is a CD 4045BE integrated circuit providing a 21 stage counter.

For convenience, the various connections to the l.C. 1 will be referred to by the connection pin numbers of the CD 4045BE integrated circuit, prefixed by the letter "P".

The recorder is arranged to be energized via terminals 1 and 2 from a supply voltage Vs which may vary from +6 v to +48 volts, without requiring component value changes. The voltage regulator of the timing circuitry comprises a diode Dl, a zener diode D2 and voltage-dropping resistor R5 connected in series between the positive supply rail and ground, and a capacitor C4 connected across the diode D2. Typically the zener voltage of diode D2 is 5.6 v and resistor R5 has a value of 1 K with a rating of two watts. The supply inputs VDD and V,s of the integrated circuit l.C. 1 (pins P3 and P 14) are connected across the zener diode D2.

The crystal oscillator of the timing circuitry is a CMOS inverter oscillator utilising a crystal1 and an amplifier provided by an input inverter of the integrated circuit l.C. 1 (this inverter being accessed via pins P15 and P16). The crystal X1 is connected in a pi-network (including resistors R1 and R3, and the capacitor C2) and operates at parallel resonance. A d.c. blocking capacitor C1 and a resistor R2 limit the voltage applied to the crystal X1 to a maximum of 1 volt peak to peak to prevent possible damage to the crystal.The frequency of oscillation of the crystal X1 is 58.25 KHz which, when divided down by the 21 stage counter circuit l.C.1 provides an output pulse every 36 seconds (every one hundredth of an hour).

The calibration tolerance of the crystal X1 used is typically +0.05% at 250C and the frequency variation of the crystal over the operating temperature range is typically -0.02%. To render the crystal oscillator less sensitive to voltage supply variations, the sources of the "p' and "n" transistors of the integrated circuit l.C. 1 are connected to their respective substrates by source resistors R4 and R6 and pins P2 and P 1.

The counter circuit l.C. 1 when implemented as a CD4045BE integrated circuit provides, in addition to 21 flip-flop counting stages, two flip -flops for sharing the output waveform for a 3.125% duty cycle. An output pulse is provided at pin P7 of the counter circuit l.C.1 every 36 seconds.

The power driver of the timing circuitry consists of a VMOS power field effect transistor T1 with a drain load provided by the solenoid S of the electro-mechanical counter of the recorder. A diode D3 is connected across the solenoid S. A resistor R7 and a capacitor C5 are respectively connected between the drain and source electrodes of transistor T1 and its gate electrode.

The transistor TI provides a direct interface between the output of the CMOS integrated circuit l.C. 1 and the solenoid S. The transistorTl is, for example, a VN67AF transistor which has a continuous drain current rating of 2 amps.

Since the transistor is a linear voltage controlled device (and is not operated in saturation), the drain-source current of the transistor is effectively controlled by the zener voltage of the diode D2 as it is this voltage which determines the output voltage from pin 7 of circuit l.C.1 to the gate of transistor T1. The driving current for solenoid S will thus be determined by the zener diode voltage independently of the actuai supply voltage Vs. As a result, a wide range of supply voltages can be accommodated without the need to use more than one coil for the solenoid S.

From the foregoing it can be seen that the timing circuitry is made up of a low-power pulse generating stage (formed by the oscillator and counter parts of the timing circuitry), and a high power driver stage formed by the power transistor T1. The arrangement of the transistor T1 is such that it is only necessary to regulate the supply of the low-power stage to enable substantially constant current pulses to be passed through the solenoid coil independent of the d.c. supply voltage. As a consequence, the voltage regulator can be simple in form while still accommodating large variations in supply voltage.

Furthermore, due to the provision of the crystal oscillator and the dividing circuit l.C.1, the described recorder maintains accuracy of timing over wide variations in surrounding temperature.

The described device can be used to measure the running time of vehicles such as lorries, buses, earth moving equipment, and battery driven vehicles.

Claims (8)

1. An electro-mechanical elapsed time recorder capable of being powered from various different external d.c. supplies of widely different nominal voltages without the need for internal circuitry changes within the recorder, said recorder comprising d.c. supply terminals for connection to an external d.c. supply, an electro-mechanical counter with an operating coil, and timing circuitry arranged to supply current pulses to the operating coil of the counter at regular intervals, said timing circuitry comprising a high-power driver stage in the form of a power transistor electrically connected in series with said operating coil across said d.c. supply terminals, a low-power pulse generating stage arranged to supply pulses to a control electrode of said power transistor, and a voltage regulator operative for all said various different d.c. supplies to regulate the voltage supplied to said pulse generating stage such that the magnitude of the pulses fed from that stage to the power transistor is substantially constant, the power transistor being arranged to convert said constant magnitude pulses at its control electrode into constant current pulses through the operating coil of the counter.

2. A recorder according to Claim 1, wherein said power transistor is a VMOS field effect transistor.

3. A recorder according to Claim 1 or Claim 2, in which said pulse generating stage comprises a crystal oscillator and an electronic counter arranged to divide the output frequency of the oscillator by a predetermined factor.

4. A recorder according to Claim 3, wherein the said oscillator is an inverter oscillator the crystal of which is connected in a pi-network and operates a parallel resonance.

5. A recorder according to Claim 4, in which said electronic counter is a CMOS integrated circuit and an input inverter of the integrated circuit is used as the inverting amplifying stage of the oscillator.

6. A recorder according to any one of the preceding claims, in which the pulse generating stage is arranged to output a pulse to the power transistor every 36 seconds.

7. A recorder according to Claim 6 when dependent on any one of Claims 3 to 5, in which the frequency of oscillation of said oscillator is

58.25 KHz and said electronic counter is a 21 stage counter.

8. An elapsed time recorder incorporating timing circuitry substantially as hereinbefore described with reference to the accompanying drawing.