GB2059204A - Improvements in or relating to pseudosinusoidal signal generators for telecommunication systems - Google Patents

Abstract

A pseudosinusoidal signal generator is provided for a telecommunication system and produces signals having programmable frequency. The generator comprises an oscillator OS which supplies pulses of frequency CK to a programmable divider DV which divides the frequency by an integer n which is externally presettable. The output of the divider DV is connected to a counter CN having decoded outputs connected to inputs of a resistor network R1-8. The output current of the network is converted to a corresponding output voltage by an adding circuit CS. The signal frequency is programmed by selecting the integer n, and the whole generator may be miniaturized, for instance by thick-film technology. <IMAGE>

Description

SPECIFICATION Improvements in or relating to pseudosinusoidal signal generators for telecommunication systems The present invention relates to pseudosinusoidal signal generators for telecommunication systems in which the frequency of the generated signal is programmable.

In a number of telecommunication systems, the carrying out and control operations of a connection are effected by receiving apparatus which becomes effective in response to the detection of predetermined signals sent by transmitting apparatus. More particularly, in radiotelephone systems the carrying out and control of a connection comprise generation of some tens of signals in the speech band, each signal having a predetermined frequency value.

To avoid the use of a plurality of signal generators each of which has been designed to generate a predetermined frequency, signal generators have been suggested which comprise identical circuit arrangements that can be programmed as a function of the frequency to be generated.

Programmable signal generators are known in the art. To meet frequency stability and limited overall dimension requirements, such known generators comprise a quartz-controlled oscillator whose output frequency is divided by means of digital systems and is supplied to the input of a counter which is designed to address a read-only memory whose output is connected to a digital-analog converter. By modifying the codes written in the ceils of the read-only memory, or by modifying the frequency of the signal applied to the input of the counter, it is possible to vary the shape (pseudosinusoidal, triangular, etc.) or the frequency of the signal available at the output of the digital-analog converter.

A solution of the kind described above has the disadvantage that both the digital-analog converter and the read-only memory are expensive and it has not been possible to produce them in miniaturized form, e.g. by taking advantage of thick-film technology.

According to the invention, there is provided a pseudosinusoidal signal generator for a telecommunication system in which a frequency to be generated is programmable, comprising an oscillator arranged to generate a sequence of clock pulses of frequency CK and of high frequency stability, a divider arranged to divide the sequence of clock pulses by n, where n is an integer which is externally presettable, a counter having decoded outputs and being connected to receive the sequence of divided clock pulses of frequency CK' = 0K/n from the output of the divider, the counter being arranged to generate N sequences of clock pulses of frequency CK'/N, a network of resistance having N inputs connected to receive the N sequences, respectively, and being weighted according to a sinusoidal law, and an adding circuit connected to the output of the network and arranged to convert the values of the current flowing through the network to corresponding voltage levels.

It is thus possible to provide a simple and economic pseudosinusoidal components that can be miniaturized by taking advantage of thick-film technology.

Programming of the generator may be effected by modifying the binary configuration corresponding to the number preset at the input of the divider. The resistance network and the adding circuit can easily be miniaturized by taking advantage of thick-film technology.

The invention will be further described, by way of example, with reference to the accompanying drawings, in which: Figure 1 shows a block diagram of a pseudosinusoidal signal generator constituting a preferred embodiment of the invention; and Figure 2 shows waveforms appearing in the circuit of Figure 1.

Figure 1 shows an oscillator OS, e.g. a quartzarranged to generate a sequence of clock pulses CK having a high frequency stability, the pulses CK being supplied to a divider DV designed to divide by an integer number n the frequency of the signal at its input in response to the configuration of a digital word which can be preset externally and indicates the number n. In the preferred embodiment, the digital word comprises eight bits, and thus n can take values ranging from 1 to 256.

The diagram a of Figure 2 shows the sequence of clock pulses CK'=CK/n at the output of the divider DV, the pulse sequence being forwarded to an octal counter CN with decoded outputs. The octal counter is designed to generate on eight outputs, as many sequences of clock pulses, as illustrated by the diagrams b, iin i in Figure 2.

The eight outputs of the counter CN are connected to a network of resistors R1, R2 .... R8, weighted according to a sinusoidal law.

The resistors R1, R2 .... P8 are connected to the input of an adding circuit CS having the function of converting the current available at its input to a corresponding voltage. The pulses shown in the diagrams 6, c,... ican be considered as each being a voltage generator. Such voltage generators are sequentially connected to the weighted resistors, thereby providing at the input of the adding circuit CS a current proportional to the resistance value.

More particularly, the pulse b applied to the resistor R1 gives rise to a current 11 which is converted by the adding circuit CS to a voltage value V1; the pulse c applied to the resistor R2 having a weight which differs from R1 controls the flow of a current 12 which differs from the current 11 and is converted by the circuit CS to a voltage V2 different from the voltage V1, and so on. In the diagram 1, a pseudosinusoidal signal is illustrated which comprises eight voltage levels V1, V2, ... V8 to be found at the output of the circuit CS after the pulses b, c, ... i have being applied to the resistors R1, R2r P8.

The period of the pseudosinusoidal signal is equal to eight periods of the signal CK' shown in the diagram a. To modify the frequency of the pseudosinusoidal signal it is necessary to modify the frequency of the signal CK' and thus the number n preset at the input of the divider DV.

Thus, the circuit arrangement of the preferred embodiment can be easily programmed. The power distribution of single harmonics of the generated signal is such as to permit a particularly convenient filtering operation.

It is possible to show that the signal available at the output of the unit CS has a power distribution of the single harmonics such that, besides the main harmonic, the treatest power contribution is given by the 7-th and the 9-th harmonics.

In radiotelephone systems, the lower frequency signalling tone has a frequency of about 1000 Hz, whereby the higher-power harmonics have frequencies of 7000-9000 Hz. As systems of this kind comprise a channel filter whose pass band is from 300 to 3400 Hz, the harmonics at 7000 - 9000 Hz are sufficiently attenuated by the channel filter.

Thus, a signal is obtained which has a good spectrum purity without making use of any filter besides the channel filter mentioned above.

Both the resistors and the adding circuit CS substantially comprising an operational amplifier are easy to miniaturize by taking advantage of thick-film technology.

Claims (2)

1. Apseudosinusoidalsignal generatorfora telecommunication system in which a frequency to be generated is programmable, comprising an oscillator arranged to generate a sequence of clock pulses of frequency CK and of high frequency stability, a divider arranged to divide the sequence of clock pulses by n, where n is an integerwhich is externally presettable, a counter having decoded outputs and being connected to receive the sequence of divided clock pulses of frequency CK'=CK/n from the output of the divider, the counter being arranged to generate N sequences of clock pulses of frequency CK'/N, a network of resistances having N inputs connected to receive N sequences, respectively, and being weighted according to a sinusoidal law, and an adding circuit connected to the output of the network and arranged to convertthe values of the current flowing through the network to corresponding voltage levels.

2. A signal generator substantially as hereinbefore described with reference to and as illustrated in the accompanying drawings.