GB2044994A - Thin film transistors - Google Patents

Thin film transistors Download PDF

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Publication number
GB2044994A
GB2044994A GB7910133A GB7910133A GB2044994A GB 2044994 A GB2044994 A GB 2044994A GB 7910133 A GB7910133 A GB 7910133A GB 7910133 A GB7910133 A GB 7910133A GB 2044994 A GB2044994 A GB 2044994A
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United Kingdom
Prior art keywords
semiconductor layer
thin film
dopant material
layer
film transistor
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GB7910133A
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GB2044994B (en
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Philips Electronics UK Ltd
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Philips Electronic and Associated Industries Ltd
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Priority to GB7910133A priority Critical patent/GB2044994B/en
Publication of GB2044994A publication Critical patent/GB2044994A/en
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Publication of GB2044994B publication Critical patent/GB2044994B/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/456—Ohmic electrodes on silicon
    • H01L29/458—Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78663—Amorphous silicon transistors
    • H01L29/78669—Amorphous silicon transistors with inverted-type structure, e.g. with bottom gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78681—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising AIIIBV or AIIBVI or AIVBVI semiconductor materials, or Se or Te

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Thin Film Transistor (AREA)

Abstract

A thin film transistor is produced in a high resistivity semiconductor layer (3) by forming the source electrode (5) of a dopant material (eg Al) and diffusing from this electrode to controllably dope the semiconductor layer. Diffusion may also occur from the drain electrode (6) or this electrode may be applied after the diffusion step. The semiconductor material may be a II-VI compound, (eg CdSe or CdS) or amorphous Si and the electrodes may be of In protected by a layer of Au. <IMAGE>

Description

SPECIFICATION Method of manufacturing thin film transistor devices and devices manufactured by such methods This invention relates to methods of manufacturing thin film transistor devices and further relates to thin film transistor devices manufactured by such methods.
Since thin film transistors are made by vapour deposition processes, which are compatible with the production processes for evaporated passive elements it is possible to form completely integrated circuits of thin film devices by vapour deposition onto an insulating substrate.
During the manufacture of thin film transistor devices it is possible to deposit an undoped semiconductor layer with the required semiconducting properties. Typical semiconductors used in thin film transistor devices are Il-IV compounds. When such compounds are deposited by evaporating the semiconductor material from a directly heated crucible the resulting semiconductor layer is nonstoichiometric and an excess of one element constituting the compound or vacancies at sites of the other provide the current carriers necessary for transistor operation. However, it is difficult to control the deposition of an undoped semiconductor layer so as to achieve the desired properties. It is preferable, therefore, to provide a highly resistive semiconductor layer with low carrier concentration by evaporation using radiant heating.The resistivity of such a layer should be greater than 105 ohm.cm. The semiconductor layer can then be doped in a controllable manner to provide the current carriers for transistor operation so that the desired properties of the semiconductor layer can be achieved more easily.
A known method of doping a highly resistive semiconductor layer of a thin film transistor device by diffusion is described in a paper by Abraham and Poehler entitled "A Physical Description of CdSe TFT Operation" at pages 165 to 179 in the "International Journal of Electronics", Vol. 19,1965 and more particularly at page 170. In this method an alumi nium layer 50 angstroms thick is deposited over a semiconductor layer of cadmium selenide. The device is then heated to allow diffusion from the aluminium into the sem#iconductor layer. After cool ing the device any excess aluminium remaining on the surface of the semiconductor layer is oxidized.
Although the known method allows the semicon ductor layer of a thin film transistor to be doped in a controllable manner, it does have the disadvantage that several steps are required to dope the semicon ductor layer, namely the provision of an aluminium layer exclusively for doping purposes, the heating to allow diffusion of the aluminium into the semicon ductor layer, and the oxidation of any excess aluminium.
According to the present invention, there is pro vided a method of manufacturing a thin film transis- tor device comprising source and drain electrodes including the steps of providing a highly resistive semiconductor layer, forming at least the source electrode from dopant material provided adjacent one major surface of the semiconductor layer, and thereafter doping the semiconductor layer by diffusion from the dopant material of said source electrode.
The present invention thus provides a method which reduces the number of steps required to effect the doping of the semiconductor layer of a thin film transistor in a controllable manner as the only step required to effect said doping is the diffusion of the dopant from the dopant material. It is not necessary to provide a layer exclusively for doping purposes nor is it necessary to perform an oxidation step as the layer of dopant material provided in a method in accordance with the invention is used at least as the source electrode of the thin film transistor.
The thin film transistor may be formed by providing a gate electrode on an insulating substrate, providing an insulating layer over said insulating layer and providing the dopant material in the form of a layer on said semiconductor layer. In one example of a method in accordance with the invention both the source and drain electrodes are formed from said dopant material prior to the semiconductor layer being doped by diffusion from the dopant material of the source and drain electrodes. In this way the doping of the semiconductor layer is effected by diffusion from the source and drain electrodes of the thin film transistor and no further steps are required to effect said doping.
In another example of a method in accordance with the invention the source electrode only is formed from said dopant material prior to the semiconductor layer being doped by diffusion from the dopant material of the source electrode. In this way an advantageous doping profile is achieved.
Embodiments of the invention will now be described, by way of example, with reference to the accompanying drawings, in which: Figure 7 is a plan view of a thin film transistor manufactured by a method in accordance with the invention; Figure 2 is a cross-sectional view of a thin film transistor manufactured by a method in accordance with the invention taken on the line ll-ll' of Figure 1, and Figures 3 to 5 are sectional views of the parts of the thin film transistor of Figure 2 at various stages of a method in accordance with the invention.
It should be noted that for the sake of clarity of the Figures of the drawings elements of the same Figure are not in proportion to each other.
The thin film transistor shown in Figures 1 and 2 may form part of an integrated circuit. The transistor comprises a gate electrode 2 on the surface of an insulating substrate. An insulating layer 3 covers the gate electrode 2 and a semiconductor layer 4 is present on the surface of the insulating layer 3.
Source and drain electrodes 5, 6 contact the semi conductor layer 4. The gate electrode 2 is in the form of a strip which may serve as an electrode for other devices, for example, as a gate electrode for other thin film transistor devices.
A first embodiment of a method of manufacturing a thin film transistor device in accordance with the invention will now be described with reference to Figures 3 to 5.
Firstly the material of the gate electrode, which may be, for example, aluminium is evaporated in a known manner to a thickness of 500 angstroms onto a major surface of an insulating substrate 1. The gate electrode 2 is then defined by photolithographic and etching techniques which are well-known in the art (see Figure 3). The gate electrode 2 may, for example, take the form of a strip 120 microns wide and may serve as a common electrode for other devices formed on the same substrate. The gate electrode 2, at least at the area of the transistor to be manufactured, is then covered by an insulating layer 3 which may be, for example, silicon dioxide provided to a thickness of 1000 angstroms by sputter deposition. The insulating layer 3 extends over the sides of the gate electrode 2 and onto the surface of the substrate 1 (see Figure 4).
The next step in the method involves the deposition of a highly resistive semiconductor layer 4 on the surface of the insulating layer 3. The semiconductor layer 4 may be cadmium selenide which is evaporated from a source using radiant heating and is deposited to a thickness of about 1500 angstroms on the surface of the silicon dioxide layer 3 (see Figure 5). The layer 4 formed in this way has a resistivity greater than 105 ##ohm.cm.
A layer of photoresist is then deposited on the semiconductor layer 4. The photoresist is exposed and developed to leave apertures in the photoresist where electrodes are to be formed. The developer is washed away and a layer of dopant material, for example aluminium, is then evaporated to a thickness of 500 angstroms on the photoresist and on the surface of the cadmium selenide in the apertures.
The photoresist and the parts of the aluminium layer present thereon are removed by dissolving the photoresist in acetone. The parts 5, 6 of the aluminium layer remaining on the surface of the semiconductor layer 4 constitute the source and drain electrodes of the thin film transistor (see Figure 2).
The source and drain electrodes 5 and 6 may be, for example, 500 microns wide and spaced apart by 10 microns.
The technique of defining the source and drain electrodes as described above is to be preferred to a photolithographic etching technique as it reduces the likelihood of the semiconductor layer becoming contaminated or damaged by the etchants. Such contamination may result in a device whose characteristics are not satisfactory or stable in time and so is undesirable.
The source and drain electrodes 5 and 6 are in good ohmic contact with the cadmium selenide layer 4 partly because of the low work function of aluminium and partly because only clean unoxidized freshly evaporated aluminum is in contact with the surface of the cadmium selenide layer.
The device which is thus obtained is then subjected to a heat treatment at 3500C for 5 minutes to cause aluminium to diffuse from the aluminium source and drain electrodes 5, 6 into the semiconductor layer 4. In this way the semiconductor layer 4 is doped by diffusion exclusively from the electrodes 5, 6 and this doping reduces the resistivity of the semiconductor material. A thin film transistor formed by a method as described in this embodiment has good characteristics for a switching transistor, that is to say when zero or a small negative voltage is applied to the gate electrode the current flowing from source to drain is either zero or negligible (for example less than 1 microampere) and when a finite voltage is applied to the gate electrode a finite current flows between the source and drain.For example, with a source to drain voltage of 10 volts a gate voltage of 6 volts would cause a drain current of 180 microamperes to flow and a gate voltage of 10 volts would cause a drain current of 630 microamperes to flow. The characteristics indicate that a shallow region in the semiconductor layer 4 adjacent the insulating layer 3 and opposite the gate electrode 2 carries most of the induced charge and supports the greater part of the conduction. The doping profile is such that the concentration of diffused dopant in the semiconductor layer is maximum in the vicinity of the source and drain and gradually decreases towards the centre of the channel between the source and drain. The dopant should not diffuse as far as the centre of the channel so that there is an effective gap in the diffused region of the channel. This gap prevents shunt conductance across the channel.
In a further embodiment of a method in accordance with the invention the source electrode only is formed from the layer of dopant material provided adjacent one major surface of the semiconductor layer and the doping of the semiconductor layer is effected by diffusion from the dopant material of said source electrode only.
In this further embodiment the steps of the method up to and including the deposition of the semiconductor layer 4 (Figure 5) are the same as those which have been described already with reference to the previous embodiment.
The next step is to define the source electrode only. Firstly a layer of photoresist is deposited on the semiconductor layer 4. The photoresist is exposed and developed to leave an aperture in the photoresist where the source electrode is to be formed. After the devloper has been washed away a layer of dopant material, for example aluminium, is then evaporated on the photoresist and on the surface of the semiconductor layer in the aperture. The photoresist and the parts of the aluminium layer present thereon are removed by dissolving the photoresist.
The part of the aluminium layer remaining on the surface of the semiconductor layer 4 constitutes the source electrode 5 of the thin film transistor shown in Figure 2. The device which is thus obtained is subjected to a heat treatment, for example, at 3500C for 5 minutes to cause the aluminium to diffuse from the aluminium source electrode 5 into the semicon- ductor layer 4. In this way the resulting doping profile is such that the dopant concentration of the semiconductor layer progressively decreases across the channel between the source and the drain regions. The aluminium should not diffuse as far as the drain region so that the undoped region of the semiconductor layer tends to prevent any shunt conductance across the channel.The drain electrode 6 is then formed in a step which is analogous to the definition of the source electrode and the transistor structure is then complete (see Figure 2). The dimensions of the electrodes may be the same as those in the previous embodiment. A transistor having a doping profile of this type can have improved switching characteristics. This is because the lack of carriers near the drain region aids current "pinch-off' at positive gate voltages leading to a thin film transistor operating in the enhancement mode.
Although a particular method of manufacturing a thin film transistor has been described with reference to the drawings, the invention is not intended to be restricted to thin film transistors of the structure described, but is intended to include within its scope thin film transistor structures having different electrode distributions with respect to the substrate and the semiconductor layer, for example, a structure where all of the source, drain and gate electrodes are provided on the same side of the semiconductor layer.
In addition it should be noted that although in the embodiment described examples of materials of the various layers have been given the invention is not limited to these particular materials. For example, dopant material forming the source and drain electrodes may be indium and the semiconductor layer may be cadmium sulphide or doped amorphous silicon. Electrodes formed from indium are preferably protected from oxidization by depositing gold over them.

Claims (10)

1. A method of manufacturing a thin film transistor device comprising source and drain electrodes including the steps of providing a highly resistive semiconductor layer, forming at least the source electrode from dopant material provided adjacent one major surface of the semiconductor layer, and thereafter doping the semiconductor layer by diffusion from the dopant material of said source electrode.
2. A method as claimed in Claim 1, in which the source and the drain electrodes are formed from said dopant material and thereafter the semiconductor layer is doped by diffusion from the dopant material of said source and drain electrodes.
3. A method as claimed in Claim 1, in which the source electrode only is formed from said dopant material and thereafter the semiconductor layer is doped by diffusion from the dopant material of said source electrode.
4. A method as claimed in any of the preceding Claims and including the steps of providing a gate electrode on an insulating substrate, providing an insulating layer over said gate electrode, providing the highly resistive semiconductor layer over said insulating layer and providing the dopant material in the form of a layer on said semiconductor layer.
5. A method as claimed in any of the preceding Claims, in which the dopant material is aluminium.
6. A method as claimed in any of the preceding Claims, in which the material of the highly resistive semiconductor layer is cadmium selenide.
7. A method as claimed in any of the preceding Claims, in which said diffusion is effected at a temperature of 3500C for a duration of 5 minutes.
8. A thin film transistor device manufactured by a method claimed in any of the preceding Claims.
9. A thin film transistor device substantially as herein describd with reference to Figures 1 and 2 of the accompanying drawings.
10. A method of manufacturing a thin film transistor device substantially as herein described with reference to Figures 3 to 5 and Figures 1 and 2 of the accompanying drawings.
GB7910133A 1979-03-22 1979-03-22 Thin film transistors Expired GB2044994B (en)

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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0090661A2 (en) * 1982-03-31 1983-10-05 Fujitsu Limited A thin film field-effect transistor and a process for producing the same
GB2134707A (en) * 1982-12-29 1984-08-15 Sharp Kk Thin film transistor with laminated source and drain electrodes and method of manufacture
GB2148592A (en) * 1983-08-26 1985-05-30 Sharp Kk Thin film transistor with metal-diffused regions and method for making the same
FR2665300A1 (en) * 1990-07-27 1992-01-31 Samsung Electronics Co Ltd Process for fabricating a thin-film transistor
WO1997005648A1 (en) * 1995-07-31 1997-02-13 Litton Systems Canada Limited Method of forming self-aligned thin film transistor
US5686326A (en) * 1985-08-05 1997-11-11 Canon Kabushiki Kaisha Method of making thin film transistor
EP2096673A3 (en) * 2008-02-29 2011-04-20 Hitachi Displays, Ltd. Display device and manufacturing method thereof

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0090661A2 (en) * 1982-03-31 1983-10-05 Fujitsu Limited A thin film field-effect transistor and a process for producing the same
EP0090661A3 (en) * 1982-03-31 1985-09-18 Fujitsu Limited A thin film field-effect transistor and a process for producing the same
GB2134707A (en) * 1982-12-29 1984-08-15 Sharp Kk Thin film transistor with laminated source and drain electrodes and method of manufacture
GB2148592A (en) * 1983-08-26 1985-05-30 Sharp Kk Thin film transistor with metal-diffused regions and method for making the same
US5686326A (en) * 1985-08-05 1997-11-11 Canon Kabushiki Kaisha Method of making thin film transistor
FR2665300A1 (en) * 1990-07-27 1992-01-31 Samsung Electronics Co Ltd Process for fabricating a thin-film transistor
WO1997005648A1 (en) * 1995-07-31 1997-02-13 Litton Systems Canada Limited Method of forming self-aligned thin film transistor
US6043113A (en) * 1995-07-31 2000-03-28 1294339 Ontario, Inc. Method of forming self-aligned thin film transistor
EP2096673A3 (en) * 2008-02-29 2011-04-20 Hitachi Displays, Ltd. Display device and manufacturing method thereof
US8058654B2 (en) 2008-02-29 2011-11-15 Hitachi Displays, Ltd. Display device and manufacturing method thereof

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Publication number Publication date
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