GB2039105B - Multi-unit computer priority system - Google Patents

Multi-unit computer priority system

Info

Publication number
GB2039105B
GB2039105B GB7943695A GB7943695A GB2039105B GB 2039105 B GB2039105 B GB 2039105B GB 7943695 A GB7943695 A GB 7943695A GB 7943695 A GB7943695 A GB 7943695A GB 2039105 B GB2039105 B GB 2039105B
Authority
GB
United Kingdom
Prior art keywords
priority system
unit computer
computer priority
unit
priority
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB7943695A
Other versions
GB2039105A (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Bull HN Information Systems Inc
Original Assignee
Honeywell Information Systems Italia SpA
Honeywell Information Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA, Honeywell Information Systems Inc filed Critical Honeywell Information Systems Italia SpA
Publication of GB2039105A publication Critical patent/GB2039105A/en
Application granted granted Critical
Publication of GB2039105B publication Critical patent/GB2039105B/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • G06F13/30—Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal with priority control

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
GB7943695A 1978-12-26 1979-12-19 Multi-unit computer priority system Expired GB2039105B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US97319678A 1978-12-26 1978-12-26

Publications (2)

Publication Number Publication Date
GB2039105A GB2039105A (en) 1980-07-30
GB2039105B true GB2039105B (en) 1983-02-16

Family

ID=25520615

Family Applications (1)

Application Number Title Priority Date Filing Date
GB7943695A Expired GB2039105B (en) 1978-12-26 1979-12-19 Multi-unit computer priority system

Country Status (7)

Country Link
JP (1) JPS5588121A (en)
AU (1) AU534761B2 (en)
CA (1) CA1132265A (en)
DE (1) DE2951055A1 (en)
FR (1) FR2445556B1 (en)
GB (1) GB2039105B (en)
YU (1) YU40587B (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2551236B1 (en) 1983-08-30 1990-07-06 Canon Kk IMAGE PROCESSING SYSTEM
US5241661A (en) * 1987-03-27 1993-08-31 International Business Machines Corporation DMA access arbitration device in which CPU can arbitrate on behalf of attachment having no arbiter
US4901234A (en) * 1987-03-27 1990-02-13 International Business Machines Corporation Computer system having programmable DMA control
JP2550496B2 (en) * 1989-03-30 1996-11-06 三菱電機株式会社 DMA controller

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL154023B (en) * 1969-02-01 1977-07-15 Philips Nv PRIORITY CIRCUIT.
US3553656A (en) * 1969-06-03 1971-01-05 Gen Electric Selector for the dynamic assignment of priority on a periodic basis
JPS5147298B2 (en) * 1971-08-30 1976-12-14
US3961312A (en) * 1974-07-15 1976-06-01 International Business Machines Corporation Cycle interleaving during burst mode operation

Also Published As

Publication number Publication date
JPS636891B2 (en) 1988-02-12
FR2445556B1 (en) 1988-03-18
GB2039105A (en) 1980-07-30
AU534761B2 (en) 1984-02-16
DE2951055C2 (en) 1990-08-30
AU5300679A (en) 1980-07-03
YU316779A (en) 1982-06-30
CA1132265A (en) 1982-09-21
JPS5588121A (en) 1980-07-03
YU40587B (en) 1986-02-28
FR2445556A1 (en) 1980-07-25
DE2951055A1 (en) 1980-07-17

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Legal Events

Date Code Title Description
PCNP Patent ceased through non-payment of renewal fee

Effective date: 19941219